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Microelectronics Reliability, Volume 48
Volume 48, Number 1, January 2008
- Masazumi Amagai:
A study of nanoparticles in Sn-Ag based lead free solders. 1-16 - Srimanta Baishya, Abhijit Mallik, Chandan Kumar Sarkar:
A threshold voltage model for short-channel MOSFETs taking into account the varying depth of channel depletion layers around the source and drain. 17-22 - Jing-Ping Xu, Y. P. Li, Pui-To Lai, W. B. Chen, S. G. Xu, J. G. Guan:
A 2D threshold-voltage model for small MOSFET with quantum-mechanical effects. 23-28 - Gilson I. Wirth, Michele G. Vieira, Egas Henes Neto, Fernanda Lima Kastensmidt:
Modeling the sensitivity of CMOS circuits to radiation induced single event transients. 29-36 - Alicja Konczakowska:
Methodology of semiconductor devices classification into groups of differentiated quality. 37-44 - E. R. Heller, A. Crespo:
Electro-thermal modeling of multifinger AlGaN/GaN HEMT device operation including thermal substrate effects. 45-50 - Krzysztof Górecki:
A new electrothermal average model of the diode-transistor switch. 51-58 - Zdravko I. Stanimirovic, Milan Jevtic, Ivanka P. Stanimirovic:
Simultaneous mechanical and electrical straining of conventional thick-film resistors. 59-67 - Kerstin Weinberg, Wolfgang H. Müller:
A strategy for damage assessment of thermally stressed copper vias in microelectronic printed circuit boards. 68-82 - Yoshikuni Nakadaira, Seyoung Jeong, Jongbo Shim, Jaiseok Seo, Sunhee Min, Taeje Cho, Sayoon Kang, Seyong Oh:
Growth of tin whiskers for lead-free plated leadframe packages in high humid environments and during thermal cycling. 83-104 - Bo Jiang, Ai-Ping Xian:
Whisker growth on tin finishes of different electrolytes. 105-110 - Kyung-Seob Kim, C. H. Yu, S. W. Han, K. C. Yang, J. H. Kim:
Investigation of relation between intermetallic and tin whisker growths under ambient condition. 111-118 - Chao-Yang Mao, Rong-Sheng Chen:
Packaging parameter analysis and optimization design on solder joint reliability for twin die stacked packages by variance in strain energy density (SED) of each solder joint. 119-131 - Tong Hong Wang, Yi-Shao Lai, Yu-Cheng Lin:
Reliability evaluations for board-level chip-scale packages under coupled power and thermal cycling test conditions. 132-139 - Chi-Hui Chien, Thaiping Chen, Wei-Bang Lin, Chi-Chang Hsieh, Yii-Der Wu, Cheng-Hsiu Yeh:
Experimental and statistical study in adhesion features of bonded interfaces of IC packages. 140-148 - Yong Ding, Jang-Kyo Kim:
Numerical analysis of ultrasonic wire bonding: Part 2. Effects of bonding parameters on temperature rise. 149-157 - Mile K. Stojcev, Goran S. Jovanovic:
Clock aligner based on delay locked loop with double edge synchronization. 158-166 - Mile K. Stojcev:
Navabi Zainalabedin, Verilog Digital System Design: Register Transfer Level Synthesis, Testbench, & Verification (second ed.), McGraw Hill, New York (2006) ISBN 0-07-144564-1 Hardcover, pp 384, plus XVI. 167-168 - Mile K. Stojcev:
Douglas L. Perry, Harry D. Foster, Applied Formal Verification. Hardcover, pp 237, Plus XIV. New York: McGraw Hill; 2005, ISBN 0-07-144372-X. 169-170 - Mile K. Stojcev:
Joseph D. Dumas II, Computer Architecture: Fundamentals and Principles of Computer Design , CRC Press an imprint of Taylor & Francis Group, Boca Raton (2006) ISBN 0-849-32749-0 Hardcover, pp 372, plus XVI. 171-172
Volume 48, Number 2, February 2008
- Ignasi Cortés, Pablo Fernández-Martínez, David Flores, Salvador Hidalgo, José Rebollo:
Analysis of punch-through breakdown in bulk silicon RF power LDMOS transistors. 173-180 - Jing-Ping Xu, F. Ji, Pui-To Lai, J. G. Guan:
Influence of sidewall spacer on threshold voltage of MOSFET with high-k gate dielectric. 181-186 - Wai Shing Lau, S. Gunawan, Joy B. H. Tan, B. P. Singh:
The application of polyimide/silicon nitride dual passivation to AlxGa1-xN/GaN high electron mobility transistors. 187-192 - Sheng-Yi Huang, Kun-Ming Chen, Guo-Wei Huang, Cheng-Chou Hung, Wen-Shiang Liao, Chun-Yen Chang:
Electrical stress effect on RF power characteristics of SiGe hetero-junction bipolar transistors. 193-199 - Shiou-Ying Cheng, Ssu-I Fu, Kuei-Yi Chu, Tzu-Pin Chen, Wen-Chau Liu, Li-Yang Chen:
Improved performances of a two-step passivated heterojunction bipolar transistor. 200-203 - Stéphane Grauby, M. Amine Salhi, Luis David Patiño Lopez, Wilfrid Claeys, Benoît Charlot, Stefan Dilhaire:
Comparison of thermoreflectance and scanning thermal microscopy for microelectronic device temperature variation imaging: Calibration and resolution issues. 204-211 - C. K. Wong, Hei Wong, Mansun Chan, Y. T. Chow, H. P. Chan:
Silicon oxynitride integrated waveguide for on-chip optical interconnects applications. 212-218 - Valerie Girault, F. Terrier, D. Ney:
Reservoir effect in SiCN capped copper/SiO2 interconnects. 219-224 - O. Belashov, Jan K. Spelt:
Thermal stress concentration factors for defects in plated-through-vias. 225-244 - Lorenzo Valdevit, V. Khanna, Arun Sharma, Sri M. Sri-Jayantha, David L. Questad, K. Sikka:
Organic substrates for flip-chip design: A thermo-mechanical model that accounts for heterogeneity and anisotropy. 245-260 - Ravi Kandasamy, A. S. Mujumdar:
Thermal analysis of a flip chip ceramic ball grid array (CBGA) package. 261-273 - Yi-Shao Lai, Po-Chuan Yang, Chang-Lin Yeh:
Effects of different drop test conditions on board-level reliability of chip-scale packages. 274-281 - Chang-Lin Yeh, Yi-Shao Lai:
Investigations of solder joint damage potentials for board-level chip-scale packages subjected to consecutive drops. 282-292 - J. S. Hwang, M. J. Yim, K. W. Paik:
Effects of bonding temperature on the properties and reliabilities of anisotropic conductive films (ACFs) for flip chip on organic substrate application. 293-299 - Seunghyun Cho, Soonjin Cho, Joseph Y. Lee:
Estimation of warpage and thermal stress of IVHs in flip-chip ball grid arrays package by FEM. 300-309 - Yaofeng Sun, John H. L. Pang:
Digital image correlation for solder joint fatigue reliability in microelectronics packages. 310-318 - Alireza Ejlali, Seyed Ghassem Miremadi:
Error propagation analysis using FPGA-based SEU-fault injection. 319-328 - Mile K. Stojcev:
Shuvra S. Bhattacharyya, E.F. Deprettere, Jurgen Teich, (Eds.), Domain-Specific Processors: Systems, Architectures, Modeling, and Simulation, Hardcover, pp 261, plus XV, Marcel Dekker, Inc., New York, 2004, ISBN 0-8427-4711-9. 329-330 - Mile K. Stojcev:
Sajjan G. Shiva, Advanced Computer Architectures , CRC Press, Francis & Taylor Group, Boca Raton (2006) ISBN 0-8493-3758-5 Hardcover. pp 335, plus XIV. 331-332 - Mile K. Stojcev:
Bert Haskell, Portable Electronics Product Design and Development , McGraw Hill, New York (2004) ISBN 0-07-141639-0 Hardcover, pp 372, plus XII. 333-334
Volume 48, Number 3, March 2008
- D. Pic, Didier Goguenheim, Jean-Luc Ogier:
Assessment of temperature and voltage accelerating factors for 2.3-3.2 nm SiO2 thin oxides stressed to hard breakdown. 335-341 - Lin-An Yang, Chun-Li Yu, Yue Hao:
A new model of subthreshold swing for sub-100 nm MOSFETs. 342-347 - W. Tazibt, P. Mialhe, J. P. Charles, M. A. Belkhir:
A junction characterization for microelectronic devices quality and reliability. 348-353 - D. Estrada, M. L. Ogas, R. G. Southwick III, P. M. Price, R. J. Baker, W. B. Knowlton:
Impact of single pMOSFET dielectric degradation on NAND circuit performance. 354-363 - S. Lee, J. P. Long, Gerald Lucovsky, J. L. Whitten, H. Seo, J. Lüning:
Suppression of Ge-O and Ge-N bonding at Ge-HfO2 and Ge-TiO2 interfaces by deposition onto plasma-nitrided passivated Ge substrates: Integration issues Ge gate stacks into advanced devices. 364-369 - Julio C. Tinoco, Magali Estrada, Benjamín Iñíguez, Antonio Cerdeira:
Conduction mechanisms of silicon oxide/titanium oxide MOS stack structures. 370-381 - Se Woon Kim, Kang Seob Roh, Seung Hwan Seo, Kwan Young Kim, Gu Cheol Kang, Sunyeong Lee, Chang Min Choi, So Ra Park, Jun Hyun Park, Ki Chan Chun, Kwan Jae Song, Dae Hwan Kim, Dong Myong Kim:
Extraction of interface states at emitter-base heterojunctions in AlGaAs/GaAs heterostructure bipolar transistors using sub-bandgap photonic excitation. 382-388 - Ping-Feng Yang, Hua-Chiang Wen, Sheng-Rui Jian, Yi-Shao Lai, Sean Wu, Rong-Sheng Chen:
Characteristics of ZnO thin films prepared by radio frequency magnetron sputtering. 389-394 - A. A. Dakhel:
dc-Conduction mechanism in lanthanum-manganese oxide films grown on p-Si substrate. 395-400 - J. Thijsse, Olaf van der Sluis, J. A. W. van Dommelen, Willem D. van Driel, Marc G. D. Geers:
Characterization of semiconductor interfaces using a modified mixed mode bending apparatus. 401-407 - K. M. Chen, K. H. Tang, J. S. Liu:
Reliability evaluation of BOAC and normal pad stacked-chip packaging using low-K wafers. 408-415 - Chunjing Hang, Chunqing Wang, M. Mayer, Yanhong Tian, Norman Y. Zhou, Honghui Wang:
Growth behavior of Cu/Al intermetallic compounds and cracks in copper ball bonds during isothermal aging. 416-424 - J. W. Wan, Wen-Jun Zhang, D. J. Bergstrom:
Experimental verification of models for underfill flow driven by capillary forces in flip-chip packaging. 425-430 - Qiang Yu, Tadahiro Shibutani, Do-Seop Kim, Yusuke Kobayashi, Jidong Yang, Masaki Shiratori:
Effect of process-induced voids on isothermal fatigue resistance of CSP lead-free solder joints. 431-437 - Li Jiang, Keling Yang, Jiemin Zhou, Ke Xiang, Wenjie Wang:
Quantification of creep strain in small lead-free solder joints with the in situ micro electronic-resistance measurement. 438-444 - Hyun-Ho Kim, Sang-Hyun Choi, Sang-Hyun Shin, Young-Ki Lee, Seok-Moon Choi, Sung Yi:
Thermal transient characteristics of die attach in high power LED PKG. 445-454 - Dwayne R. Shirley, Hamid R. Ghorbani, Jan K. Spelt:
Effect of primary creep and plasticity in the modeling of thermal fatigue of SnPb and SnAgCu solder joints. 455-470 - Seung-Hoon Tong, Bong-Jin Yum:
A dual burn-in policy for defect-tolerant memory products using the number of repairs as a quality indicator. 471-480 - Kyungmee O. Kim, Hee-Seok Oh:
Reliability functions estimated from commonly used yield models. 481-489 - Mile K. Stojcev:
Cory L. Clark, LabVIEW Digital Signal Processing and Digital Communications , McGraw Hill, New York (2005) ISBN 0-07-144492-0 205 pp, Hardcover, plus XIII. 490-491 - Mile K. Stojcev:
Robert B. Northrop, Introduction to Instrumentation and Measurement, 2/e , CRC Press, Taylor & Francis Group, Boca Raton (2005) ISBN 0-8493-3773-9 743 pp., Hardcover, plus XXI. 492-493 - Mile K. Stojcev:
William C. Dunn, Introduction to Instrumentation, Sensor, and Process Control , Artech House, Boston (2005) ISBN 1-58053-011-7 332 pp., Hardcover, plus XIII. 494-495
Volume 48, Number 4, April 2008
- W. S. Lau, Peizhen Yang, C. W. Eng, V. Ho, C. H. Loh, S. Y. Siah, D. Vigar, L. Chan:
A study of the linearity between Ion and log Ioff of modern MOS transistors and its application to stress engineering. 497-503 - M. Z. Dai, S. I. Kim, Andrew Yap, Shaohua Liu, Arthur Cheng, Leeward Yi:
A unification of interface-state generation and hole-injection for hot-carrier-injection stress in low and high-voltage NMOSFET. 504-507 - Qingxue Wang, Lanxia Sun, Andrew Yap:
Investigation of hot carrier degradation in asymmetric nDeMOS transistors. 508-513 - Elena Atanassova, Albena Paskaleva, Nenad Novkovski:
Effects of the metal gate on the stress-induced traps in Ta2O5/SiO2 stacks. 514-525 - C. X. Li, X. Zou, Pui-To Lai, Jing-Ping Xu, C. L. Chan:
Effects of Ti content and wet-N2 anneal on Ge MOS capacitors with HfTiO gate dielectric. 526-530 - N. Arpatzanis, Argyrios T. Hatzopoulos, Dimitrios H. Tassis, C. A. Dimitriadis, François Templier, Maher Oudwan, G. Kamarinos:
Degradation of n-channel a-Si: H/nc-Si: H bilayer thin-film transistors under DC electrical stress. 531-536 - Han-Chang Tsai:
Numerical and experimental analysis of EMI effects on circuits with MESFET devices. 537-546 - A. H. You, P. L. Cheang:
Effect of doping concentration on avalanche multiplication and excess noise factor in submicron APD. 547-554 - Jianxin Zhu, Zhihua Chen, Shuyuan Tang:
Leaky modes of optical waveguides with varied refractive index for microchip optical interconnect applications - Asymptotic solutions. 555-562 - F. N. Masana:
Thermal impedance measurements under non-equilibrium conditions. How to extend its validity. 563-568 - M. H. Lin, M. T. Lin, Tahui Wang:
Effects of length scaling on electromigration in dual-damascene copper interconnects. 569-577 - Zhenyu Wu, Yintang Yang, Changchun Chai, Yuejin Li, JiaYou Wang, Jing Liu, Bin Liu:
Temperature-dependent stress-induced voiding in dual-damascene Cu interconnects. 578-583 - Michal Tencer:
Deposition of aerosol ("hygroscopic dust") on electronics - Mechanism and risk. 584-593 - Jun He, Yongjin Guo, Zhongqin Lin:
Theoretical and numerical analysis of the effect of constant velocity on thermosonic bond strength. 594-601 - Xiaowu Zhang, Kripesh Vaidyanathan, Tai Chong Chai, Teck Chun Tan, D. Pinjala:
Board level solder joint reliability analysis of a fine pitch Cu post type wafer level package (WLP). 602-610 - C. K. Wong, John H. L. Pang, J. W. Tew, B. K. Lok, H. J. Lu, F. L. Ng, Y. F. Sun:
The influence of solder volume and pad area on Sn-3.8Ag-0.7Cu and Ni UBM reaction in reflow soldering and isothermal aging. 611-621 - Olli Nousiainen, L. Lehtiniemi, T. Kangasvieri, Risto Rautioaho, J. Vähäkangas:
Thermal fatigue endurance of collapsible 95.5Sn4Ag0.5Cu spheres in LTCC/PWB assemblies. 622-630 - Young Woo Lee, Ki Ju Lee, Norman Y. Zhou, Jae Pil Jung:
Characteristics of Sn8Zn3Bi solder joints and crack resistance with various PCB and lead coatings. 631-637 - Y. S. Chen, C. S. Wang, Y. J. Yang:
Combining vibration test with finite element analysis for the fatigue life estimation of PBGA components. 638-644 - J. S. Hwang:
Filler size and content effects on the composite properties of anisotropic conductive films (ACFs) and reliability of flip chip assembly using ACFs. 645-651 - Bo-In Noh, Jong-Bum Lee, Seung-Boo Jung:
Effect of surface finish material on printed circuit board for electrochemical migration. 652-656
- Mile K. Stojcev:
Dimitris Gizopoulos, Antonis Paschalis and Yervant Zorian, Embedded Processor-Based Self Test , Kluwer Academic Publishers, Dordrecht (2004) ISBN 1-4020-2785-0 217 pp., Hardcover, plus XV. 657-658 - Mile K. Stojcev:
Wim Claes, Willy Sansen and Robert Puers, Design of Wireless Autonomous Data-Logger ICs , Springer, Dordrecht (2006) ISBN 1-4020-3208-0 pp 199, Hardcover, plus XVI. 659-660 - Mile K. Stojcev:
Amr M. Fahim, Clock Generators for SoC Processors: Circuit and Architectures , Kluwer Academic Publishers, Boston (2005) ISBN 1-4020-8079-4 244 pp., Hardcover, plus XVIII. 661-662
Volume 48, Number 5, May 2008
- Haiyu Qi, Sanka Ganesan, Michael G. Pecht:
No-fault-found and intermittent failures in electronic products. 663-674 - David A. Pinsky:
The role of dissolved hydrogen and other trace impurities on propensity of tin deposits to grow whiskers. 675-681
- M. K. Bera, Chinmay K. Maiti:
Reliability of ultra thin ZrO2 films on strained-Si. 682-692 - F. Ji, Jing-Ping Xu, Pui-To Lai, J. G. Guan:
A fringing-capacitance model for deep-submicron MOSFET with high-k gate dielectric. 693-697 - Mohammad Gh. Mohammad, Kewal K. Saluja:
Analysis and test procedures for NOR flash memory defects. 698-709 - Gilson I. Wirth:
Bulk built in current sensors for single event transient detection in deep-submicron technologies. 710-715 - Hsiao-Tung Ku, Kuo-Ning Chiang:
The mechanical stress resistance capability of stress buffer structures in analog devices. 716-723 - Boguslaw Wisz:
Coupling capacitances in the planar conductive path system of the hybrid circuit with dielectric layer. 724-733 - Bjorn Vermeersch, Gilbert De Mey:
Dependency of thermal spreading resistance on convective heat transfer coefficient. 734-738 - Han Seo Cho, Sukhyeon Cho, Jihong Jo, Haenam Seo, Byongmoon Kim, Jegwang Yoo:
Highly reliable processes for embedding discrete passive components into organic substrates. 739-743 - Seol-Min Yi, Kwang-Ho Jang, Jung-Uk An, Sang-Soo Hwang, Young-Chang Joo:
The self-formatting barrier characteristics of Cu-Mg/SiO2 and Cu-Ru/SiO2 films for Cu interconnects. 744-748 - Insu Jeon, Ki-Ju Kang, Seyoung Im:
Stress intensities at the triple junction of a multilevel thin film package. 749-756 - Tsung-Yueh Tsai, Yi-Shao Lai, Chang-Lin Yeh, Rong-Sheng Chen:
Structural design optimization for board-level drop reliability of wafer-level chip-scale packages. 757-762 - S. B. Park, Rahul Joshi:
Comparison of thermo-mechanical behavior of lead-free copper and tin-lead column grid array packages. 763-772 - Olli Salmela, Klas Andersson, Altti Perttula, Jussi Särkkä, Markku Tammenmaa:
Modified Engelmaier's model taking account of different stress levels. 773-780 - Karim Mohammadi, Seyyed Javad Seyyed Mahdavi:
On improving training time of neural networks in mixed signal circuit fault diagnosis applications. 781-793
- W. S. Lau, W. T. Wong, Joy B. H. Tan, B. P. Singh:
Effect of a trace of water vapor on Ohmic contact formation for AlGaN/GaN epitaxial wafers. 794-797
- Mile K. Stojcev:
Advances in Electronic Testing: Challenges and Methodologies, Dimitris Gizopoulos (Ed.). Springer, Dordrecht (2006), 412 pp., plus XXVI, Hardcover, ISBN: 0-387-29408-2. 798-799 - Mile K. Stojcev:
Erik Larson, Introduction to Advanced System-on-Chip Test Design and Optimization , Springer, Dordrecht (2005) ISBN 1-4020-3207-2 388 pp., Hardcover, plus XVIII. 800-801
Volume 48, Number 6, June 2008
- Artur Wymyslowski:
Guest Editorial: 2007 EuroSimE conference on thermal, mechanical and multi-physics simulation and experiments in micro-electronics and micro-systems. 803-804 - Jiang Zhou:
Transient analysis on hygroscopic swelling characterization using sequentially coupled moisture diffusion and hygroscopic stress modeling method. 805-810 - Yong Liu, Lihua Liang, Scott Irving, Timwah Luk:
3D Modeling of electromigration combined with thermal-mechanical effect for IC device and package. 811-824 - Mario Gonzalez, Fabrice Axisa, Mathieu Vanden Bulcke, Dominique Brosteaux, Bart Vandevelde, Jan Vanfleteren:
Design of metal interconnects for stretchable electronic circuits. 825-832 - Cadmus A. Yuan, Olaf van der Sluis, Willem D. van Driel, G. Q. (Kouchi) Zhang:
The need for multi-scale approaches in Cu/low-k reliability issues. 833-842 - Steffen Wiese, Mike Roellig, Maik Mueller, Klaus-Jürgen Wolter:
The effect of downscaling the dimensions of solder interconnects on their creep properties. 843-850 - Lukasz Dowhan, Artur Wymyslowski, Rainer Dudek:
An approach of numerical multi-objective optimization in stacked packaging. 851-857
- Andrzej Dziedzic:
IMAPS Poland 2007 - Guest Editorial. 859