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ORCIDRui Paulo Martins
Rui Paulo da Silva Martins
Person information
- affiliation: University of Macau
- affiliation: Instituto Superior Técnico, Lisboa, Portugal
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2020 – today
- 2025
[b2]Mo Huang, Rui Paulo Martins:
Revealing Hybrid DC-DC Converters. Springer 2025, ISBN 978-3-031-86349-3, pp. 1-133- [b1]Xiangyu Mao, Yan Lu, Rui Paulo Martins:
Fully-Integrated Low-Dropout Regulators. Springer 2025, ISBN 978-3-031-84915-2, pp. 1-229 - [j321]Chaowei Yang, Yong Chen
, Kai Cheng, Paolo Stefano Crovetti, Rui Paulo Martins, Pui-In Mak:
Area-efficient ultra-wide-tuning-range ring oscillators in 65-nm complementary metal-oxide-semiconductor. Int. J. Circuit Theory Appl. 53(3): 1253-1291 (2025) - [j320]Haochen Zhang, Wei-Han Yu, Zhizhan Yang, Ka-Fai Un, Jun Yin, Rui Paulo Martins, Pui-In Mak:
A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory- Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM Cell. IEEE J. Solid State Circuits 60(1): 321-331 (2025) - [j319]Yuefeng Cao, Minglei Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan:
A Single-Channel 12-b 2-GS/s PVT-Robust Pipelined ADC With Sturdy Ring Amplifier and Time-Domain Quantizer. IEEE J. Solid State Circuits 60(2): 443-455 (2025) - [j318]Zhiguo Tong, Junwei Huang, Xiangyu Mao, Rui Paulo Martins, Yan Lu:
A Double Pulse Overlapping Laser Diode Driver With Minimum 100-ps Pulse for LiDAR System. IEEE J. Solid State Circuits 60(2): 555-567 (2025) - [j317]Yuanfei Wang, Mo Huang, Qiujin Chen, Rui Paulo Martins, Yan Lu:
A VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio Switched- Capacitor Converter. IEEE J. Solid State Circuits 60(2): 626-637 (2025) - [j316]Ke Li, Haoyu Gong, Xianyu Congzhou, Zhensheng Li, Liang Qi, Mingqiang Guo, Rui Paulo Martins, Sai-Weng Sin:
A 160-MHz BW 68-dB SNDR 36.2 mW Continuous-Time Pipelined ΔΣ ADC With DAC Image Prefiltering. IEEE J. Solid State Circuits 60(3): 838-849 (2025) - [j315]Tingxu Hu, Yan Lu, Rui Paulo Martins, Mo Huang:
An Isolated DC-DC Converter With Full-Duplex Communication Using a Single Pair of Transformers. IEEE J. Solid State Circuits 60(3): 1070-1081 (2025) - [j314]Fei Tan, Wei-Han Yu, Jinhai Lin, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
A 1.8% FAR, 2 ms Decision Latency, 1.73 nJ/Decision Keywords-Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-IF-Domain Computing and Scalable 5T-SRAM. IEEE J. Solid State Circuits 60(3): 1103-1112 (2025) - [j313]Rui Luo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A 0.5-V 6.14- μW Trimming-Free Single-XO Dual-Output Frequency Reference With [5.1-nJ, 120- μs] XO Start-Up and [8.1-nJ, 200- μs] Successive-Approximation-Based RTC Calibration. IEEE J. Solid State Circuits 60(4): 1437-1448 (2025) - [j312]Zhizhan Yang, Haochen Zhang, Jun Yin, Rui Paulo Martins, Pui-In Mak:
An 840-to-970 MHz Multimodal Wake-Up Receiver With a Q-Equalized Antenna-ED Interface and 2-Dimensional Wake-Up Identification. IEEE Trans. Circuits Syst. I Regul. Pap. 72(3): 1165-1177 (2025) - [j311]Chen Deng, Sai Wu, Chengcheng Liu, Yatao Peng, Man-Kay Law, Jun Yin, Rui Paulo Martins, Pui-In Mak:
A Systematic Review of Voltage Reference Circuits: Spanning Room Temperature to Cryogenic Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 72(4): 1533-1546 (2025) - [j310]Yi Zhan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
GSLP-CIM: A 28-nm Globally Systolic and Locally Parallel CNN/Transformer Accelerator With Scalable and Reconfigurable eDRAM Compute-in-Memory Macro for Flexible Dataflow. IEEE Trans. Circuits Syst. I Regul. Pap. 72(4): 1657-1667 (2025) - [j309]Xiangxun Zhan, Jun Yin, Rui Paulo Martins, Pui-In Mak:
A Series-LC-Assisted Oscillator Achieving -140.2 dBc/Hz Phase Noise and 187.5 dBc/Hz FoM at 10 MHz Offset From 10.7 GHz. IEEE Trans. Circuits Syst. II Express Briefs 72(2): 389-393 (2025) - [j308]Tailong Xu, Haoran Li, Xi Meng, Xiangxun Zhan, Yatao Peng, Jun Yin, Shiheng Yang, Chao Fan, Zhixiang Huang, Rui Paulo Martins, Pui-In Mak:
Analysis and Design of a Type-II Reference-Sampling PLL Using Gain-Boosting Phase Detector With Sampling Capacitor Reduction. IEEE Trans. Circuits Syst. II Express Briefs 72(3): 439-443 (2025) - [j307]Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A 0.35-0.5-V 0.0136-mm² 12 -MHz Digital Frequency-Locked Loop With 1.06%/V Line Sensitivity in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 72(3): 459-463 (2025) - [j306]Tan Yee Chyan, Harikrishnan Ramiah, Sharifah Wan Muhamad Hatta, Chee-Cheow Lim, Rui Paulo Martins, Pui-In Mak, Yong Chen:
A Capacitorless Flipped-Voltage-Follower-Based Low-Dropout Regulator Incorporating Adaptive-Compensation Buffer. IEEE Trans. Very Large Scale Integr. Syst. 33(5): 1422-1426 (2025) - [c299]Junwei Huang, Xiangyu Mao, Zhiguo Tong, Zhewen Yu, Wenjie Yang, Chi-Seng Lam, Rui Paulo Martins, Yan Lu:
21.9 A 20MHz & 1MHz Dual-Loop Non-Uniform-Multi-Inductor Hybrid DC-DC Converter with Specified Inductor Current Allocation and Fast Transient Response. ISSCC 2025: 1-3 - [c298]Haoran Li, Jinge Li, Xueying Jiang, Xi Meng, Jun Yin, Rui Paulo Martins, Pui-In Mak:
19.7 A 27GHz Fractional-N Sub-Sampling PLL Achieving 57.9fsrms Jitter, -249.7dB FoM, and 1.98µS Locking Time Using Polarity-Reversible SSPD. ISSCC 2025: 1-3 - [c297]Zijian Liu, Minglei Zhang, Wei Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan:
24.4 A 10b 3GS/s Time-Domain ADC with Mutually Exclusive Metastability Correction and Wide Common-Mode Input. ISSCC 2025: 1-3 - [c296]Fei Song, Shousheng Han, Rui Paulo Martins, Yan Lu:
An 85-to-230VAC to 3.3-to-4.6VDc 1.52W Capacitor-Drop Sigma-Floating-SC AC-DC Converter with 81.3% Peak Efficiency. ISSCC 2025: 1-3 - [c295]Zhiguo Tong, Zhewen Yu, Junwei Huang, Xiangyu Mao, Bernhard Wicht, Rui Paulo Martins, Yan Lu:
HOOP: A Scalable Hybrid DC-DC Converter Ring for High-Performance Computing. ISSCC 2025: 1-3 - [c294]Tian Xia, Qiujin Chen, Shujing Wang, Rui Paulo Martins, Mo Huang:
32.1 A 180MHz 45.3%-Peak-Efficiency Isolated Converter Using Q-Downsize Class-D Power Amplifier with Inherent Shoot-Through Current Blocking and High Tolerance for Efficiency Despite Frequency Misalignments. ISSCC 2025: 1-3 - [c293]Haochen Zhang, Wei-Han Yu, Zhongyu Zhao, Zhizhan Yang, Ka-Fai Un, Jun Yin, Rui Paulo Martins, Pui-In Mak:
A 94.8nW Battery-Free Intelligent Silicon Platform Enabling Distributed, Adaptive, and Event-Driven Multimodal Sensing at the Edge. ISSCC 2025: 1-3 - [c292]Wenjie Yang, Zhiguo Tong, Junwei Huang, Rui Paulo Martins, Yan Lu:
A Bi-Directional Dual-Path Boost-48V-Buck Hybrid Converter for High-Voltage Power-Transmission Cable in Light-Weight Humanoid Robots. ISSCC 2025: 194-196 - [c291]Yu Duan, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan:
A PVT-Robust 5.5GHz Fractional-N Cascaded RO-Based Digital PLL with Voltage-Domain Feedforward Noise Cancellation. ISSCC 2025: 324-326 - [c290]Jiacheng Yang, Rui Paulo Martins, Mo Huang:
21.3 A Segmented-Interlacing Multi-Phase Hybrid Converter with Inherently Auto-Balanced ILs and Boosted IL Slew Rate During Load Transients. ISSCC 2025: 378-380 - [c289]Junlin Zhong, Minglei Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan:
24.3: A PVT-Robust 2× Interleaved 2.2GS/s ADC with Gated-CCRO-Based Quantizer Shared Across Channels and Steps Achieving >4.5GHz ERBW. ISSCC 2025: 432-434 - [c288]Yannan Zhang, Minglei Zhang, Zehang Wu, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan:
24.5 A 72GS/s 9b Time-Interleaved Pipeline-SAR ADC Achieving 55.3/49.3dB SFDR at 20GHz/Nyquist Inputs in 16nm FinFET. ISSCC 2025: 436-438 - [c287]Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
27.5: A 4, 100µm2 Wire-Metal-Based Temperature Sensor with a Fractional-Discharge FLL and a Time-Domain Amplifier with ±0.2°C Inaccuracy (3σ) from -40 to 125°C and 45fJ·K2 Resolution FoM in 28nm CMOS. ISSCC 2025: 478-480 - [c286]Qishen Fang, Feiyu Li, Rui Paulo Martins, Man-Kay Law:
31.4 A 91.25% Peak Power-Conversion-Efficiency Capacitive Power-Management IC Supporting up to 5.68mJ Burst Energy Delivery Using a Single External Capacitor for mm-Scale IoT Applications. ISSCC 2025: 524-526 - 2024
- [j305]Abdolraouf Rahmani, Harikrishnan Ramiah, Ka-Meng Lei, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins:
A Fast Startup 38.4-MHz Crystal Oscillator Achieving 99-nJ Startup Energy With Adaptive Chirping. IEEE Access 12: 102202-102211 (2024) - [j304]Kai Cheng, Yong Chen, Paolo Stefano Crovetti, Rui Paulo Martins, Pui-In Mak:
A 0.012-mm2 0.244-pJ/bit successive approximation register analog-to-digital converter-based true random number generator for Internet of Things applications in a 65-nm complementary metal-oxide-semiconductor. Int. J. Circuit Theory Appl. 52(12): 6028-6055 (2024) - [j303]Haihua Li, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A 12-/13.56-MHz Crystal Oscillator With Binary-Search-Assisted Two-Step Injection Achieving 5.0-nJ Startup Energy and 45.8-μs Startup Time. IEEE J. Solid State Circuits 59(2): 464-475 (2024) - [j302]Chi-Wa U, Man-Kay Law, Rui Paulo Martins, Chi-Seng Lam:
Sub-μW Auto-Calibration Bandgap Voltage Reference With 1σ Inaccuracy of ± 0.12% Within - 40°C to 120°C. IEEE J. Solid State Circuits 59(2): 540-550 (2024) - [j301]Fei Tan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
A 0.05-mm2 2.91-nJ/Decision Keyword-Spotting (KWS) Chip Featuring an Always-Retention 5T-SRAM in 28-nm CMOS. IEEE J. Solid State Circuits 59(2): 626-635 (2024) - [j300]ZiXuan Xu, Kai Xing, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan:
An ELDC-Free 4th-Order CT SDM Facilitated by 2nd-Order NS CT-SAR and AC-Coupled Negative-R. IEEE J. Solid State Circuits 59(3): 753-764 (2024) - [j299]Xiongjie Zhang, Qiaobo Ma, Yang Jiang, Anyang Zhao, Man-Kay Law, Rui Paulo Martins, Pui-In Mak:
An Outphase-Interleaved Switched-Capacitor Hybrid Buck Converter With Relieved Capacitor Inrush Current and COUT-Free Operations. IEEE J. Solid State Circuits 59(4): 1078-1092 (2024) - [j298]Feiyu Li, Qishen Fang, Jiangchao Wu, Yang Jiang, Pui-In Mak, Rui Paulo Martins, Man-Kay Law:
A 93.4% Peak Efficiency CLOAD-Free Multi-Phase Switched-Capacitor DC-DC Converter Achieving a Fast DVS up to 222.5 mV/ns. IEEE J. Solid State Circuits 59(6): 1747-1758 (2024) - [j297]Xiangyu Mao, Yan Lu, Rui Paulo Martins:
A Fully Synthesizable All-Digital Dual-Loop Distributed Low-Dropout Regulator. IEEE J. Solid State Circuits 59(6): 1871-1882 (2024) - [j296]Xiongjie Zhang, Anyang Zhao, Qiaobo Ma, Yang Jiang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak:
A 24-V-Input Highly Integrated Interleaved-Inductor Multiple Step-Down Hybrid DC-DC Converter With Inherent Current Equalization Characteristics. IEEE J. Solid State Circuits 59(9): 2895-2906 (2024) - [j295]Yuzhao Fu, Wei-Han Yu, Ka-Fai Un, Chi-Hang Chan, Yan Zhu, Minglei Zhang, Rui Paulo Martins, Pui-In Mak:
FLEX-CIM: A Flexible Kernel Size 1-GHz 181.6-TOPS/W 25.63-TOPS/mm2 Analog Compute-in-Memory Macro. IEEE J. Solid State Circuits 59(9): 3021-3031 (2024) - [j294]Qiaobo Ma, Huihua Li, Xiongjie Zhang, Anyang Zhao, Yang Jiang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak:
A Cross-Coupled Hybrid Switched-Capacitor Buck Converter With Extended Conversion Range and Enhanced DCR Loss Reduction. IEEE J. Solid State Circuits 59(10): 3192-3203 (2024) - [j293]Chaorui Zou, Yaozhong Ou, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan, Minglei Zhang:
A 256 × 192 -Pixel Direct Time-of-Flight LiDAR Receiver With a Current-Integrating-Based AFE Supporting 240-m-Range Imaging. IEEE J. Solid State Circuits 59(11): 3525-3537 (2024) - [j292]Zhizhan Yang, Jun Yin, Wei-Han Yu, Haochen Zhang, Rui Paulo Martins, Pui-In Mak:
A ULP Long-Range Active-RF Tag With Automatically Calibrated Antenna-TRX Interface. IEEE J. Solid State Circuits 59(11): 3670-3682 (2024) - [j291]Yi Zhan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
A 28-nm 18.7 TOPS/mm² 89.4-to-234.6 TOPS/W 8b Single-Finger eDRAM Compute-in-Memory Macro With Bit-Wise Sparsity Aware and Kernel-Wise Weight Update/Refresh. IEEE J. Solid State Circuits 59(11): 3866-3876 (2024) - [j290]Haoran Li, Tailong Xu, Xi Meng, Jun Yin, Rui Paulo Martins, Pui-In Mak:
A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL With Rapid Phase Alignment. IEEE J. Solid State Circuits 59(12): 3952-3965 (2024) - [j289]Haijun Shao, Rui Paulo Martins, Pui-In Mak:
A 167- μW 71.7-dB SFDR 2.4-GHz BLE Receiver Using a Passive Quadrature Front End, a Double- Sided Double-Balanced Cascaded Mixer, and a Dual-Transformer-Coupled Class-D VCO. IEEE J. Solid State Circuits 59(12): 3980-3992 (2024) - [j288]Yuefeng Cao, Minglei Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan:
A 12-GS/s 12-b 4× Time-Interleaved ADC Using Input-Independent Timing Skew Calibration With Global Dither Injection and Linearized Input Buffer. IEEE J. Solid State Circuits 59(12): 4211-4224 (2024) - [j287]Qi Zhou, Shuhao Fan, Ka-Meng Lei, Donhee Ham, Rui Paulo Martins, Pui-In Mak:
Miniature Magnetic Resonance Imaging System for in situ Monitoring of Bacterial Growth and Biofilm Formation. IEEE Trans. Biomed. Circuits Syst. 18(5): 990-1000 (2024) - [j286]Qiujin Chen, Mo Huang, Tian Xia, Jun Yin, Haiwen Liu, Rui Paulo Martins, Yan Lu:
A Radio-Frequency Cross-Connected Rectifier With LC Source Degeneration. IEEE Trans. Circuits Syst. I Regul. Pap. 71(2): 573-582 (2024) - [j285]Yang Li, Mo Huang, Rui Paulo Martins, Yan Lu:
A Single-Inductor Multiple-Output DC-DC Converter With Fixed-Frequency Victim-Last Charge Control for Reduced Cross Regulation. IEEE Trans. Circuits Syst. I Regul. Pap. 71(8): 3904-3914 (2024) - [j284]Yuzhao Fu, Jixuan Li, Wei-Han Yu, Ka-Fai Un, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins, Pui-In Mak:
CLUT-CIM: A Capacitance Lookup Table-Based Analog Compute-in-Memory Macro With Signed-Channel Training and Weight Updating for Nonuniform Quantization. IEEE Trans. Circuits Syst. I Regul. Pap. 71(11): 4996-5004 (2024) - [j283]Chon-Fai Lee, Chi-Wa U, Rui Paulo Martins, Chi-Seng Lam:
0.4-V Supply, 12-nW Reverse Bandgap Voltage Reference With Single BJT and Indirect Curvature Compensation. IEEE Trans. Circuits Syst. I Regul. Pap. 71(11): 5040-5053 (2024) - [j282]Guangshu Zhao, Zhiming Xiao, Pui-In Mak, Rui Paulo Martins, Man-Kay Law:
One-Cycle-Startup Relaxation Oscillator Using Ratiometric Threshold-Referenced and Self-Synchronized Power Gating Techniques. IEEE Trans. Circuits Syst. II Express Briefs 71(1): 56-60 (2024) - [j281]Tian Siang Ho, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Pui-In Mak, Rui Paulo Martins:
Extended Power Dynamic Range and Enhanced Power Conversion Efficiency of a Switched-Capacitor DC-DC Converter: A Tutorial. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1606-1612 (2024) - [j280]Xiongjie Zhang, Xinman Li, Anyang Zhao, Yang Jiang, Weihang Zhang, Jincheng Zhang, Rui Paulo Martins, Pui-In Mak:
A 12V-to-1V Outphase-Interleaved SC Hybrid Converter With Enhanced Inductor De-Energizing Slew Rate and Adaptive Deadtime Control. IEEE Trans. Circuits Syst. II Express Briefs 71(5): 2579-2583 (2024) - [j279]Xin Lu, Jiangchao Wu, Zhao Wang, Yifei Xiang, Liyuan Liu, Pui-In Mak, Rui Paulo Martins, Man-Kay Law:
A 0.013 mm² 3.2-ns Input Range 10-Bit Cyclic Time-to-Digital Converter Using Gated Ring Oscillator With Phase Domain Reset in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 71(8): 3635-3639 (2024) - [j278]Zhizhan Yang, Jun Yin, Rui Paulo Martins, Pui-In Mak:
A Complementary Drain-Grounded VCO-PA Improving Transmit Efficiency Over a Wide EIRP Range. IEEE Trans. Circuits Syst. II Express Briefs 71(10): 4422-4426 (2024) - [j277]Rujian Cao, Zhongyu Zhao, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak:
An FPGA-Based Transformer Accelerator With Parallel Unstructured Sparsity Handling for Question-Answering Applications. IEEE Trans. Circuits Syst. II Express Briefs 71(11): 4688-4692 (2024) - [j276]Junde Li, Guoqiang Xin, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
A 512-nW 0.003-mm² Forward-Forward Closed Box Trainer for an Analog Voice Activity Detector in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 71(11): 4703-4707 (2024) - [j275]Io-Wa Iam, Chio-Kuan Choi, Chi-Seng Lam, Pui-In Mak, Rui Paulo Martins:
A Constant-Power and Optimal-Transfer-Efficiency Wireless Inductive Power Transfer Converter for Battery Charger. IEEE Trans. Ind. Electron. 71(1): 450-461 (2024) - [j274]Chongyao Xu, Litao Zhang, Pui-In Mak, Rui Paulo Martins, Man-Kay Law:
Fully Symmetrical Obfuscated Interconnection and Weak-PUF-Assisted Challenge Obfuscation Strong PUFs Against Machine-Learning Modeling Attacks. IEEE Trans. Inf. Forensics Secur. 19: 3927-3942 (2024) - [c285]Shuhao Fan, Qi Zhou, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A Miniaturized MRI Scanner Featuring a HighVoltage SOI ASIC for Non-Invasive Object Reconstruction and Flow Analysis. BioCAS 2024: 1-5 - [c284]Chi-Hang Chan, Minglei Zhang, Yuefeng Cao, Honazhi Zhao, Rui Paulo Martins, Yan Zhu:
The Race for the Extra Pico Second without Losing the Decibel: A Partial-Review of Single-Channel Energy-Efficient High-Speed Nyquist ADCs. CICC 2024: 1-8 - [c283]Qiujin Chen, Tian Xia, Tingxu Hu, Yuanfei Wang, Mo Huang, Rui Paulo Martins, Yan Lu:
A 1.58-nA CEPE-Based Hill-Climbing MPPT Technique with Compensated Ton Achieving 67.3% Efficiency at 10-nA Lload and > 97% MPPT Efficiency at VCR from 2 to 6. CICC 2024: 1-2 - [c282]Haoyu Gong, Wen-Liang Zeng, Mingqiang Guo, Chi-Seng Lam, Shulin Zhao, Rui Paulo Martins, Sai-Weng Sin:
A 75dB-SNDR 10MHz-BW 2-Channel Time-Interleaved Noise-Shaping SAR ADC Directly Powered by an On-Chip DC-DC Converter. CICC 2024: 1-2 - [c281]Pengyu He, Yuanzhe Zhao, Heng Xie, Yang Wang, Shouyi Yin, Li Li, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan, Minglei Zhang:
A 28nm 314.6TLFOPS/W Reconfigurable Floating-Point Analog Compute-In-Memory Macro with Exponent Approximation and Two-Stage Sharing TD-ADC. CICC 2024: 1-2 - [c280]Junwei Huang, Zhiguo Tong, Xiangyu Mao, Chi-Seng Lam, Rui Paulo Martins, Yan Lu:
A Fast-Slow Two-Module DC-DC Solution with Transient and Efficiency Improvements for 2.5D/3D Integration. CICC 2024: 1-2 - [c279]Ke Li, Xianyu Congzhou, Liang Qi, Mingqiang Guo, Rui Paulo Martins, Sai-Weng Sin:
A 160MHz-BW 68dB-SNDR 30.8mW Continuous-Time Pipeline DSM with Correlative Passive Low-Pass Filters and DAC Image Pre-Filtering. CICC 2024: 1-2 - [c278]Huihua Li, Qiaobo Ma, Yang Jiang, Rui Paulo Martins, Pui-In Mak:
A 96.7%-Efficient 2.5A Scalable DC-DC Converter Module with Complementary Dual-Mode Reconfigurable Hybrid Topology Achieving Always Inductor Current Reduction, Continuously Adjustable VCR Range, and Interleaving COUT Augmentation. CICC 2024: 1-2 - [c277]Qiaobo Ma, Huihua Li, Jiahao Shi, Yang Jiang, Rui Paulo Martins, Pui-In Mak:
A Multi-Phase Multi-Path Hybrid Buck Converter for 9-48V to 0.8-1.2V Conversion with Improved DCR-Loss Reduction and Alleviated CFLY Current Gathering Achieving 88.3% Peak Efficiency and 176A/cm3Density. CICC 2024: 1-2 - [c276]Xiangyu Mao, Junwei Huang, Zhiguo Tong, Rui Paulo Martins, Yan Lu:
A Quad-Output Hybrid Buck Converter with 8-Inductor Helping One Spot from All Quarters for Multi-Core XPUs. CICC 2024: 1-2 - [c275]Zihao Tang, Mo Huang, Rui Paulo Martins, Yan Lu:
An Emulated Peak/Valley Curve Assisted Fast-Transient Buck Converter Achieving Precise One-Cycle Charge Balance with One-Parameter Calibration. CICC 2024: 1-2 - [c274]Jiangchao Wu, Ke Hu, Xuanlin Chen, Pui-In Mak, Rui Paulo Martins, Man Kay Law:
A 0.25pJ/Comparison, 27.3μV Input Noise Dynamic Comparator Exploiting Stacked Floating Preamplifier with Cross-Coupled Feedback Inverters in 180nm CMOS. CICC 2024: 1-2 - [c273]Jiacheng Yang, Tingxu Hu, Mo Huang, Rui Paulo Martins, Yan Lu:
A 12V-to-PoL CCC-Based Easy-Scalable Multiple-Phase Hybrid Converter with Auto VCF Balancing and Inactive CF Charging. CICC 2024: 1-2 - [c272]Jian Yang, Tailong Xu, Xi Meng, Zhenghao Li, Jun Yin, Pui-In Mak, Rui Paulo Martins, Quan Pan:
A 6.0-to-6.9GHz 99fsrms-Jitter Type-II Sampling PLL with Automatic Frequency and Phase Calibration Method Achieving 0.62μs Locking Time in 28nm CMOS. CICC 2024: 1-2 - [c271]Wei Zhang, Minglei Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan:
A PVT-Robust 8b 20GS/s Time-Interleaved SAR ADC with Quantization-Embedded Current-Mode Buffer and Differ-Based Dither Timing Skew Calibration. CICC 2024: 1-2 - [c270]Guangshu Zhao, Chao Xie, Chenxi Wang, Yang Jiang, Milin Zhang, Pui-In Mak, Rui Paulo Martins, Man-Kay Law:
A 63ns Flipping Time, 93.6% Voltage Flipping Efficiency Auto-Calibrated Ultrasonic Energy Harvesting Interface from -25 to 85°C. CICC 2024: 1-2 - [c269]Ran Zhang, Ka-Fai Un, Zhensheng Li, Mingqiang Guo, Liang Qi, Rui Paulo Martins, Sai-Weng Sin:
Invited Paper: A Ping-Pong Analog Delta Generator for Delt-Sigma Computing-In-Memory SRAM Macro for Edge AI Processing. ICTA 2024: 84-87 - [c268]Jiyuan Liu, Qiaobo Ma, Yang Jiang, Rui Paulo Martins, Pui-In Mak:
Invited Paper: A Multi-Phase Multi-Ratio Resonant Switched-Capacitor DC-DC Converter with Improved Power Density. ICTA 2024: 182-185 - [c267]Ran Zhang, Ka-Fai Un, Mingqiang Guo, Liang Qi, Dengke Xu, Weibing Zhao, Rui Paulo Martins, Franco Maloberti, Sai-Weng Sin:
A Delta-Sigma-Based Computing-In-Memory Macro Targeting Edge Computation. ISCAS 2024: 1-5 - [c266]Wai-Kit Sou, Rui Paulo Martins, Chi-Seng Lam:
Model Predictive Control with Fixed Switching Frequency for Thyristor-Controlled LC-Coupling Hybrid Active Power Filter. ISIE 2024: 1-4 - [c265]Rui Luo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
3.3 A 0.5V 6.14μW Trimming-Free Single-XO Dual-Output Frequency Reference with [5.1nJ, 120μs] XO Startup and [8.1nJ, 200μs] Successive-Approximation-Based RTC Calibration. ISSCC 2024: 58-60 - [c264]Chaorui Zou, Yaozhong Ou, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan, Minglei Zhang:
6.8 A 256×192-Pixel 30fps Automotive Direct Time-of-Flight LiDAR Using 8× Current-Integrating-Based TIA, Hybrid Pulse Position/Width Converter, and Intensity/CNN-Guided 3D Inpainting. ISSCC 2024: 114-116 - [c263]Yunbo Huang, Yong Chen, Zunsong Yang, Rui Paulo Martins, Pui-In Mak:
7.4 A 0.027mm2 5.6-7.8GHz Ring-Oscillator-Based Ping-Pong Sampling PLL Scoring 220.3fsrms Jitter and -74.2dBc Reference Spur. ISSCC 2024: 130-132 - [c262]Haoran Li, Tailong Xu, Xi Meng, Jun Yin, Rui Paulo Martins, Pui-In Mak:
10.9 A 23.2-to-26GHz Sub-Sampling PLL Achieving 48.3fsrms Jitter, -253.5dB FoMJ, and 0.55μs Locking Time Based on a Function-Reused VCO-Buffer and a Type-I FLL with Rapid Phase Alignment. ISSCC 2024: 204-206 - [c261]Shuhao Fan, Qi Zhou, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
17.2 A Miniature Multi-Nuclei NMR/MRI Platform with a High-Voltage SOI ASIC Achieving a 134.4dB Image SNR with a 173×250×103μm3 Resolution. ISSCC 2024: 316-318 - [c260]Fei Tan, Wei-Han Yu, Jinhai Lin, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM. ISSCC 2024: 330-332 - [c259]Yuefeng Cao, Minglei Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan:
22.1 A 12GS/s 12b 4× Time-Interleaved Pipelined ADC with Comprehensive Calibration of TI Errors and Linearized Input Buffer. ISSCC 2024: 388-390 - [c258]Haijun Shao, Rui Paulo Martins, Pui-In Mak:
23.4 A 167 μW 71.7dB-SFDR 2.4GHz BLE Receiver Using a Passive Quadrature-Front-End, a Double-Sided Double-Balanced Cascaded Mixer and a Dual-Transformer-Coupled Class-D VCO. ISSCC 2024: 406-408 - [c257]Fangyu Mao, Rui Paulo Martins, Yan Lu:
27.1 A Differential Hybrid Class-ED Power Amplifier with 27W Maximum Power and 82% Peak E2E Efficiency for Wireless Fast Charging To-Go. ISSCC 2024: 444-446 - [c256]Qiaobo Ma, Yang Jiang, Huihua Li, Xiongjie Zhang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak:
28.3 A 12-28V to 0.6-1.8V Ratio-Regulatable Dickson SC Converter with Dual-Mode Phase Misalignment Operations Achieving 93.1% Efficiency and 6A Output. ISSCC 2024: 460-462 - [c255]Tingxu Hu, Mo Huang, Rui Paulo Martins, Yan Lu:
31.5 A 750mW, 37% Peak Efficiency Isolated DC-DC Converter with 54/18Mb/s Full-Duplex Communication Using a Single Pair of Transformers. ISSCC 2024: 504-506 - [c254]Yuanfei Wang, Mo Huang, Rui Paulo Martins, Yan Lu:
31.6 A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6% Peak Efficiency and Almost-lossless Channel Switching. ISSCC 2024: 506-508 - [c253]Guoqiang Xin, Fei Tan, Junde Li, Junren Chen, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
A 5T-SRAM Based Computing-in-Memory Macro Featuring Partial Sum Boosting and Analog Non-Uniform Quantization. MWSCAS 2024: 882-887 - [c252]Xuchu Mu, Yang Jiang, Rui Paulo Martins, Pui-In Mak:
A Fully Integrated 48-V GaN Driver Using Parallel-Multistep-Series Reconfigurable Switched-Capacitor Bank Achieving 7.7nC/mm2 On-Chip Bootstrap Driving Density. VLSI Technology and Circuits 2024: 1-2 - 2023
- [j273]Yi Chen Lee, Harikrishnan Ramiah, Alexander Choo Chia Chun, Kishore Kumar Pakkirisami Churchill, Nai Shyan Lai, Chee-Cheow Lim, Yong Chen, Pui-In Mak, Rui Paulo Martins:
High-Performance Multiband Ambient RF Energy Harvesting Front-End System for Sustainable IoT Applications - A Review. IEEE Access 11: 11143-11164 (2023) - [j272]Teck Seong Chang, Harikrishnan Ramiah, Yang Jiang, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins:
Design and Implementation of Hybrid DC-DC Converter: A Review. IEEE Access 11: 30498-30514 (2023) - [j271]Io-Wa Iam, Zhaoyi Ding, Zhicong Huang, Chi-Seng Lam, Rui Paulo Martins, Pui-In Mak:
A Flexible Rooftop Photovoltaic-Inductive Wireless Power Transfer System for Low-Voltage DC Grid. IEEE Access 11: 51117-51132 (2023) - [j270]Wen Xun Lian, Harikrishnan Ramiah, Gabriel Chong, Kishore Kumar Pakkirisami Churchill, Nai Shyan Lai, Saad Mekhilef, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A Fully-Integrated CMOS Dual-Band RF Energy Harvesting Front-End Employing Adaptive Frequency Selection. IEEE Access 11: 74121-74135 (2023) - [j269]Li Fang Lai, Harikrishnan Ramiah, Tan Yee Chyan, Nai Shyan Lai, Chee-Cheow Lim, Yong Chen, Pui-In Mak, Rui Paulo Martins:
Design Trends and Perspectives of Digital Low Dropout Voltage Regulators for Low Voltage Mobile Applications: A Review. IEEE Access 11: 85237-85258 (2023) - [j268]Jack Kee Yong, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Gabriel Chong, Saad Mekhilef, Nai Shyan Lai, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A Subthreshold Operation Series-Parallel Charge Pump Incorporating Dynamic Source-Fed Oscillator for Wide-Input-Voltage Energy Harvesting Application. IEEE Access 11: 97641-97653 (2023) - [j267]Lin Wang, Yong Chen, Chaowei Yang, Xionghui Zhou, Mei Han, Paolo Stefano Crovetti, Pui-In Mak, Rui Paulo Martins:
A 6-to-38Gb/s capture-range bang-bang clock and data recovery circuit with deliberate-current-mismatch frequency detection and interpolation-based multiphase clock generation. Int. J. Circuit Theory Appl. 51(5): 1988-2015 (2023) - [j266]Ya-Jie Wu, Ricardo Brito, Wai-Hei Choi, Chi-Seng Lam, Man-Chung Wong, Sai-Weng Sin, Rui Paulo Martins:
IoT Cloud-Edge Reconfigurable Mixed-Signal Smart Meter Platform for Arc Fault Detection. IEEE Internet Things J. 10(2): 1682-1695 (2023) - [j265]Chongyao Xu, Litao Zhang, Man-Kay Law, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins:
Modeling-Attack-Resistant Strong PUF Exploiting Stagewise Obfuscated Interconnections With Improved Reliability. IEEE Internet Things J. 10(18): 16300-16315 (2023) - [j264]Xianglong Bai, Yan Lu, Chenchang Zhan, Rui Paulo Martins:
A 6.78-MHz Wireless Power Transfer System With Inherent Wireless Phase Shift Control Without Feedback Data Sensing Coil. IEEE J. Solid State Circuits 58(6): 1746-1757 (2023) - [j263]Guigang Cai, Yan Lu, Rui Paulo Martins:
An SC-Parallel-Inductor Hybrid Buck Converter With Reduced Inductor Voltage and Current. IEEE J. Solid State Circuits 58(6): 1758-1768 (2023) - [j262]Shuhao Fan, Qi Zhou, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
A Miniaturized 3-D-MRI Scanner Featuring an HV-SOI ASIC and Achieving a 10 × 8 × 8 mm3 Field of View. IEEE J. Solid State Circuits 58(7): 2028-2039 (2023) - [j261]Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A 0.4-V 0.0294-mm2 Resistor-Based Temperature Sensor Achieving ±0.24 °C p2p Inaccuracy From40 °C to 125 °C and 385 fJ · K2 Resolution FoM in 65-nm CMOS. IEEE J. Solid State Circuits 58(9): 2543-2553 (2023) - [j260]Wenning Jiang, Yan Zhu, Chixiao Chen, Hao Xu, Qi Liu, Ming Liu, Rui Paulo Martins, Chi-Hang Chan:
A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier. IEEE J. Solid State Circuits 58(10): 2709-2721 (2023) - [j259]Shulin Zhao, Mingqiang Guo, Liang Qi, Dengke Xu, Guoxing Wang, Rui Paulo Martins, Sai-Weng Sin:
A 3.07 mW 30 MHz-BW 73.2 dB-SNDR Time- Interleaved Noise-Shaping SAR ADC With Self-Coupling Second-Order Error-Feedforward. IEEE J. Solid State Circuits 58(10): 2722-2732 (2023) - [j258]Jinhai Lin, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak:
A 47-nW Voice Activity Detector (VAD) Featuring a Short-Time CNN Feature Extractor and an RNN-Based Classifier With a Non-Volatile CAP-ROM. IEEE J. Solid State Circuits 58(11): 3020-3029 (2023) - [j257]Zixiao Lin, Yan Lu, Fangyu Mao, Chuang Wang, Rui Paulo Martins:
All Rivers Flow to the Sea: A High-Density Wireless Power Receiver With Split-Dual-Path and Hybrid-Quad-Path Step-Down Rectifying Conversion. IEEE J. Solid State Circuits 58(11): 3127-3137 (2023) - [j256]Tingxu Hu, Mo Huang, Rui Paulo Martins, Yan Lu:
A 12-to-1 Flying Capacitor Cross-Connected Buck Converter With Inserted D > 0.5 Control for Fast Transient Response. IEEE J. Solid State Circuits 58(11): 3207-3218 (2023) - [j255]Caolei Pan, Wen-Liang Zeng, Chi-Seng Lam, Sai-Weng Sin, Chenchang Zhan, Rui Paulo Martins:
A 95% Peak Efficiency Modified KY Converter With Improved Flying Capacitor Charging in DCM for IoT Applications. IEEE J. Solid State Circuits 58(11): 3219-3230 (2023) - [j254]Tingxu Hu, Mo Huang, Rui Paulo Martins, Yan Lu:
A 12-to-1 V Quad-Output Switched-Capacitor Buck Converter With Shared DC Capacitors. IEEE J. Solid State Circuits 58(12): 3492-3502 (2023) - [j253]Hongshuai Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan:
A Second-Order NS Pipelined SAR ADC With Quantization-Prediction-Unrolled Gain Error Shaping and Fully Passive Integrator. IEEE J. Solid State Circuits 58(12): 3565-3575 (2023) - [j252]Hongzhi Zhao, Minglei Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan:
A 52.5-dB 2× Time-Interleaved 2.8-GS/s SAR ADC With 5-bit/Cycle Time-Domain Quantization and a Compact Signal DAC. IEEE J. Solid State Circuits 58(12): 3586-3597 (2023) - [j251]Liwen Lin, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
An Ultra-Low-Voltage Single-Crystal Oscillator-Timer (XO-Timer) Delivering 16-MHz and 32.258-kHz Clocks for Sub-0.5-V Energy-Harvesting BLE Radios in 28-nm CMOS. IEEE Open J. Circuits Syst. 4: 126-138 (2023) - [j250]Fangyu Mao, Yan Lu, Franco Maloberti, Rui Paulo Martins:
A Hybrid Single-Inductor Bipolar Triple-Output DC-DC Converter With High-Quality Positive Outputs for AMOLED Displays. IEEE Trans. Circuits Syst. I Regul. Pap. 70(1): 506-517 (2023) - [j249]Yunbo Huang, Yong Chen, Bo Zhao, Pui-In Mak, Rui Paulo Martins:
A 3.78-GHz Type-I Sampling PLL With a Fully Passive KPD-Doubled Primary-Secondary S-PD Measuring 39.6-fsRMS Jitter, -260.2-dB FOM, and -70.96-dBc Reference Spur. IEEE Trans. Circuits Syst. I Regul. Pap. 70(4): 1463-1475 (2023) - [j248]Lin Wang, Yong Chen, Chaowei Yang, Xiaoteng Zhao, Pui-In Mak, Franco Maloberti, Rui Paulo Martins:
A 10.8-to-37.4 Gb/s Reference-Less FD-Less Single-Loop Quarter-Rate Bang-Bang Clock and Data Recovery Employing Deliberate-Current- Mismatch Wide-Frequency-Acquisition Technique. IEEE Trans. Circuits Syst. I Regul. Pap. 70(7): 2637-2650 (2023) - [j247]Xuchu Mu, Guangshu Zhao, Anyang Zhao, Yang Jiang, Man-Kay Law, Makoto Takamiya, Pui-In Mak, Rui Paulo Martins:
Floating-Domain Integrated GaN Driver Techniques for DC-DC Converters: A Review. IEEE Trans. Circuits Syst. I Regul. Pap. 70(9): 3790-3805 (2023) - [j246]Xiangyu Mao, Yan Lu, Chuang Wang, Rui Paulo Martins:
A High-Current Scalable Parallel LDO Scheme With Analog-Digital Merged Control for Small Current-Sharing Mismatch. IEEE Trans. Circuits Syst. I Regul. Pap. 70(10): 3857-3866 (2023) - [j245]Yunzhe Yang, Mo Huang, Sijun Du, Rui Paulo Martins, Yan Lu:
A Level Shifter With Almost Full Immunity to Positive dv/dt for Buck Converters. IEEE Trans. Circuits Syst. I Regul. Pap. 70(11): 4595-4604 (2023) - [j244]Lai Wei, Zihao Zheng, Nereo Markulic, Jorge Lagos, Ewout Martens, Rui Paulo Martins, Yan Zhu, Jan Craninckx, Chi-Hang Chan:
A 12-bit 1GS/s ADC With Background Distortion and Split-ADC-Like Gain Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 4679-4691 (2023) - [j243]Jack Kee Yong, Wen Xun Lian, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Gabriel Chong, Nai Shyan Lai, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A Fully Integrated CMOS Tri-Band Ambient RF Energy Harvesting System for IoT Devices. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 4705-4718 (2023) - [j242]Caolei Pan, Chenchang Zhan, Rui Paulo Martins, Chi-Seng Lam:
A Continuous-Output-Current Buck-Boost Converter Without Right-Half-Plane-Zero (RHPZ). IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 4719-4728 (2023) - [j241]Chi-Wa U, Cong Liu, Rui Paulo Martins, Chi-Seng Lam:
An 1 V Supply, 740 nW, 8.7 ppm/°C Bandgap Voltage Reference With Segmented Curvature Compensation. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 4755-4766 (2023) - [j240]Mingqiang Guo, Liang Qi, Weibing Zhao, Gang Xiao, Rui Paulo Martins, Sai-Weng Sin:
A 10b 700 MS/s Single-Channel 1b/Cycle SAR ADC Using a Monotonic-Specific Feedback SAR Logic With Power-Delay-Optimized Unbalanced N/P-MOS Sizing. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 4767-4780 (2023) - [j239]Xi Meng, Haoran Li, Peng Chen, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Analysis and Design of a 15.2-to-18.2-GHz Inverse-Class-F VCO With a Balanced Dual-Core Topology Suppressing the Flicker Noise Upconversion. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 5110-5123 (2023) - [j238]Qiaobo Ma, Xiongjie Zhang, Anyang Zhao, Huihua Li, Yang Jiang, Man-Kay Law, Makoto Takamiya, Rui Paulo Martins, Pui-In Mak:
A 10.5 W, 93% Efficient Dual-Path Hybrid (DPH)-Based DC-DC Converter Incorporating a Continuous-Current-Input Switched-Capacitor Stage and Enhanced IL Reduction for 12 V/24 V Inputs. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 5482-5495 (2023) - [j237]Arvind Singh Rawat, Jagadheswaran Rajendran, Selvakumar Mariappan, Narendra Kumar, Pui-In Mak, Rui Paulo Martins:
A 27-dBm, 0.92-GHz CMOS Power Amplifier With Mode Switching and a High-Q Compact Inductor (HQCI) Achieving a 30% Back-Off PAE. IEEE Trans. Circuits Syst. II Express Briefs 70(1): 121-125 (2023) - [j236]Zhongyu Zhao, Rujian Cao, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition Applications. IEEE Trans. Circuits Syst. II Express Briefs 70(1): 281-285 (2023) - [j235]Yunbo Huang, Yong Chen, Pui-In Mak, Rui Paulo Martins:
Universal Stability Criterion for Type-I Sampling Phase-Locked Loops. IEEE Trans. Circuits Syst. II Express Briefs 70(4): 1351-1355 (2023) - [j234]Xiangyu Mao, Yan Lu, Rui Paulo Martins:
A 1-A Switching LDO With 40-mV Dropout Voltage and Fast DVS. IEEE Trans. Circuits Syst. II Express Briefs 70(9): 3454-3458 (2023) - [j233]Alexander Choo Chia Chun, Yi Chen Lee, Harikrishnan Ramiah, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A High-PCE Range-Extension CMOS Rectifier Employing Advanced Topology Amalgamation Technique for Ambient RF Energy Harvesting. IEEE Trans. Circuits Syst. II Express Briefs 70(10): 3747-3751 (2023) - [j232]Junlin Zhong, Xiaofeng Yang, Rui Paulo Martins, Yan Zhu, Chi-Hang Chan:
A 0.016mm2 Active Area 4GHz Fully Ring-Oscillator-Based Cascaded Fractional-N PLL With Burst-Mode Sampling. IEEE Trans. Circuits Syst. II Express Briefs 70(10): 3792-3796 (2023) - [j231]Chengyu Che, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A 0.4-V 8400-μm2 Voltage Reference in 65-nm CMOS Exploiting Well-Proximity Effect. IEEE Trans. Circuits Syst. II Express Briefs 70(10): 3822-3826 (2023) - [j230]Chon-Fai Lee, Chi-Wa U, Rui Paulo Martins, Chi-Seng Lam:
A 0.5V 22.5ppm/°C Bandgap Voltage Reference With Leakage Current Injection for Curvature Correction. IEEE Trans. Circuits Syst. II Express Briefs 70(10): 3897-3901 (2023) - [j229]Yunbo Huang, Yong Chen, Kaiyuan Yang, Paolo Crovetti, Pui-In Mak, Rui Paulo Martins:
A 28-nm 368-fJ/Cycle, 0.43%/V Supply-Sensitivity, FLL-Based RC Oscillator Featuring Positive-TC-Only Resistors and ΔΣM-Based Trimming. IEEE Trans. Circuits Syst. II Express Briefs 70(11): 3950-3954 (2023) - [j228]Zihan Yang, Mo Huang, Yan Lu, Rui Paulo Martins:
Relative Stability Analysis of Multi-Loop Low Dropout Regulators Using a Sub-Loop Superposition Method. IEEE Trans. Circuits Syst. II Express Briefs 70(11): 3968-3972 (2023) - [j227]Chongyao Xu, Jieyun Zhang, Man-Kay Law, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins:
Transfer-Path-Based Hardware-Reuse Strong PUF Achieving Modeling Attack Resilience With200 Million Training CRPs. IEEE Trans. Inf. Forensics Secur. 18: 2188-2203 (2023) - [j226]Yunbo Huang, Yong Chen, Bo Zhao, Pui-In Mak, Rui Paulo Martins:
A 3.6-GHz Type-II Sampling PLL With a Differential Parallel-Series Double-Edge S-PD Scoring 43.1-fsRMSJitter, -258.7-dB FOM, and -75.17-dBc Reference Spur. IEEE Trans. Very Large Scale Integr. Syst. 31(2): 188-198 (2023) - [j225]Alexander Choo Chia Chun, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Saad Mekhilef, Pui-In Mak, Rui Paulo Martins:
A High-Performance Dual-Topology CMOS Rectifier With 19.5-dB Power Dynamic Range for RF-Based Hybrid Energy Harvesting. IEEE Trans. Very Large Scale Integr. Syst. 31(8): 1253-1257 (2023) - [j224]Kishore Kumar Pakkirisami Churchill, Harikrishnan Ramiah, Alexander Choo Chia Chun, Gabriel Chong, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A Reconfigurable CMOS Stack Rectifier With 22.8-dB Dynamic Range Achieving 47.91% Peak PCE for IoT/WSN Application. IEEE Trans. Very Large Scale Integr. Syst. 31(10): 1619-1623 (2023) - [c251]Shengnan Zhou, Xiangyu Mao, Cheng Huang, Rui Paulo Martins, Yan Lu:
A 23-nA Quiescent Current Output-Capacitorless LDO Regulator for IoT Devices. ASICON 2023: 1-4 - [c250]Qiaobo Ma, Huihua Li, Xiongjie Zhang, Anyang Zhao, Yang Jiang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak:
A Cross-Coupled Hybrid SC Converter with Extended VCR Range and Intrinsic Loss Balance Achieving 90% Average Efficiency with 1.5% Variation Over Full Li-ion Battery Input Range and 0.95A/mm2 Peak Current Density. A-SSCC 2023: 1-3 - [c249]Jiangchao Wu, Guangshu Zhao, Litao Zhang, Yu Jia, Yang Jiang, Pui-In Mak, Rui Paulo Martins, Man Kay Law:
Fully Integrated Reconfigurable Solar Energy Harvester for $100\mu\mathrm{A}$ Burst Output Current Delivery with 78.6% Peak Energy Extraction Efficiency and Minimum Startup Incident Light Power of 0.27mW/cm2. A-SSCC 2023: 1-3 - [c248]Ruiqi Gao, Mingqiang Guo, Sai-Weng Sin, Liang Qi, Biao Wang, Guoxing Wang, Rui Paulo Martins:
Weightings in Incremental ADCs: A Tutorial Review. CICC 2023: 1-8 - [c247]Junwei Huang, Zhiguo Tong, Yan Lu, Chi-Seng Lam, Rui Paulo Martins:
A 5V-to-0.5V Inductor-First Inductor-on-Ground Switched Capacitor Multi-Path Hybrid DC-DC Converter. CICC 2023: 1-2 - [c246]Xiang-Hui Pan, Buhui Rui, Yuefeng Cao, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A 12b 1GS/s ADC with Lightweight Input Buffer Distortion Background Calibration Achieving >75dB SFDR over PVT. CICC 2023: 1-2 - [c245]ZiXuan Xu, Kai Xing, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
An ELDC-Free 2.78mW 20MHz-BW 75.5dB-SNDR 4th- Order CTSDM Facilitated by 2nd-Order CT NS-SAR and AC-Coupled Negative-R. CICC 2023: 1-2 - [c244]Yuanzhe Zhao, Minglei Zhang, Pengyu He, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A Double-Mode Sparse Compute-In-Memory Macro with Reconfigurable Single and Dual Layer Computation. CICC 2023: 1-2 - [c243]Rui Paulo Martins:
Analog and Mixed-Signal CMOS Circuits: The emergence and leadership of a Lab, a reference Book and the future at the core of the A/D Interface in the IoE. ESSCIRC 2023: 465-468 - [c242]Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
Simple-Logic Comparator-Offset Mitigation Technique for Resistor-Based Temperature Sensor in DFLL. ICTA 2023: 1-2 - [c241]Yunbo Huang, Yong Chen, Chaowei Yang, Pui-In Mak, Rui Paulo Martins:
A 9.97-GHz 190.6-dBc/Hz FOM CMOS VCO Featuring Nested Common-Mode Resonator and Intrinsic Differential 2nd-Harmonic Output. ISCAS 2023: 1-5 - [c240]Haihua Li, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
A 12/13.56MHz Crystal Oscillator with Binary-Search-Assisted Two-Step Injection Achieving 5.0nJ Startup Energy and 45.8μs Startup Time. ISSCC 2023: 64-65 - [c239]Xiangxun Zhan, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A 22.4-to-26.8GHz Dual-Path-Synchronized Quad-Core Oscillator Achieving -138dBc/Hz PN and 193.3dBc/Hz FoM at 10MHz Offset from 25.8GHz. ISSCC 2023: 148-149 - [c238]Hao Guo, Yong Chen, Yunbo Huang, Pui-In Mak, Rui Paulo Martins:
An 83.3-to-104.7GHz Harmonic-Extraction VCO Incorporating Multi-Resonance, Multi-Core, and Multi-Mode (3M) Techniques Achieving -124dBc/Hz Absolute PN and 190.7dBc/Hz $\text{FoM}_{\mathrm{T}}$. ISSCC 2023: 152-153 - [c237]Junyan Hao, Minglei Zhang, Yanbo Zhang, Shubin Liu, Zhangming Zhu, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A Single-Channel 2.6GS/s 10b Dynamic Pipelined ADC with Time-Assisted Residue Generation Scheme Achieving Intrinsic PVT Robustness. ISSCC 2023: 168-169 - [c236]Yuefeng Cao, Minglei Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A Single-Channel 12b 2GS/s PVT-Robust Pipelined ADC with Critically Damped Ring Amplifier and Time-Domain Quantizer. ISSCC 2023: 170-171 - [c235]Hongshuai Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A 25MHz-BW 77.2dB-SNDR 2nd-Order Gain-Error-Shaping and NS Pipelined SAR ADC Based on a Quantization-Prediction-Unrolled Scheme. ISSCC 2023: 174-175 - [c234]Yanbo Zhang, Junyan Hao, Shubin Liu, Zhangming Zhu, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A Single-Channel 70dB-SNDR 100MHz-BW 4th-Order Noise-Shaping Pipeline SAR ADC with Residue Amplifier Error Shaping. ISSCC 2023: 178-179 - [c233]Tingxu Hu, Mo Huang, Yan Lu, Rui Paulo Martins:
A 12V-to-1V Quad-Output Switched-Capacitor Buck Converter with Shared DC Capacitors Achieving 90.4% Peak Efficiency and 48mA/mm3 Power Density at 85% Efficiency. ISSCC 2023: 184-185 - [c232]Zhiguo Tong, Junwei Huang, Yan Lu, Rui Paulo Martins:
A 42W Reconfigurable Bidirectional Power Delivery Voltage-Regulating Cable. ISSCC 2023: 192-193 - [c231]Guigang Cai, Yan Lu, Rui Paulo Martins:
A Compact 12V-to-1V 91.8% Peak Efficiency Hybrid Resonant Switched-Capacitor Parallel Inductor (ReSC-PL) Buck Converter. ISSCC 2023: 198-199 - [c230]Wen-Liang Zeng, Guigang Cai, Chon-Fai Lee, Chi-Seng Lam, Yan Lu, Sai-Weng Sin, Rui Paulo Martins:
A 12V-lnput 1V-1.8V-Output 93.7% Peak Efficiency Dual-Inductor Quad-Path Hybrid DC-DC Converter. ISSCC 2023: 200-201 - [c229]Jinhai Lin, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A 47nW Mixed-Signal Voice Activity Detector (VAD) Featuring a Non-Volatile Capacitor-ROM, a Short-Time CNN Feature Extractor and an RNN Classifier. ISSCC 2023: 214-215 - [c228]Hongzhi Zhao, Minglei Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A 2x-lnterleaved 9b 2.8G8S/s 5b/cycle SAR ADC with Linearized Configurable V2T Buffer Achieving >50dB SNDR at 3GHz Input. ISSCC 2023: 264-265 - [c227]Yuanfei Wang, Mo Huang, Yan Lu, Rui Paulo Martins:
A Continuously Scalable-Conversion-Ratio SC Converter with Reconfigurable VCF Step for High Efficiency over an Extended VCR Range. ISSCC 2023: 450-451 - [c226]Zhizhan Yang, Jun Yin, Wei-Han Yu, Haochen Zhang, Pui-In Mak, Rui Paulo Martins:
A ULP Long-Range Active-RF Tag with Automatic Antenna-Interface Calibration Achieving 20.5% TX Efficiency at -22dBm EIRP, and -60.4dBm Sensitivity at 17.8nW RX Power. ISSCC 2023: 470-471 - [c225]Minglei Zhang, Yuefeng Cao, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A 79.5dB-SNDR Pipelined-SAR ADC with a Linearity-Shifting 32× Dynamic Amplifier and Mounted-Over-Die Bypass Capacitors. VLSI Technology and Circuits 2023: 1-2 - [c224]Xiongjie Zhang, Qiaobo Ma, Anyang Zhao, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A 0.05-to-3.1A 585mA/mm3 97.3%-Efficiency Outphase Switched-Capacitor Hybrid Buck Converter with Relieved Capacitor Inrush Current and COUT-Free Operation. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j223]Mikki How-Wen Loo, Harikrishnan Ramiah, Ka-Meng Lei, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins:
Fully-Integrated Timers for Ultra-Low-Power Internet-of-Things Nodes - Fundamentals and Design Techniques. IEEE Access 10: 65936-65950 (2022) - [j222]Tan Yee Chyan, Harikrishnan Ramiah, Sharifah Wan Muhamad Hatta, Nai Shyan Lai, Chee-Cheow Lim, Yong Chen, Pui-In Mak, Rui Paulo Martins:
Evaluation and Perspective of Analog Low-Dropout Voltage Regulators: A Review. IEEE Access 10: 114469-114489 (2022) - [j221]Tian Siang Ho, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins:
Low Voltage Switched-Capacitive-Based Reconfigurable Charge Pumps for Energy Harvesting Systems: An Overview. IEEE Access 10: 126910-126930 (2022) - [j220]Haijun Shao, Gengzhen Qi, Pui-In Mak, Rui Paulo Martins:
A 1.7-3.6 GHz 20 MHz-Bandwidth Channel-Selection N-Path Passive-LNA Using a Switched-Capacitor-Transformer Network Achieving 23.5 dBm OB-IIP₃ and 3.4-4.8 dB NF. IEEE J. Solid State Circuits 57(2): 413-422 (2022) - [j219]Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.0285-mm2 0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS. IEEE J. Solid State Circuits 57(2): 546-561 (2022) - [j218]Yanbo Zhang, Jin Zhang, Shubin Liu, Ruixue Ding, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A 20 MHz Bandwidth 79 dB SNDR SAR-Assisted Noise-Shaping Pipeline ADC With Gain and Offset Calibrations. IEEE J. Solid State Circuits 57(3): 745-756 (2022) - [j217]Xiaoteng Zhao, Yong Chen, Lin Wang, Pui-In Mak, Franco Maloberti, Rui Paulo Martins:
A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR With a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS. IEEE J. Solid State Circuits 57(5): 1358-1371 (2022) - [j216]Hongshuai Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
An Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC With Code-Counter-Based Offset Calibration. IEEE J. Solid State Circuits 57(5): 1480-1491 (2022) - [j215]Zihao Zheng, Lai Wei, Jorge Lagos, Ewout Martens, Yan Zhu, Chi-Hang Chan, Jan Craninckx, Rui Paulo Martins:
A 3.3-GS/s 6-b Fully Dynamic Pipelined ADC With Linearized Dynamic Amplifier. IEEE J. Solid State Circuits 57(6): 1673-1683 (2022) - [j214]Xiangyu Mao, Yan Lu, Rui Paulo Martins:
A Scalable High-Current High-Accuracy Dual-Loop Four-Phase Switching LDO for Microprocessors. IEEE J. Solid State Circuits 57(6): 1841-1853 (2022) - [j213]Fangyu Mao, Yan Lu, Rui Paulo Martins:
A Reconfigurable Single-Stage Asymmetrical Full-Wave Step-Down Rectifier for Bidirectional Device-to-Device Wireless Fast Charging. IEEE J. Solid State Circuits 57(6): 1888-1898 (2022) - [j212]Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
Arithmetic Progression Switched-Capacitor DC-DC Converter Topology With Soft VCR Transitions and Quasi-Symmetric Two-Phase Charge Delivery. IEEE J. Solid State Circuits 57(10): 2919-2933 (2022) - [j211]Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A 108-nW 0.8-mm2 Analog Voice Activity Detector Featuring a Time-Domain CNN With Sparsity-Aware Computation and Sparsified Quantization in 28-nm CMOS. IEEE J. Solid State Circuits 57(11): 3288-3297 (2022) - [j210]Haijun Shao, Pui-In Mak, Gengzhen Qi, Rui Paulo Martins:
A 266-μW Bluetooth Low-Energy (BLE) Receiver Featuring an N-Path Passive Balun-LNA and a Pipeline Down-Mixing BB-Extraction Scheme Achieving 77-dB SFDR and -3-dBm OOB-B-1 dB. IEEE J. Solid State Circuits 57(12): 3669-3680 (2022) - [j209]Kishore Kumar Pakkirisami Churchill, Harikrishnan Ramiah, Gabriel Chong, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A Fully-Integrated Ambient RF Energy Harvesting System with 423-μW Output Power. Sensors 22(12): 4415 (2022) - [j208]Chi-Wa U, Man-Kay Law, Chi-Seng Lam, Rui Paulo Martins:
Switched-Capacitor Bandgap Voltage Reference for IoT Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 16-29 (2022) - [j207]Peng Chen, Xi Meng, Jun Yin, Pui-In Mak, Rui Paulo Martins, Robert Bogdan Staszewski:
A 529-μW Fractional-N All-Digital PLL Using TDC Gain Auto-Calibration and an Inverse-Class-F DCO in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 51-63 (2022) - [j206]Kai Xing, Wei Wang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A Single-Opamp Third Order CT ΔΣ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 64-74 (2022) - [j205]Hao Guo, Yong Chen, Chaowei Yang, Pui-In Mak, Rui Paulo Martins:
A Millimeter-Wave CMOS VCO Featuring a Mode-Ambiguity-Aware Multi-Resonant-RLCM Tank. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 172-185 (2022) - [j204]Peng Chen, Jun Yin, Feifei Zhang, Pui-In Mak, Rui Paulo Martins, Robert Bogdan Staszewski:
Mismatch Analysis of DTCs With an Improved BIST-TDC in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 196-206 (2022) - [j203]Haijun Shao, Gengzhen Qi, Pui-In Mak, Rui Paulo Martins:
A Low-Power Multiband Blocker-Tolerant Receiver With a Steep Filtering Slope Using an N-Path LNA With Feedforward OB Blocker Cancellation and Filtering-by-Aliasing Baseband Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 220-231 (2022) - [j202]Jieyun Zhang, Chongyao Xu, Man-Kay Law, Yang Jiang, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins:
A 4T/Cell Amplifier-Chain-Based XOR PUF With Strong Machine Learning Attack Resilience. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 366-377 (2022) - [j201]Shuhao Fan, Qi Zhou, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
Miniaturization of a Nuclear Magnetic Resonance System: Architecture and Design Considerations of Transceiver Integrated Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 69(8): 3049-3060 (2022) - [j200]Chuang Wang, Yan Lu, Rui Paulo Martins:
A Highly Integrated Tri-Path Hybrid Buck Converter With Reduced Inductor Current and Self-Balanced Flying Capacitor Voltage. IEEE Trans. Circuits Syst. I Regul. Pap. 69(9): 3841-3850 (2022) - [j199]Tingxu Hu, Mo Huang, Yan Lu, Rui Paulo Martins:
A Capacitor-Cross-Connected Boost Converter With Duty Cycle < 0.5 Control for Extended Conversion-Ratio and Soft Start-Up. IEEE Trans. Circuits Syst. I Regul. Pap. 69(10): 4272-4283 (2022) - [j198]Xiangyu Mao, Yan Lu, Rui Paulo Martins:
A 1.2-A Calibration-Free Hybrid LDO With In-Loop Quantization and Auxiliary Constant Current Control Achieving High Accuracy and Fast DVS. IEEE Trans. Circuits Syst. I Regul. Pap. 69(11): 4443-4452 (2022) - [j197]Chuang Wang, Yan Lu, Xiuping Li, Rui Paulo Martins:
A Dual-Branch Series-Parallel Hybrid Buck DC-DC Converter With Flying Capacitor Voltage Auto-Balancing. IEEE Trans. Circuits Syst. I Regul. Pap. 69(12): 4741-4750 (2022) - [j196]Junwei Huang, Chi-Seng Lam, Yan Lu, Rui Paulo Martins:
A Symmetrical Double Step-Down Converter With Extended Voltage Conversion Ratio. IEEE Trans. Circuits Syst. I Regul. Pap. 69(12): 4761-4773 (2022) - [j195]Tailong Xu, Shenke Zhong, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A 6-to-7.5-GHz 54-fsrms Jitter Type-II Reference-Sampling PLL Featuring a Gain-Boosting Phase Detector for In-Band Phase-Noise Reduction. IEEE Trans. Circuits Syst. I Regul. Pap. 69(12): 4774-4786 (2022) - [j194]Yu Duan, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
Supply-Noise-Desensitized Techniques for Low Jitter RO-Based PLL Achieving ≤1.6 ps RMS Jitter Within Full-Spectrum Supply Interference. IEEE Trans. Circuits Syst. I Regul. Pap. 69(12): 4799-4809 (2022) - [j193]Jiahao Liu, Yuanzhe Zhao, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A Weak PUF-Assisted Strong PUF With Inherent Immunity to Modeling Attacks and Ultra-Low BER. IEEE Trans. Circuits Syst. I Regul. Pap. 69(12): 4898-4907 (2022) - [j192]Jiahao Liu, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
An Entropy-Source-Preselection-Based Strong PUF With Strong Resilience to Machine Learning Attacks and High Energy Efficiency. IEEE Trans. Circuits Syst. I Regul. Pap. 69(12): 5108-5120 (2022) - [j191]Mingqiang Guo, Sai-Weng Sin, Liang Qi, Dengke Xu, Guoxing Wang, Rui Paulo Martins:
Background Timing Mismatch Calibration Techniques in High-Speed Time-Interleaved ADCs: A Tutorial Review. IEEE Trans. Circuits Syst. II Express Briefs 69(6): 2564-2569 (2022) - [j190]Liang Qi, Yuekai Liu, Sai-Weng Sin, Xinpeng Xing, Guoxing Wang, Maurits Ortmanns, Rui Paulo Martins:
Wideband Continuous-Time MASH Delta-Sigma Modulators: A Tutorial Review. IEEE Trans. Circuits Syst. II Express Briefs 69(6): 2623-2628 (2022) - [j189]Man-Kay Law, Yang Jiang, Pui-In Mak, Rui Paulo Martins:
Miniaturized Energy Harvesting Systems Using Switched-Capacitor DC-DC Converters. IEEE Trans. Circuits Syst. II Express Briefs 69(6): 2629-2634 (2022) - [j188]Yong Chen, Pui-In Mak, Rui Paulo Martins:
High-Performance Harmonic-Rich Single-Core VCO With Multi-LC Tank: A Tutorial. IEEE Trans. Circuits Syst. II Express Briefs 69(7): 3115-3121 (2022) - [j187]Jack Kee Yong, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Gabriel Chong, Saad Mekhilef, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.1-V VIN Subthreshold 3-Stage Dual-Branch Charge Pump With 43.4% Peak Power Conversion Efficiency Using Advanced Dynamic Gate-Bias. IEEE Trans. Circuits Syst. II Express Briefs 69(9): 3929-3933 (2022) - [j186]Lei Xuan, Ka-Fai Un, Chi-Seng Lam, Rui Paulo Martins:
An FPGA-Based Energy-Efficient Reconfigurable Depthwise Separable Convolution Accelerator for Image Recognition. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 4003-4007 (2022) - [j185]Ya-Jie Wu, Wai-Hei Choi, Chi-Seng Lam, Man-Chung Wong, Sai-Weng Sin, Rui Paulo Martins:
An FPGA-Based Self-Reconfigurable Arc Fault Detection System for Smart Meters. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 4133-4137 (2022) - [j184]Sibo Wen, Wen-Liang Zeng, Chi-Seng Lam, Franco Maloberti, Rui Paulo Martins:
An Analog Multiplier Controlled Buck-Boost Converter. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 4173-4177 (2022) - [j183]Zunsong Yang, Yong Chen, Jia Yuan, Pui-In Mak, Rui Paulo Martins:
A 3.3-GHz Integer N-Type-II Sub-Sampling PLL Using a BFSK-Suppressed Push-Pull SS-PD and a Fast-Locking FLL Achieving -82.2-dBc REF Spur and -255-dB FOM. IEEE Trans. Very Large Scale Integr. Syst. 30(2): 238-242 (2022) - [j182]Alexander Choo Chia Chun, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Saad Mekhilef, Pui-In Mak, Rui Paulo Martins:
A Reconfigurable CMOS Rectifier With 14-dB Power Dynamic Range Achieving >36-dB/mm2 FoM for RF-Based Hybrid Energy Harvesting. IEEE Trans. Very Large Scale Integr. Syst. 30(10): 1533-1537 (2022) - [j181]Wen Xun Lian, Harikrishnan Ramiah, Gabriel Chong, Kishore Kumar Pakkirisami Churchill, Nai Shyan Lai, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A -20-dBm Sensitivity RF Energy-Harvesting Rectifier Front End Using a Transformer IMN. IEEE Trans. Very Large Scale Integr. Syst. 30(11): 1808-1812 (2022) - [c223]Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
Design and Implementation of a Low Power Switched-Capacitor-Based Analog Feature Extractor for Voice Keyword Spotting. APCCAS 2022: 1-5 - [c222]Yu Lei, Qishen Fang, Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
High Linearity BJT-Based Time-Domain CMOS Temperature Sensor. APCCAS 2022: 153-156 - [c221]Huihua Li, Qiaobo Ma, Xuchu Mu, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
Adaptive Line-Transient Enhancement Techniques for Dual-Path Hybrid Converter Achieving Ultra-Low Output Overshoot/Undershoot. APCCAS 2022: 319-323 - [c220]Lele Fang, Jiahao Liu, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
LSB-Reused Protection Technique in Secure SAR ADC against Power Side-Channel Attack. AsianHOST 2022: 1-6 - [c219]Mingqiang Guo, Sai-Weng Sin, Liang Qi, Gang Xiao, Rui Paulo Martins:
A 10b 700MS/s single-channel 1b/cycle SAR ADC using a monotonic-specific feedback SAR logic with power-delay-optimized unbalanced N/P-MOS sizing. CICC 2022: 1-2 - [c218]Zixiao Lin, Yan Lu, Fangyu Mao, Chuang Wang, Rui Paulo Martins:
All Rivers Flow to the Sea: A High Power Density Wireless Power Receiver with Split-Dual-Path Rectification and Hybrid-Quad-Path Step-Down Conversion. CICC 2022: 1-2 - [c217]Lin Wang, Yong Chen, Chaowei Yang, Xiaoteng Zhao, Pui-In Mak, Franco Maloberti, Rui Paulo Martins:
A 10.8-to-37.4Gb/s Single-Loop Quarter-Rate BBCDR Without External Reference and Separate FD Featuring a Wide-Frequency-Acquisition Scheme. ICECS 2022 2022: 1-4 - [c216]Ruijie Zhao, Xiongjie Zhang, Xuchu Mu, Huihua Li, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A Switched-Capacitor Hybrid Quadratic Buck Converter for 48V-Input Wide-Range Conversion. ICECS 2022 2022: 1-2 - [c215]Ke Li, Sai-Weng Sin, Liang Qi, Weibing Zhao, Guoxing Wang, Rui Paulo Martins:
A Robust Hybrid CT/DT 0-2 MASH DSM with Passive Noise-Shaping SAR ADC. ISCAS 2022: 551-555 - [c214]Yi Zeng, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
An Auxiliary-Loop-Enhanced Fast-Transient FVF LDO as Reference Buffer of a SAR ADC. ISCAS 2022: 2660-2664 - [c213]Chuang Wang, Zixiao Lin, Yan Lu, Xiuping Li, Rui Paulo Martins:
A Hybrid Boost Converter with Regulated Flying Capacitor Voltage and Reduced Inductor Current for LED Lighting. ISCAS 2022: 2900-2904 - [c212]Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A 108nW 0.8mm2 Analog Voice Activity Detector (VAD) Featuring a Time-Domain CNN as a Programmable Feature Extractor and a Sparsity-Aware Computational Scheme in 28nm CMOS. ISSCC 2022: 1-3 - [c211]Tingxu Hu, Mo Huang, Yan Lu, Rui Paulo Martins:
A 4A 12-to-1 Flying Capacitor Cross-Connected DC-DC Converter with Inserted D>0.5 Control Achieving >2x Transient Inductor Current Slew Rate and 0.73× Theoretical Minimum Output Undershoot of DSD. ISSCC 2022: 1-3 - [c210]Guigang Cai, Yan Lu, Rui Paulo Martins:
A Battery-Input Sub-1V Output 92.9% Peak Efficiency 0.3A/mm2 Current Density Hybrid SC-Parallel-Inductor Buck Converter with Reduced Inductor Current in 65nm CMOS. ISSCC 2022: 312-314 - [c209]Haijun Shao, Pui-In Mak, Gengzhen Qi, Rui Paulo Martins:
A 266µW Bluetooth Low-Energy (BLE) Receiver Featuring an N-Path Passive Balun-LNA and a Pipeline Down-Mixing BB-Extraction Scheme Achieving 77dB SFDR and -3dBm OOB-B-1dB. ISSCC 2022: 400-402 - [c208]Xuchu Mu, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
Design Challenges and Considerations of Non-isolated Gate Driver for GaN-based Converters. MWSCAS 2022: 1-4 - [c207]Yi Zeng, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
A low dropout regulator with PSR under -48dB up to 20GHz for a SARADC reference buffer. MWSCAS 2022: 1-4 - [c206]Xinyi Ge, Yong Chen, Lin Wang, Nan Qi, Pui-In Mak, Rui Paulo Martins:
A 28-Gb/s 13.8-mW Half-Rate Bang-Bang Clock and Data Recovery Circuit Using Return-to-Zero-Based Symmetrical Bang-Bang Phase Detector. NorCAS 2022: 1-7 - [c205]Xiongjie Zhang, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
Modelling and Analysis of ΔΣ-Modulation-Based Output Spectrum Spur Reduction in Dual-Path Hybrid DC-DC Converters. PRIME 2022: 269-272 - 2021
- [j180]Lingshan Kong, Yong Chen, Haohong Yu, Chirn Chye Boon, Pui-In Mak, Rui Paulo Martins:
Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering Gain-Tuning Technique. IEEE Access 9: 35814-35823 (2021) - [j179]Xiongjie Zhang, Qiaobo Ma, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A 12V-to-1V switched-capacitor-assisted hybrid converter with dual-path charge conduction and zero-voltage switching. IEICE Electron. Express 18(22): 20210382 (2021) - [j178]Qiaobo Ma, Xiongjie Zhang, Yang Jiang, Katsuhiro Hata, Makoto Takamiya, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A multi-path switched-capacitor-inductor hybrid DC-DC converter with reduced inductor loss and extended voltage conversion range. IEICE Electron. Express 18(22): 20210405 (2021) - [j177]Rui Paulo Martins, Pui-In Mak, Chi-Hang Chan, Jun Yin, Yan Zhu, Yong Chen, Yan Lu, Man-Kay Law, Sai-Weng Sin:
Bird's-eye view of analog and mixed-signal chips for the 21st century. Int. J. Circuit Theory Appl. 49(3): 746-761 (2021) - [j176]Yan Song, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A 40-MHz Bandwidth 75-dB SNDR Partial-Interleaving SAR-Assisted Noise-Shaping Pipeline ADC. IEEE J. Solid State Circuits 56(6): 1772-1783 (2021) - [j175]Mo Huang, Yan Lu, Tingxu Hu, Rui Paulo da Silva Martins:
A Hybrid Boost Converter With Cross-Connected Flying Capacitors. IEEE J. Solid State Circuits 56(7): 2102-2112 (2021) - [j174]Dongyang Jiang, Liang Qi, Sai-Weng Sin, Franco Maloberti, Rui Paulo Martins:
A Time-Interleaved 2nd-Order ΔΣ Modulator Achieving 5-MHz Bandwidth and 86.1-dB SNDR Using Digital Feed-Forward Extrapolation. IEEE J. Solid State Circuits 56(8): 2375-2387 (2021) - [j173]Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
A 0.35-V 5, 200-μm2 2.1-MHz Temperature-Resilient Relaxation Oscillator With 667 fJ/Cycle Energy Efficiency Using an Asymmetric Swing-Boosted RC Network and a Dual-Path Comparator. IEEE J. Solid State Circuits 56(9): 2701-2710 (2021) - [j172]Fangyu Mao, Yan Lu, Edoardo Bonizzoni, Filippo Boera, Mo Huang, Franco Maloberti, Rui Paulo Martins:
A Hybrid Single-Inductor Bipolar-Output DC-DC Converter With Floating Negative Output for AMOLED Displays. IEEE J. Solid State Circuits 56(9): 2760-2769 (2021) - [j171]Jie Lin, Yan Lu, Chenchang Zhan, Rui Paulo Martins:
A Single-Stage Dual-Output Regulating Rectifier With Hysteretic Current-Wave Modulation. IEEE J. Solid State Circuits 56(9): 2770-2780 (2021) - [j170]Zhaobo Zhang, Chenchang Zhan, Man-Kay Law, Yang Jiang, Pui-In Mak, Rui Paulo Martins:
A High-Efficiency Dual-Antenna RF Energy Harvesting System Using Full-Energy Extraction With Improved Input Power Response. IEEE Open J. Circuits Syst. 2: 436-444 (2021) - [j169]Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery (BBCDR) Circuit in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 68(1): 89-102 (2021) - [j168]Wenning Jiang, Yan Zhu, Chi-Hang Chan, Boris Murmann, Rui Paulo Martins:
A 7-bit 2 GS/s Time-Interleaved SAR ADC With Timing Skew Calibration Based on Current Integrating Sampler. IEEE Trans. Circuits Syst. I Regul. Pap. 68(2): 557-568 (2021) - [j167]Zunsong Yang, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.003-mm2 440fsRMS-Jitter and -64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 68(6): 2307-2316 (2021) - [j166]Chuang Wang, Yan Lu, Nan Sun, Rui Paulo Martins:
A 3-Phase Resonant Switched-Capacitor Converter for Data Center 48-V Rack Power Distribution. IEEE Trans. Circuits Syst. I Regul. Pap. 68(6): 2714-2724 (2021) - [j165]Mo Huang, Yan Lu, Rui Paulo Martins:
Review of Analog-Assisted-Digital and Digital-Assisted-Analog Low Dropout Regulators. IEEE Trans. Circuits Syst. II Express Briefs 68(1): 24-29 (2021) - [j164]Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
Startup Time and Energy-Reduction Techniques for Crystal Oscillators in the IoT Era. IEEE Trans. Circuits Syst. II Express Briefs 68(1): 30-35 (2021) - [j163]Selvakumar Mariappan, Jagadheswaran Rajendran, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, Rui Paulo Martins:
An 800 MHz-to-3.3 GHz 20-MHz Channel Bandwidth WPD CMOS Power Amplifier For Multiband Uplink Radio Transceivers. IEEE Trans. Circuits Syst. II Express Briefs 68(4): 1178-1182 (2021) - [j162]Gabriel Chong, Harikrishnan Ramiah, Jun Yin, Jagadheswaran Rajendran, Pui-In Mak, Rui Paulo Martins:
A Wide-PCE-Dynamic-Range CMOS Cross-Coupled Differential-Drive Rectifier for Ambient RF Energy Harvesting. IEEE Trans. Circuits Syst. II Express Briefs 68(6): 1743-1747 (2021) - [j161]Chuang Wang, Yan Lu, Rui Paulo Martins:
A Highly Integrated 3-Phase 4: 1 Resonant Switched-Capacitor Converter With Parasitic Loss Reduction and Fast Pre-Charge Startup. IEEE Trans. Circuits Syst. II Express Briefs 68(7): 2608-2612 (2021) - [j160]Yunbo Huang, Yong Chen, Hailong Jiao, Pui-In Mak, Rui Paulo Martins:
A 3.36-GHz Locking-Tuned Type-I Sampling PLL With -78.6-dBc Reference Spur Merging Single-Path Reference-Feedthrough-Suppression and Narrow-Pulse-Shielding Techniques. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3093-3097 (2021) - [j159]Yuanfei Wang, Mo Huang, Ping Luo, Yan Lu, Rui Paulo Martins:
Adaptive Maximum Power Point Tracking With Model-Based Negative Feedback Control and Improved V-f Model. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3103-3107 (2021) - [j158]Shiheng Yang, Jun Yin, Tailong Xu, Taimo Yi, Pui-In Mak, Qiang Li, Rui Paulo Martins:
A 600-μm² Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3108-3112 (2021) - [j157]Jixuan Li, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
An FPGA-Based Energy-Efficient Reconfigurable Convolutional Neural Network Accelerator for Object Recognition Applications. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3143-3147 (2021) - [j156]Selvakumar Mariappan, Jagadheswaran Rajendran, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 1.7-to-2.7GHz 35-38% PAE Multiband CMOS Power Amplifier Employing a Digitally-Assisted Analog Pre-Distorter (DAAPD) Reconfigurable Linearization Technique. IEEE Trans. Circuits Syst. II Express Briefs 68(11): 3381-3385 (2021) - [j155]Jiangchao Wu, Hou-Man Leong, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A Fully Integrated 10-V Pulse Driver Using Multiband Pulse-Frequency Modulation in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 29(9): 1665-1669 (2021) - [c204]Xiaofei Li, Yan Lu, Rui Paulo Martins:
Design of Diode-Connected and Cross-Connected CMOS Rectifiers with Adaptive Tuning for RF Energy Harvesting. APCCAS 2021: 141-144 - [c203]Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
An Arithmetic Progression Switched-Capacitor DC-DC Converter with Soft VCR Transitions Achieving 93.7% Peak Efficiency and 400 mA Output Current. A-SSCC 2021: 1-3 - [c202]Jixuan Li, Jiabao Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A 50.4 GOPs/W FPGA-Based MobileNetV2 Accelerator using the Double-Layer MAC and DSP Efficiency Enhancement. A-SSCC 2021: 1-3 - [c201]Jiahao Liu, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A 0.46pJ/bit Ultralow-Power Entropy-Preselection-Based Strong PUF with Worst-Case BER-6. A-SSCC 2021: 1-3 - [c200]Xi Meng, Junqi Guo, Haoran Li, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A 15.2-to-18.2GHz Balanced Dual-Core Inverse-Class-F VCO with Q-Enhanced 2nd-Harmonic Resonance Achieving 187-to-188.1dBc/Hz FoM in 28nm CMOS. A-SSCC 2021: 1-3 - [c199]Chi-Wa U, Man-Kay Law, Chi-Seng Lam, Rui Paulo Martins:
Auto-Calibration Technique for Current-Based Bandgap Voltage Reference. A-SSCC 2021: 1-3 - [c198]Chongyao Xu, Jieyun Zhang, Man-Kay Law, Yang Jiang, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins:
Modeling Attack Resistant Strong PUF Exploiting Obfuscated Interconnections With <0.83% Bit-Error Rate. A-SSCC 2021: 1-3 - [c197]Wen-Liang Zeng, Caolei Pan, Chi-Seng Lam, Sai-Weng Sin, Chenchang Zhan, Rui Paulo Martins:
A 95% Peak Efficiency Modified KY (Boost) Converter for IoT with Continuous Flying Capacitor Charging in DCM. A-SSCC 2021: 1-3 - [c196]Xiangyu Mao, Yan Lu, Rui Paulo Martins:
A Dual-Loop 4-Phase Switching LDO with Scalable Load Capability and Tunable Active Voltage Positioning for Microprocessors. CICC 2021: 1-2 - [c195]Yanbo Zhang, Jin Zhang, Shubin Liu, Zhangming Zhu, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A 79.1dB-SNDR 20MHz-BW 2nd-Order SAR-Assisted Noise-Shaping Pipeline ADC with Gain and Offset Background Calibrations Based on Convergence Enhanced Split-Over-Time Architecture. CICC 2021: 1-2 - [c194]Jun Yin, Pui-In Mak, Rui Paulo Martins:
A Periodically Time-Varying Inductor Applied to The Class-D VCO for Phase Noise Improvement. ESSCIRC 2021: 307-310 - [c193]Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
A 0.45-V 3.3-µW Resistor-Based Temperature Sensor Achieving 10mK Resolution in 65-nm CMOS. ICTA 2021: 127-128 - [c192]Yunbo Huang, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 3.52-GHz Harmonic-Rich-Shaping VCO with Noise Suppression and Circulation, Achieving -151-dBc/Hz Phase Noise at 10-MHz Offset. ISCAS 2021: 1-4 - [c191]Xinyu Qin, Jingying Zhang, Liang Qi, Sai-Weng Sin, Rui Paulo Martins, Guoxing Wang:
Discrete-Time MASH Delta-Sigma Modulator with Second-Order Digital Noise Coupling for Wideband High-Resolution Applications. ISCAS 2021: 1-5 - [c190]Mingqiang Guo, Sai-Weng Sin, Rui Paulo Martins:
Background Timing-Skew Mismatch Calibration for Time-Interleaved ADCs. ISOCC 2021: 248-249 - [c189]Hao Guo, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 5.0-to-6.36GHz Wideband-Harmonic-Shaping VCO Achieving 196.9dBc/Hz Peak FoM and 90-to-180kHz 1/f3 PN Corner Without Harmonic Tuning. ISSCC 2021: 294-296 - [c188]Hongshuai Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
27.6 A 25MHz-BW 75dB-SNDR Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Background Offset Calibration. ISSCC 2021: 380-382 - [c187]Wei-Han Yu, Massimo Giordano, Rohan Doshi, Minglei Zhang, Pui-In Mak, Rui Paulo Martins, Boris Murmann:
A 4-bit Mixed-Signal MAC Array with Swing Enhancement and Local Kernel Memory. MWSCAS 2021: 326-329 - [c186]Lai Wei, Zihao Zheng, Nereo Markulic, Jorge Lagos, Ewout Martens, Yan Zhu, Chi-Hang Chan, Jan Craninckx, Rui Paulo Martins:
An Auxiliary-Channel-Sharing Background Distortion and Gain Calibration Achieving >8dB SFDR Improvement over 4th Nyquist Zone in 1GS/s ADC. VLSI Circuits 2021: 1-2 - [c185]Minglei Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A 20GS/s 8b Time-Interleaved Time-Domain ADC with Input-Independent Background Timing Skew Calibration. VLSI Circuits 2021: 1-2 - 2020
- [j154]Zunsong Yang, Yong Chen, Shiheng Yang, Pui-In Mak, Rui Paulo Martins:
A 10.6-mW 26.4-GHz Dual-Loop Type-II Phase-Locked Loop Using Dynamic Frequency Detector and Phase Detector. IEEE Access 8: 2222-2232 (2020) - [j153]Mingqiang Guo, Jiaji Mao, Sai-Weng Sin, He Gong Wei, Rui Paulo Martins:
A 5 GS/s 29 mW Interleaved SAR ADC With 48.5 dB SNDR Using Digital-Mixing Background Timing-Skew Calibration for Direct Sampling Applications. IEEE Access 8: 138944-138954 (2020) - [j152]Wen-Ming Zheng, Wen-Liang Zeng, Chi-Wa U, Chi-Seng Lam, Yan Lu, Sai-Weng Sin, Man-Chung Wong, Rui Paulo Martins:
Analysis, Design and Control of an Integrated Three-Level Buck Converter under DCM Operation. J. Circuits Syst. Comput. 29(1): 2050011:1-2050011:20 (2020) - [j151]Yan Song, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
A 12.5-MHz Bandwidth 77-dB SNDR SAR-Assisted Noise Shaping Pipeline ADC. IEEE J. Solid State Circuits 55(2): 312-321 (2020) - [j150]Wenning Jiang, Yan Zhu, Minglei Zhang, Chi-Hang Chan, Rui Paulo Martins:
A Temperature-Stabilized Single-Channel 1-GS/s 60-dB SNDR SAR-Assisted Pipelined ADC With Dynamic Gm-R-Based Amplifier. IEEE J. Solid State Circuits 55(2): 322-332 (2020) - [j149]Liang Qi, Ankesh Jain, Dongyang Jiang, Sai-Weng Sin, Rui Paulo Martins, Maurits Ortmanns:
A 76.6-dB-SNDR 50-MHz-BW 29.2-mW Multi-Bit CT Sturdy MASH With DAC Non-Linearity Tolerance. IEEE J. Solid State Circuits 55(2): 344-355 (2020) - [j148]Mingqiang Guo, Jiaji Mao, Sai-Weng Sin, He Gong Wei, Rui Paulo Martins:
A 1.6-GS/s 12.2-mW Seven-/Eight-Way Split Time-Interleaved SAR ADC Achieving 54.2-dB SNDR With Digital Background Timing Mismatch Calibration. IEEE J. Solid State Circuits 55(3): 693-705 (2020) - [j147]Wei Wang, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
A 100-MHz BW 72.6-dB-SNDR CT ΔΣ Modulator Utilizing Preliminary Sampling and Quantization. IEEE J. Solid State Circuits 55(6): 1588-1598 (2020) - [j146]Mo Huang, Yan Lu, Rui Paulo Martins:
An Analog-Proportional Digital-Integral Multiloop Digital LDO With PSR Improvement and LCO Reduction. IEEE J. Solid State Circuits 55(6): 1637-1650 (2020) - [j145]Kai Xu, Jun Yin, Pui-In Mak, Robert Bogdan Staszewski, Rui Paulo Martins:
A Single-Pin Antenna Interface RF Front End Using a Single-MOS DCO-PA and a Push-Pull LNA. IEEE J. Solid State Circuits 55(8): 2055-2068 (2020) - [j144]Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Xiaoyang Zeng, Rui Paulo Martins:
Piezoelectric Energy-Harvesting Interface Using Split-Phase Flipping-Capacitor Rectifier With Capacitor Reuse for Input Power Adaptation. IEEE J. Solid State Circuits 55(8): 2106-2117 (2020) - [j143]Xiaofei Li, Fangyu Mao, Yan Lu, Rui Paulo Martins:
A VHF Wide-Input Range CMOS Passive Rectifier With Active Bias Tuning. IEEE J. Solid State Circuits 55(10): 2629-2638 (2020) - [j142]Minglei Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
An 8-Bit 10-GS/s 16× Interpolation-Based Time-Domain ADC With <1.5-ps Uncalibrated Quantization Steps. IEEE J. Solid State Circuits 55(12): 3225-3235 (2020) - [j141]Gengzhen Qi, Haijun Shao, Pui-In Mak, Jun Yin, Rui Paulo Martins:
A Multiband FDD SAW-Less Transmitter for 5G-NR Featuring a BW-Extended N-Path Filter-Modulator, a Switched-BB Input, and a Wideband TIA-Based PA Driver. IEEE J. Solid State Circuits 55(12): 3387-3399 (2020) - [j140]Yulun Wu, Yerzhan Mustafa, Yan Lu, Alex Ruderman, Rui Paulo Martins:
A switched-capacitor power converter with unequal duty cycle for ripple reduction and efficiency improvement. Microelectron. J. 104: 104888 (2020) - [j139]Ka-Fai Un, Feifei Zhang, Pui-In Mak, Rui Paulo Martins, Anding Zhu, Robert Bogdan Staszewski:
Design Considerations of the Interpolative Digital Transmitter for Quantization Noise and Replicas Rejection. IEEE Trans. Circuits Syst. II Express Briefs 67-II(1): 37-41 (2020) - [j138]Xiaofei Li, Yan Lu, Mo Huang, Rui Paulo Martins:
A 2.4-GHz Mid-Field CMOS Wireless Power Receiver Achieving 46% Maximum PCE and 163-mW Output Power. IEEE Trans. Circuits Syst. II Express Briefs 67-II(2): 360-364 (2020) - [j137]Wen-Liang Zeng, Edoardo Bonizzoni, Chi-Wa U, Chi-Seng Lam, Sai-Weng Sin, U. Fat Chio, Franco Maloberti, Rui Paulo Martins:
A SAR-ADC-Assisted DC-DC Buck Converter With Fast Transient Recovery. IEEE Trans. Circuits Syst. II Express Briefs 67-II(9): 1669-1673 (2020) - [j136]Chi-Wa U, Wen-Liang Zeng, Man-Kay Law, Chi-Seng Lam, Rui Paulo Martins:
A 0.5-V Supply, 36 nW Bandgap Reference With 42 ppm/°C Average Temperature Coefficient Within -40 °C to 120 °C. IEEE Trans. Circuits Syst. 67-I(11): 3656-3669 (2020) - [j135]Yunbo Huang, Yong Chen, Hao Guo, Pui-In Mak, Rui Paulo Martins:
A 3.3-mW 25.2-to-29.4-GHz Current-Reuse VCO Using a Single-Turn Multi-Tap Inductor and Differential-Only Switched-Capacitor Arrays With a 187.6-dBc/Hz FOM. IEEE Trans. Circuits Syst. 67-I(11): 3704-3717 (2020) - [j134]Xiaofeng Yang, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
A Calibration-Free Ring-Oscillator PLL With Gain Tracking Achieving 9% Jitter Variation Over PVT. IEEE Trans. Circuits Syst. 67-I(11): 3753-3763 (2020) - [j133]Jiahao Liu, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A 0.04% BER Strong PUF With Cell-Bias-Based CRPs Filtering and Background Offset Calibration. IEEE Trans. Circuits Syst. 67-I(11): 3853-3865 (2020) - [j132]Ricardo Martins, Nuno Lourenço, Nuno Horta, Shenke Zhong, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Design of a 4.2-to-5.1 GHz Ultralow-Power Complementary Class-B/C Hybrid-Mode VCO in 65-nm CMOS Fully Supported by EDA Tools. IEEE Trans. Circuits Syst. 67-I(11): 3965-3977 (2020) - [j131]Xiaofei Ma, Yan Lu, Qiang Li, Wing-Hung Ki, Rui Paulo Martins:
An NMOS Digital LDO With NAND-Based Analog-Assisted Loop in 28-nm CMOS. IEEE Trans. Circuits Syst. 67-I(11): 4041-4052 (2020) - [j130]Ji-Xuan Li, Sai-Weng Sin, U. Fat Chio, Ya-Jie Wu, Chi-Seng Lam, Rui Paulo Martins:
Digital Battery Management Unit With Built-In Resistance Compensation, Modulated Frequency Detection and Multi-Mode Protection for Fast, Efficient and Safe Charging. IEEE Trans. Circuits Syst. 67-I(11): 4063-4074 (2020) - [j129]Wen-Liang Zeng, Yuan Ren, Chi-Seng Lam, Sai-Weng Sin, Weng-Keong Che, Ran Ding, Rui Paulo Martins:
A 470-nA Quiescent Current and 92.7%/94.7% Efficiency DCT/PWM Control Buck Converter With Seamless Mode Selection for IoT Application. IEEE Trans. Circuits Syst. 67-I(11): 4085-4098 (2020) - [j128]Hanyu Wang, Sai-Weng Sin, Chi-Seng Lam, Franco Maloberti, Rui Paulo Martins:
LDO-Free Power Management System: A 10-bit Pipelined ADC Directly Powered by Inductor-Based Boost Converter With Ripple Calibration. IEEE Trans. Circuits Syst. 67-I(12): 4174-4186 (2020) - [j127]Zhicong Huang, Zhijian Fang, Chi-Seng Lam, Pui-In Mak, Rui Paulo Martins:
Cost-Effective Compensation Design for Output Customization and Efficiency Optimization in Series/Series-Parallel Inductive Power Transfer Converter. IEEE Trans. Ind. Electron. 67(12): 10356-10365 (2020) - [j126]Nandini Vitee, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, Rui Paulo Martins:
A 3.15-mW +16.0-dBm IIP3 22-dB CG Inductively Source Degenerated Balun-LNA Mixer With Integrated Transformer-Based Gate Inductor and IM2 Injection Technique. IEEE Trans. Very Large Scale Integr. Syst. 28(3): 700-713 (2020) - [j125]Nandini Vitee, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, Rui Paulo Martins:
A 1-V 4-mW Differential-Folded Mixer With Common-Gate Transconductor Using Multiple Feedback Achieving 18.4-dB Conversion Gain, +12.5-dBm IIP3, and 8.5-dB NF. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1164-1174 (2020) - [c184]Xianglong Bai, Fangyu Mao, Yan Lu, Chenchang Zhan, Rui Paulo Martins:
A Single-Stage Delay-Tuned Active Rectifier for Constant-Current Constant-Voltage Wireless Charging. APCCAS 2020: 47-49 - [c183]Fangyu Mao, Yan Lu, Edoardo Bonizzoni, Filippo Boera, Mo Huang, Franco Maloberti, Rui Paulo Martins:
A Power-Efficient Hybrid Single-Inductor Bipolar-Output DC-DC Converter with Floating Negative Output for AMOLED Displays. CICC 2020: 1-4 - [c182]Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.0285mm2 0.68pJ/bit Single-Loop Full-Rate Bang-Bang CDR without Reference and Separate Frequency Detector Achieving an 8.2(Gb/s)/µs Acquisition Speed of PAM-4 data in 28nm CMOS. CICC 2020: 1-4 - [c181]Shuangxing Zhao, Yan Lu, Chenchang Zhan, Rui Paulo Martins:
A 10MHz Buck Converter with Type-III Control and Transient Enhancement Transistor. ICTA 2020: 43-44 - [c180]Io-Wa Iam, Iok-U Hoi, Zhicong Huang, Chi-Seng Lam, Pui-In Mak, Rui Paulo Martins:
A Unity-Power-Factor Inductive Power Transfer Converter with Inherent CC-to-CV Transition Ability for Automated Guided Vehicle Charging. IECON 2020: 5257-5261 - [c179]Chuanqi Wei, Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
Low Complexity Illumination-Invariant Motion Vector Detection Based on Logarithmic Edge Detection and Edge Difference. ISCAS 2020: 1-5 - [c178]Chongyao Xu, Jieyun Zhang, Man-Kay Law, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins:
An N × N Multiplier-Based Multi-Bit Strong PUF using Path Delay Extraction. ISCAS 2020: 1-5 - [c177]Jieyun Zhang, Xiaojin Zhao, Man-Kay Law, Chongyao Xu, Jiahao Liu, Pui-In Mak, Rui Paulo Martins:
A 6.4pJ/Bit Strong Physical Unclonable Function Based on Multiple-Stage Amplifier Chain. ISCAS 2020: 1-5 - [c176]Yan Song, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
9.6 A 2.56mW 40MHz-Bandwidth 75dB-SNDR Partial-Interleaving SAR-Assisted NS Pipeline ADC With Background Inter-Stage Offset Calibration. ISSCC 2020: 164-166 - [c175]Gengzhen Qi, Haijun Shao, Pui-In Mak, Jun Yin, Rui Paulo Martins:
10.1 A 1.4-to-2.7GHz FDD SAW-Less Transmitter for 5G-NR Using a BW-Extended N-Path Filter-Modulator, an Isolated-BB Input and a Wideband TIA-Based PA Driver Achieving <-157.5dBc/Hz OB Noise. ISSCC 2020: 172-174 - [c174]Mo Huang, Yan Lu, Rui Paulo Martins:
11.5 A 2-Phase Soft-Charging Hybrid Boost Converter with Doubled-Switching Pulse Width and Shared Bootstrap Capacitor Achieving 93.5% Efficiency at a Conversion Ratio of 4.5. ISSCC 2020: 198-200 - [c173]Minglei Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
16.2 A 4× Interleaved 10GS/s 8b Time-Domain ADC with 16× Interpolation-Based Inter-Stage Gain Achieving >37.5dB SNDR at 18GHz Input. ISSCC 2020: 252-254 - [c172]Zihao Zheng, Lai Wei, Jorge Lagos, Ewout Martens, Yan Zhu, Chi-Hang Chan, Jan Craninckx, Rui Paulo Martins:
16.3 A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation. ISSCC 2020: 254-256 - [c171]Chao Fan, Jun Yin, Chee-Cheow Lim, Pui-In Mak, Rui Paulo Martins:
17.9 A 9mW 54.9-to-63.5GHz Current-Reuse LO Generator with a 186.7dBc/Hz FoM by Unifying a 20GHz 3rd-Harmonic-Rich Current-Output VCO, a Harmonic-Current Filter and a 60GHz TIA. ISSCC 2020: 282-284 - [c170]Yong Chen, Pui-In Mak, Chirn Chye Boon, Rui Paulo Martins:
A 0.024-mm2 45.4-GHz-Bandwidth Unity-Gain Output Driver with SDD22<-10dB up to 35 GHz. MWSCAS 2020: 687-690 - [c169]Dongyang Jiang, Liang Qi, Sai-Weng Sin, Franco Maloberti, Rui Paulo Martins:
A 5MHz-BW, 86.1dB-SNDR 4X Time-Interleaved 2nd-Order ΔΣ Modulator with Digital Feedforward Extrapolation in 28nm CMOS. VLSI Circuits 2020: 1-2 - [c168]Kai Xing, Wei Wang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A 10.4mW 50MHz-BW 80dB-DR Single-Opamp Third-Order CTSDM with SAB-ELD-Merged Integrator and 3-Stage Opamp. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [j124]Zechariah Balan, Harikrishnan Ramiah, Jagadheswaran Rajendran, Nandini Vitee, Pravinah Nair Shasidharan, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A coin-battery-powered LDO-Free 2.4-GHz Bluetooth Low Energy/ZigBee receiver consuming 2 mA. Integr. 66: 112-118 (2019) - [j123]Shiheng Yang, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A 0.0056-mm2 -249-dB-FoM All-Digital MDLL Using a Block-Sharing Offset-Free Frequency-Tracking Loop and Dual Multiplexed-Ring VCOs. IEEE J. Solid State Circuits 54(1): 88-98 (2019) - [j122]Biao Wang, Sai-Weng Sin, Seng-Pan U, Franco Maloberti, Rui Paulo Martins:
A 550- $\mu$ W 20-kHz BW 100.8-dB SNDR Linear- Exponential Multi-Bit Incremental $\Sigma\Delta$ ADC With 256 Clock Cycles in 65-nm CMOS. IEEE J. Solid State Circuits 54(4): 1161-1172 (2019) - [j121]Shiheng Yang, Jun Yin, Haidong Yi, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A 0.2-V Energy-Harvesting BLE Transmitter With a Micropower Manager Achieving 25% System Efficiency at 0-dBm Output and 5.2-nW Sleep Power in 28-nm CMOS. IEEE J. Solid State Circuits 54(5): 1351-1362 (2019) - [j120]Fangyu Mao, Yan Lu, Rui Paulo Martins:
A Reconfigurable Cross-Connected Wireless-Power Transceiver for Bidirectional Device-to-Device Wireless Charging. IEEE J. Solid State Circuits 54(9): 2579-2589 (2019) - [j119]U-Fat Chio, Kuo-Chih Wen, Sai-Weng Sin, Chi-Seng Lam, Yan Lu, Franco Maloberti, Rui Paulo Martins:
An Integrated DC-DC Converter With Segmented Frequency Modulation and Multiphase Co-Work Control for Fast Transient Recovery. IEEE J. Solid State Circuits 54(10): 2637-2648 (2019) - [j118]Yang Jiang, Man-Kay Law, Zhiyuan Chen, Pui-In Mak, Rui Paulo Martins:
Algebraic Series-Parallel-Based Switched-Capacitor DC-DC Boost Converter With Wide Input Voltage Range and Enhanced Power Density. IEEE J. Solid State Circuits 54(11): 3118-3134 (2019) - [j117]Minglei Zhang, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
A 0.6-V 13-bit 20-MS/s Two-Step TDC-Assisted SAR ADC With PVT Tracking and Speed-Enhanced Techniques. IEEE J. Solid State Circuits 54(12): 3396-3409 (2019) - [j116]Haohong Yu, Yong Chen, Chirn Chye Boon, Chenyang Li, Pui-In Mak, Rui Paulo Martins:
A 0.044-mm2 0.5-to-7-GHz Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3±0.45 dB. IEEE Trans. Circuits Syst. II Express Briefs 66-II(1): 71-75 (2019) - [j115]Cheng Li, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
Analysis of Reference Error in High-Speed SAR ADCs With Capacitive DAC. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(1): 82-93 (2019) - [j114]Tongquan Jiang, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A 0.5-V 0.4-to-1.6-GHz 8-Phase Bootstrap Ring-VCO Using Inherent Non-Overlapping Clocks Achieving a 162.2-dBc/Hz FoM. IEEE Trans. Circuits Syst. II Express Briefs 66-II(2): 157-161 (2019) - [j113]Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Narendra Kumar, Pui-In Mak, Rui Paulo Martins:
A 5.1-to-7.3 mW, 2.4-to-5 GHz Class-C Mode-Switching Single-Ended-Complementary VCO Achieving >190 dBc/Hz FoM. IEEE Trans. Circuits Syst. II Express Briefs 66-II(2): 237-241 (2019) - [j112]Dezhi Xing, Yan Zhu, Chi-Hang Chan, Franco Maloberti, Seng-Pan U, Rui Paulo Martins:
Design of a High-Speed Time-Interleaved Sub-Ranging SAR ADC With Optimal Code Transfer Technique. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(2): 489-501 (2019) - [j111]Iat-Fai Sun, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A Comparative Study of 8-Phase Feedforward-Coupling Ring VCOs. IEEE Trans. Circuits Syst. II Express Briefs 66-II(4): 527-531 (2019) - [j110]Ka-Fai Un, Gengzhen Qi, Jun Yin, Shiheng Yang, Shupeng Yu, Chio-In Ieong, Pui-In Mak, Rui Paulo Martins:
A 0.12-mm2 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N Bang-Bang Digital PLL With 8-µs Settling Time for Multi-ISM-Band ULP Radios. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9): 3307-3316 (2019) - [j109]Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.0018-mm2 153% Locking-Range CML-Based Divider-by-2 With Tunable Self-Resonant Frequency Using an Auxiliary Negative-gm Cell. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9): 3330-3339 (2019) - [j108]Xuewei Lei, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
A 4-b 7-µW Phase Domain ADC With Time Domain Reference Generation for Low-Power FSK/PSK Demodulation. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9): 3365-3372 (2019) - [j107]Xiaochao Li, Chi-Hang Chan, Qi Zhang, Yan Zhu, Rui Paulo Martins:
Background Offset Calibration for Comparator Based on Temperature Drift Profile. IEEE Trans. Circuits Syst. II Express Briefs 66-II(10): 1648-1652 (2019) - [j106]Wen-Liang Zeng, Zi-Yang Lin, Chi-Seng Lam, Man-Kay Law, Sai-Weng Sin, Franco Maloberti, Man-Chung Wong, Rui Paulo Martins:
Design of KY Converter With Constant On-Time Control Under DCM Operation. IEEE Trans. Circuits Syst. II Express Briefs 66-II(10): 1753-1757 (2019) - [j105]Jiangchao Wu, Ka-Chon Lei, Hou-Man Leong, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
Fully Integrated High Voltage Pulse Driver Using Switched-Capacitor Voltage Multiplier and Synchronous Charge Compensation in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 66-II(10): 1768-1772 (2019) - [j104]Yong Chen, Pui-In Mak, Zunsong Yang, Chirn Chye Boon, Rui Paulo Martins:
A 0.0071-mm2 10.8pspp-Jitter 4 to 10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for Sub-1-UI Fractional De-Emphasis. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(10): 3991-4004 (2019) - [j103]Gabriel Chong, Harikrishnan Ramiah, Jun Yin, Jagadheswaran Rajendran, Wei Ru Wong, Pui-In Mak, Rui Paulo Martins:
CMOS Cross-Coupled Differential-Drive Rectifier in Subthreshold Operation for Ambient RF Energy Harvesting - Model and Analysis. IEEE Trans. Circuits Syst. II Express Briefs 66-II(12): 1942-1946 (2019) - [j102]Chao Fan, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A 40-Gb/s PAM-4 Transmitter Using a 0.16-pJ/bit SST-CML-Hybrid (SCH) Output Driver and a Hybrid-Path 3-Tap FFE Scheme in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(12): 4850-4861 (2019) - [j101]Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Many-Objective Sizing Optimization of a Class-C/D VCO for Ultralow-Power IoT and Ultralow-Phase-Noise Cellular Applications. IEEE Trans. Very Large Scale Integr. Syst. 27(1): 69-82 (2019) - [j100]Jianwei Liu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
Accuracy-Enhanced Variance-Based Time-Skew Calibration Using SAR as Window Detector. IEEE Trans. Very Large Scale Integr. Syst. 27(2): 481-485 (2019) - [j99]Xinyi Ge, Yong Chen, Xiaoteng Zhao, Pui-In Mak, Rui Paulo Martins:
Analysis and Verification of Jitter in Bang-Bang Clock and Data Recovery Circuit With a Second-Order Loop Filter. IEEE Trans. Very Large Scale Integr. Syst. 27(10): 2223-2236 (2019) - [c167]Lingshan Kong, Yong Chen, Haohong Yu, Quan Pan, Chirn Chye Boon, Pui-In Mak, Rui Paulo Martins:
Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering Gain-Tuning Technique. APCCAS 2019: 153-156 - [c166]Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery Circuit (BBCDR) in 28-nm CMOS. APCCAS 2019: 229-232 - [c165]Liang Qi, Sai-Weng Sin, Rui Paulo Martins:
Multibit Sturdy MASH ΔΣ Modulator with Error-shaped Segmented DACs for Wideband Low-power Applications. ASICON 2019: 1-4 - [c164]Biao Wang, Sai-Weng Sin, Seng-Pan U, Franco Maloberti, Rui Paulo Martins:
A 1.2V 86dB SNDR 500kHz BW Linear-Exponential Multi-Bit Incremental ADC Using Positive Feedback in 65nm CMOS. A-SSCC 2019: 117-120 - [c163]Xiaofei Li, Fangyu Mao, Pyungwoo Yeon, Yan Lu, Maysam Ghovanloo, Rui Paulo Martins:
A 200-MHz Wide Input Range CMOS Passive Rectifier with Active Bias Tunning. A-SSCC 2019: 245-246 - [c162]Zunsong Yang, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.003-mm2 440fsRMS-Jitter and -64dBc-Reference-Spur Ring-VCO-Based Type-I PLL Using a Current-Reuse Sampling Phase Detector in 28-nm CMOS. A-SSCC 2019: 283-284 - [c161]Junhao Liang, Sai-Weng Sin, Seng-Pan U, Franco Maloberti, Rui Paulo Martins, Hanjun Jiang:
A High DR High-Input-Impedance Programmable-Gain ECG Acquisition Interface with Non-inverting Continuous Time Sigma-Delta Modulator. A-SSCC 2019: 309-312 - [c160]Mingqiang Guo, Jiaji Mao, Sai-Weng Sin, He Gong Wei, Rui Paulo Martins:
A 10b 1.6GS/s 12.2mW 7/8-way Split Time-interleaved SAR ADC with Digital Background Mismatch Calibration. CICC 2019: 1-4 - [c159]Lai Wei, Xiang-Hui Pan, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
Input Correlated Swap-Sampling Technique for Input Driver Power Reduction in a 12b 25MS/s SAR ADC. ISCAS 2019: 1-5 - [c158]Wenning Jiang, Yan Zhu, Minglei Zhang, Chi-Hang Chan, Rui Paulo Martins:
A 7.6mW 1GS/s 60dB SNDR Single-Channel SAR-Assisted Pipelined ADC with Temperature-Compensated Dynamic Gm-R-Based Amplifier. ISSCC 2019: 60-62 - [c157]Minglei Zhang, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
A 0.6V 13b 20MS/s Two-Step TDC-Assisted SAR ADC with PVT Tracking and Speed-Enhanced Techniques. ISSCC 2019: 66-68 - [c156]Xiaofeng Yang, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
A -246dB Jitter-FoM 2.4GHz Calibration-Free Ring-Oscillator PLL Achieving 9% Jitter Variation Over PVT. ISSCC 2019: 260-262 - [c155]Zunsong Yang, Yong Chen, Shiheng Yang, Pui-In Mak, Rui Paulo Martins:
A 25.4-to-29.5GHz 10.2mW Isolated Sub-Sampling PLL Achieving -252.9dB Jitter-Power FoM and -63dBc Reference Spur. ISSCC 2019: 270-272 - [c154]Liang Qi, Ankesh Jain, Dongyang Jiang, Sai-Weng Sin, Rui Paulo Martins, Maurits Ortmanns:
A 76.6dB-SNDR 50MHz-BW 29.2mW Noise-Coupling-Assisted CT Sturdy MASH ΔΣ Modulator with 1.5b/4b Quantizers in 28nm CMOS. ISSCC 2019: 336-338 - [c153]Wei Wang, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
A 72.6dB-SNDR 100MHz-BW 16.36mW CTDSM with Preliminary Sampling and Quantization Scheme in Backend Subranging QTZ. ISSCC 2019: 340-342 - [c152]Hao Guo, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.08mm2 25.5-to-29.9GHz Multi-Resonant-RLCM-Tank VCO Using a Single-Turn Multi-Tap Inductor and CM-Only Capacitors Achieving 191.6dBc/Hz FoM and 130kHz 1/f3 PN Corner. ISSCC 2019: 410-412 - [c151]Zhiyuan Chen, Yang Jiang, Man-Kay Law, Pui-In Mak, Xiaoyang Zeng, Rui Paulo Martins:
A Piezoelectric Energy-Harvesting Interface Using Split-Phase Flipping-Capacitor Rectifier and Capacitor Reuse Multiple-VCR SC DC-DC Achieving 9.3× Energy-Extraction Improvement. ISSCC 2019: 424-426 - [c150]Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Using EDA Tools to Push the Performance Boundaries of an Ultralow-Power IoT-VCO at 65nm. SMACD 2019: 37-40 - [c149]Mingqiang Guo, Jiaji Mao, Sai-Weng Sin, He Gong Wei, Rui Paulo Martins:
A 29mW 5GS/s Time-interleaved SAR ADC achieving 48.5dB SNDR With Fully-Digital Timing-Skew Calibration Based on Digital-Mixing. VLSI Circuits 2019: 76- - 2018
- [j98]Yu-Jun Mao, Chi-Seng Lam, Sai-Weng Sin, Man-Chung Wong, Rui Paulo Martins:
Review and Selection Strategy for High-Accuracy Modeling of PWM Converters in DCM. J. Electr. Comput. Eng. 2018: 3901693:1-3901693:16 (2018) - [j97]Mo Huang, Yan Lu, Seng-Pan U, Rui Paulo Martins:
An Analog-Assisted Tri-Loop Digital Low-Dropout Regulator. IEEE J. Solid State Circuits 53(1): 20-34 (2018) - [j96]Chi-Hang Chan, Yan Zhu, Wai-Hong Zhang, Seng-Pan U, Rui Paulo Martins:
A Two-Way Interleaved 7-b 2.4-GS/s 1-Then-2 b/Cycle SAR ADC With Background Offset Calibration. IEEE J. Solid State Circuits 53(3): 850-860 (2018) - [j95]Gengzhen Qi, Barend van Liempd, Pui-In Mak, Rui Paulo Martins, Jan Craninckx:
A SAW-Less Tunable RF Front End for FDD and IBFD Combining an Electrical-Balance Duplexer and a Switched-LC N-Path LNA. IEEE J. Solid State Circuits 53(5): 1431-1442 (2018) - [j94]Haidong Yi, Wei-Han Yu, Pui-In Mak, Jun Yin, Rui Paulo Martins:
A 0.18-V 382-µW Bluetooth Low-Energy Receiver Front-End With 1.33-nW Sleep Power for Energy-Harvesting Applications in 28-nm CMOS. IEEE J. Solid State Circuits 53(6): 1618-1627 (2018) - [j93]Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A Regulation-Free Sub-0.5-V 16-/24-MHz Crystal Oscillator With 14.2-nJ Startup Energy and 31.8-µW Steady-State Power. IEEE J. Solid State Circuits 53(9): 2624-2635 (2018) - [j92]Wei Wang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A 5.35-mW 10-MHz Single-Opamp Third-Order CT ΔΣ Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS. IEEE J. Solid State Circuits 53(10): 2783-2794 (2018) - [j91]Yatao Peng, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Low-Phase-Noise Wideband Mode-Switching Quad-Core-Coupled mm-wave VCO Using a Single-Center-Tapped Switched Inductor. IEEE J. Solid State Circuits 53(11): 3232-3242 (2018) - [j90]Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
Algorithmic Voltage-Feed-In Topology for Fully Integrated Fine-Grained Rational Buck-Boost Switched-Capacitor DC-DC Converters. IEEE J. Solid State Circuits 53(12): 3455-3469 (2018) - [j89]Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Pui-In Mak, Rui Paulo Martins:
An Inverse-Class-F CMOS Oscillator With Intrinsic-High-Q First Harmonic and Second Harmonic Resonances. IEEE J. Solid State Circuits 53(12): 3528-3539 (2018) - [j88]Wei Wei Qin, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
Quick and cost-efficient A/D converter static characterization using low-precision testing signal. Microelectron. J. 74: 86-93 (2018) - [j87]Wei-Han Yu, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins:
A 0.7-2.5 GHz, 61% EIRP System Efficiency, Four-Element MIMO TX System Exploiting Integrated Power-Relaxed Power Amplifiers and an Analog Spatial De-Interleaver. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(1): 14-25 (2018) - [j86]Haidong Yi, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A 0.032-mm2 0.15-V Three-Stage Charge-Pump Scheme Using a Differential Bootstrapped Ring-VCO for Energy-Harvesting Applications. IEEE Trans. Circuits Syst. II Express Briefs 65-II(2): 146-150 (2018) - [j85]Xiaofeng Yang, Yan Zhu, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins:
Analysis of Common-Mode Interference and Jitter of Clock Receiver Circuits With Improved Topology. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(6): 1819-1829 (2018) - [j84]Xingqiang Peng, Jun Yin, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A Coin-Battery-Powered LDO-Free 2.4-GHz Bluetooth Low-Energy Transmitter With 34.7% Peak System Efficiency. IEEE Trans. Circuits Syst. II Express Briefs 65-II(9): 1174-1178 (2018) - [j83]Chak-Fong Cheang, Pui-In Mak, Rui Paulo Martins:
A Hardware-Efficient Feedback Polynomial Topology for DPD Linearization of Power Amplifiers: Theory and FPGA Validation. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(9): 2889-2902 (2018) - [j82]Yong Chen, Pui-In Mak, Chirn Chye Boon, Rui Paulo Martins:
A 36-Gb/s 1.3-mW/Gb/s Duobinary-Signal Transmitter Exploiting Power-Efficient Cross-Quadrature Clocking Multiplexers With Maximized Timing Margin. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(9): 3014-3026 (2018) - [j81]Jiaji Mao, Mingqiang Guo, Sai-Weng Sin, Rui Paulo Martins:
A 14-Bit Split-Pipeline ADC With Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current. IEEE Trans. Circuits Syst. II Express Briefs 65-II(10): 1380-1384 (2018) - [j80]Da Feng, Edoardo Bonizzoni, Franco Maloberti, Sai-Weng Sin, Rui Paulo Martins:
A 10-MHz Bandwidth Two-Path Third-Order ΣΔ Modulator With Cross-Coupling Branches. IEEE Trans. Circuits Syst. II Express Briefs 65-II(10): 1410-1414 (2018) - [j79]Ya-Jie Wu, Chi-Seng Lam, Man-Chung Wong, Sai-Weng Sin, Rui Paulo Martins:
A Reconfigurable and Extendable Digital Architecture for Mixed Signal Power Electronics Controller. IEEE Trans. Circuits Syst. II Express Briefs 65-II(10): 1480-1484 (2018) - [j78]Lingshan Kong, Yong Chen, Chirn Chye Boon, Pui-In Mak, Rui Paulo Martins:
A Wideband Inductorless dB-Linear Automatic Gain Control Amplifier Using a Single-Branch Negative Exponential Generator for Wireline Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3196-3206 (2018) - [j77]Yan Zhu, Chi-Hang Chan, Zi-Hao Zheng, Cheng Li, Jianyu Zhong, Rui Paulo Martins:
A 0.19 mm2 10 b 2.3 GS/s 12-Way Time-Interleaved Pipelined-SAR ADC in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 3606-3616 (2018) - [j76]Guan-Cheng Wang, Cheng Li, Yan Zhu, Jianyu Zhong, Yan Lu, Chi-Hang Chan, Rui Paulo Martins:
Missing-Code-Occurrence Probability Calibration Technique for DAC Nonlinearity With Supply and Reference Circuit Analysis in a SAR ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 3707-3719 (2018) - [j75]Wen-Liang Zeng, Chi-Seng Lam, Sai-Weng Sin, Franco Maloberti, Man-Chung Wong, Rui Paulo Martins:
A 220-MHz Bondwire-Based Fully-Integrated KY Converter With Fast Transient Response Under DCM Operation. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 3984-3995 (2018) - [j74]Yuanqing Huang, Yan Lu, Franco Maloberti, Rui Paulo Martins:
Nano-Ampere Low-Dropout Regulator Designs for IoT Devices. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 4017-4026 (2018) - [j73]Yan Song, Chi-Hang Chan, Yan Zhu, Li Geng, Seng-Pan U, Rui Paulo Martins:
Passive Noise Shaping in SAR ADC With Improved Efficiency. IEEE Trans. Very Large Scale Integr. Syst. 26(2): 416-420 (2018) - [j72]Guan-Cheng Wang, Yan Zhu, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins:
Gain Error Calibrations for Two-Step ADCs: Optimizations Either in Accuracy or Chip Area. IEEE Trans. Very Large Scale Integr. Syst. 26(11): 2279-2289 (2018) - [c148]Junmin Jiang, Yan Lu, Xun Liu, Wing-Hung Ki, Philip K. T. Mok, Seng-Pan U, Rui Paulo Martins:
A dual-output SC converter with dynamic power allocation for multicore application processors. ASP-DAC 2018: 285-286 - [c147]Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
An 11b 1GS/s Time-Interleaved ADC with Linearity Enhanced T/H. A-SSCC 2018: 1-2 - [c146]U. Fat Chio, Kuo-Chih Wen, Sai-Weng Sin, Chi-Seng Lam, Yan Lu, Franco Maloberti, Rui Paulo Martins:
An Integrated DC-DC Converter with Segmented Frequency Modulation and Multiphase Co-Work Control for Fast Transient Recovery. A-SSCC 2018: 31-32 - [c145]Wenning Jiang, Yan Zhu, Chi-Hang Chan, Boris Murmann, Seng-Pan U, Rui Paulo Martins:
A 7b 2 GS/s Time-Interleaved SAR ADC with Time Skew Calibration Based on Current Integrating Sampler. A-SSCC 2018: 235-238 - [c144]Kai Xu, Jun Yin, Pui-In Mak, Robert Bogdan Staszewski, Rui Paulo Martins:
A 2.4-GHz Single-Pin Antenna Interface RF Front-End with a Function-Reuse Single-MOS VCO-PA and a Push-Pull LNA. A-SSCC 2018: 293-294 - [c143]Chi-Hang Chan, Yan Zhu, Zi-Hao Zheng, Rui Paulo Martins:
A 39mW 7b 8GS/s 8-way TI ADC with Cross-linearized Input and Bootstrapped Sampling Buffer Front-end. ESSCIRC 2018: 254-257 - [c142]Jianyang Deng, Chi-Seng Lam, Man-Chung Wong, Lei Wang, Sai-Weng Sin, Rui Paulo Martins:
A Power Quality Indexes Measurement System Platform with Remote Alarm Notification. IECON 2018: 3461-3465 - [c141]Yuanqing Huang, Yan Lu, Franco Maloberti, Rui Paulo Martins:
A Dual-Loop Digital LDO Regulator with Asynchronous-Flash Binary Coarse Tuning. ISCAS 2018: 1-5 - [c140]Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
A 0.4 V 6.4 μW 3.3 MHz CMOS Bootstrapped Relaxation Oscillator with ±0.71% Frequency Deviation over -30 to 100 °C for Wearable and Sensing Applications. ISCAS 2018: 1-5 - [c139]Fangyu Mao, Yan Lu, Jie Lin, Chenchang Zhan, Seng-Pan U, Rui Paulo Martins:
A Single-Stage Current-Mode Active Rectifier with Accurate Output-Current Regulation for IoT. ISCAS 2018: 1-4 - [c138]Yiwei Tan, Chi-Seng Lam, Sai-Weng Sin, Man-Chung Wong, Rui Paulo Martins:
Design and Control of An Integrated 3-Level Boost Converter under DCM Operation. ISCAS 2018: 1-5 - [c137]Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A regulation-free sub-0.5V 16/24MHz crystal oscillator for energy-harvesting BLE radios with 14.2nJ startup energy and 31.8pW steady-state power. ISSCC 2018: 52-54 - [c136]Shiheng Yang, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A 0.0056mm2 all-digital MDLL using edge re-extraction, dual-ring VCOs and a 0.3mW block-sharing frequency tracking loop achieving 292fsrms Jitter and -249dB FOM. ISSCC 2018: 118-120 - [c135]Fangyu Mao, Yan Lu, Seng-Pan U., Rui Paulo Martins:
A reconfigurable cross-connected wireless-power transceiver for bidirectional device-to-device charging with 78.1% total efficiency. ISSCC 2018: 140-142 - [c134]Xiaofei Ma, Yan Lu, Rui Paulo Martins, Qiang Li:
A 0.4V 430nA quiescent current NMOS digital LDO with NAND-based analog-assisted loop in 28nm CMOS. ISSCC 2018: 306-308 - [c133]Chee-Cheow Lim, Jun Yin, Pui-In Mak, Harikrishnan Ramiah, Rui Paulo Martins:
An inverse-class-F CMOS VCO with intrinsic-high-Q 1st- and 2nd-harmonic resonances for 1/f2-to-1/f3 phase-noise suppression achieving 196.2dBc/Hz FOM. ISSCC 2018: 374-376 - [c132]Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A 0.22-to-2.4V-input fine-grained fully integrated rational buck-boost SC DC-DC converter using algorithmic voltage-feed-in (AVFI) topology achieving 84.1% peak efficiency at 13.2mW/mm2. ISSCC 2018: 422-424 - [c131]Jun Yin, Shiheng Yang, Haidong Yi, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A 0.2V energy-harvesting BLE transmitter with a micropower manager achieving 25% system efficiency at 0dBm output and 5.2nW sleep power in 28nm CMOS. ISSCC 2018: 450-452 - [c130]Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Design and Optimization of a Class-C/D VCO for Ultra-Low-Power IoT and Cellular Applications. SMACD 2018: 129-132 - [c129]Fangyu Mao, Yan Lu, Seng-Pan U, Rui Paulo Martins:
A 6.78 MHz active voltage doubler with near-optimal on/off delay compensation for wireless power transfer systems. VLSI-DAT 2018: 1-4 - [c128]Yan Song, Yan Zhu, Chi-Hang Chan, Li Geng, Rui Paulo Martins:
A 77dB SNDR 12.5MHz Bandwidth 0-1 MASH ∑Δ ADC Based on the Pipelined-SAR Structure. VLSI Circuits 2018: 203-204 - [c127]Biao Wang, Sai-Weng Sin, Seng-Pan U, Franco Maloberti, Rui Paulo Martins:
A 550µW 20kHz BW 100.8DB SNDR Linear-Exponential Multi-Bit Incremental Converter with 256-cycles in 65NM CMOS. VLSI Circuits 2018: 207-208 - 2017
- [j71]Ka-Meng Lei, Hadi Heidari, Pui-In Mak, Man-Kay Law, Franco Maloberti, Rui Paulo Martins:
A Handheld High-Sensitivity Micro-NMR CMOS Platform With B-Field Stabilization for Multi-Type Biological/Chemical Assays. IEEE J. Solid State Circuits 52(1): 284-297 (2017) - [j70]Xingqiang Peng, Jun Yin, Pui-In Mak, Wei-Han Yu, Rui Paulo Martins:
A 2.4-GHz ZigBee Transmitter Using a Function-Reuse Class-F DCO-PA and an ADPLL Achieving 22.6% (14.5%) System Efficiency at 6-dBm (0-dBm) Pout. IEEE J. Solid State Circuits 52(6): 1495-1508 (2017) - [j69]Gengzhen Qi, Pui-In Mak, Rui Paulo Martins:
A 0.038-mm2 SAW-Less Multiband Transceiver Using an N-Path SC Gain Loop. IEEE J. Solid State Circuits 52(8): 2055-2070 (2017) - [j68]Chi-Hang Chan, Yan Zhu, Cheng Li, Wai-Hong Zhang, Iok-Meng Ho, Lai Wei, Seng-Pan U, Rui Paulo Martins:
60-dB SNDR 100-MS/s SAR ADCs With Threshold Reconfigurable Reference Error Calibration. IEEE J. Solid State Circuits 52(10): 2576-2588 (2017) - [j67]Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Wing-Hung Ki, Rui Paulo Martins:
Fully Integrated Inductor-Less Flipping-Capacitor Rectifier for Piezoelectric Energy Harvesting. IEEE J. Solid State Circuits 52(12): 3168-3180 (2017) - [j66]Ziyang Luo, Yan Lu, Mo Huang, Junmin Jiang, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A sub-1V 78-nA bandgap reference with curvature compensation. Microelectron. J. 63: 35-40 (2017) - [j65]Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A Single-Chip Solar Energy Harvesting IC Using Integrated Photodiodes for Biomedical Implant Applications. IEEE Trans. Biomed. Circuits Syst. 11(1): 44-53 (2017) - [j64]Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Boris Murmann, Seng-Pan U, Rui Paulo Martins:
Metastablility in SAR ADCs. IEEE Trans. Circuits Syst. II Express Briefs 64-II(2): 111-115 (2017) - [j63]Yan Lu, Haojuan Dai, Mo Huang, Man-Kay Law, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A Wide Input Range Dual-Path CMOS Rectifier for RF Energy Harvesting. IEEE Trans. Circuits Syst. II Express Briefs 64-II(2): 166-170 (2017) - [j62]Amin Khalili Moghaddam, Joon Huang Chuah, Harikrishnan Ramiah, Jalil Ahmadian, Pui-In Mak, Rui Paulo Martins:
A 73.9%-Efficiency CMOS Rectifier Using a Lower DC Feeding (LDCF) Self-Body-Biasing Technique for Far-Field RF Energy-Harvesting Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(4): 992-1002 (2017) - [j61]Jianyu Zhong, Yan Zhu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A 12b 180MS/s 0.068mm2 With Full-Calibration-Integrated Pipelined-SAR ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(7): 1684-1695 (2017) - [j60]Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins, Franco Maloberti:
A 7.8-mW 5-b 5-GS/s Dual-Edges-Triggered Time-Based Flash ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(8): 1966-1976 (2017) - [j59]Liang Qi, Sai-Weng Sin, Seng-Pan U, Franco Maloberti, Rui Paulo Martins:
A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH Δ Σ Modulator With Multirate Opamp Sharing. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(10): 2641-2654 (2017) - [j58]Wei-Han Yu, Xingqiang Peng, Pui-In Mak, Rui Paulo Martins:
A High-Voltage-Enabled Class-D Polar PA Using Interactive AM-AM Modulation, Dynamic Matching, and Power-Gating for Average PAE Enhancement. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(11): 2844-2857 (2017) - [j57]Yan Zhu, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins:
A 10-bit 500-MS/s Partial-Interleaving Pipelined SAR ADC With Offset and Reference Mismatch Calibrations. IEEE Trans. Very Large Scale Integr. Syst. 25(1): 354-363 (2017) - [j56]Arshad Hussain, Sai-Weng Sin, Chi-Hang Chan, Ben Seng-Pan U, Franco Maloberti, Rui Paulo Martins:
Active-Passive ΔΣ Modulator for High-Resolution and Low-Power Applications. IEEE Trans. Very Large Scale Integr. Syst. 25(1): 364-374 (2017) - [j55]Dezhi Xing, Yan Zhu, Chi-Hang Chan, Sai-Weng Sin, Fan Ye, Junyan Ren, Seng-Pan U, Rui Paulo Martins:
Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial $V_{\mathrm {cm}}$ -Based Switching. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 1168-1172 (2017) - [j54]Chio-In Ieong, Mingzhong Li, Man-Kay Law, Pui-In Mak, Mang I Vai, Rui Paulo Martins:
A 0.45 V 147-375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures. IEEE Trans. Very Large Scale Integr. Syst. 25(4): 1307-1319 (2017) - [c126]U. Fat Chio, Sai-Weng Sin, Seng-Pan U, Franco Maloberti, Rui Paulo Martins:
A 5-bit 2 GS/s binary-search ADC with charge-steering comparators. A-SSCC 2017: 221-224 - [c125]Wei Wang, Yan Zhu, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins:
A 5.35 mW 10 MHz bandwidth CT third-order ΔΣ modulator with single Opamp achieving 79.6/84.5 dB SNDR/DR in 65 nm CMOS. A-SSCC 2017: 285-288 - [c124]Guan-Cheng Wang, Yan Zhu, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins:
A missing-code-detection gain error calibration achieving 63dB SNR for an 11-bit ADC. ESSCIRC 2017: 239-242 - [c123]Chi-Wa U, Chi-Seng Lam, Man-Kay Law, Sai-Weng Sin, Man-Chung Wong, Seng-Pan U, Rui Paulo Martins:
CCM operation analysis and parameters design of Negative Output Elementary Luo Converter for ripple suppression. IECON 2017: 4867-4871 - [c122]Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins:
A 0.4V 4.8μW 16MHz CMOS crystal oscillator achieving 74-fold startup-time reduction using momentary detuning. ISCAS 2017: 1-4 - [c121]Dapeng Sun, Man-Kay Law, Bo Wang, Pui-In Mak, Rui Paulo Martins:
Piecewise BJT process spread compensation exploiting base recombination current. ISCAS 2017: 1-4 - [c120]Xia Du, Chi-Seng Lam, Sai-Weng Sin, Man-Kay Law, Franco Maloberti, Man-Chung Wong, Seng-Pan U, Rui Paulo Martins:
A digital PWM controlled KY step-up converter based on frequency domain ΣΔ ADC. ISIE 2017: 561-564 - [c119]Chi-Hang Chan, Yan Zhu, Iok-Meng Ho, Wai-Hong Zhang, Seng-Pan U, Rui Paulo Martins:
16.4 A 5mW 7b 2.4GS/s 1-then-2b/cycle SAR ADC with background offset calibration. ISSCC 2017: 282-283 - [c118]Mo Huang, Yan Lu, Seng-Pan U, Rui Paulo Martins:
20.4 An output-capacitor-free analog-assisted digital low-dropout regulator with tri-loop control. ISSCC 2017: 342-343 - [c117]Junmin Jiang, Yan Lu, Wing-Hung Ki, Seng-Pan U, Rui Paulo Martins:
20.5 A dual-symmetrical-output switched-capacitor converter with dynamic power cells and minimized cross regulation for application processors in 28nm CMOS. ISSCC 2017: 344-345 - [c116]Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Wing-Hung Ki, Rui Paulo Martins:
22.2 A 1.7mm2 inductorless fully integrated flipping-capacitor rectifier (FCR) for piezoelectric energy harvesting with 483% power-extraction enhancement. ISSCC 2017: 372-373 - [c115]Mo Huang, Yan Lu, Seng-Pan U, Rui Paulo Martins:
22.4 A reconfigurable bidirectional wireless power transceiver with maximum-current charging mode and 58.6% battery-to-battery efficiency. ISSCC 2017: 376-377 - [c114]Wei-Han Yu, Haidong Yi, Pui-In Mak, Jun Yin, Rui Paulo Martins:
24.4 A 0.18V 382µW bluetooth low-energy (BLE) receiver with 1.33nW sleep power for energy-harvesting applications in 28nm CMOS. ISSCC 2017: 414-415 - 2016
- [j53]Suyan Fan, Man-Kay Law, Mingzhong Li, Zhiyuan Chen, Chio-In Ieong, Pui-In Mak, Rui Paulo Martins:
Wide Input Range Supply Voltage Tolerant Capacitive Sensor Readout Using On-Chip Solar Cell. J. Circuits Syst. Comput. 25(1): 1640006:1-1640006:21 (2016) - [j52]Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A 6 b 5 GS/s 4 Interleaved 3 b/Cycle SAR ADC. IEEE J. Solid State Circuits 51(2): 365-377 (2016) - [j51]Yan Zhu, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins:
An 11b 450 MS/s Three-Way Time-Interleaved Subranging Pipelined-SAR ADC in 65 nm CMOS. IEEE J. Solid State Circuits 51(5): 1223-1234 (2016) - [j50]Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A µNMR CMOS Transceiver Using a Butterfly-Coil Input for Integration With a Digital Microfluidic Device Inside a Portable Magnet. IEEE J. Solid State Circuits 51(10): 2274-2286 (2016) - [j49]Jun Yin, Pui-In Mak, Franco Maloberti, Rui Paulo Martins:
A Time-Interleaved Ring-VCO with Reduced 1/f3 Phase Noise Corner, Extended Tuning Range and Inherent Divided Output. IEEE J. Solid State Circuits 51(12): 2979-2991 (2016) - [j48]Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A 2-µW 45-nV/√Hz Readout Front End With Multiple-Chopping Active-High-Pass Ripple Reduction Loop and Pseudofeedback DC Servo Loop. IEEE Trans. Circuits Syst. II Express Briefs 63-II(4): 351-355 (2016) - [j47]Mo Huang, Yan Lu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A Fully Integrated Digital LDO With Coarse-Fine-Tuning and Burst-Mode Operation. IEEE Trans. Circuits Syst. II Express Briefs 63-II(7): 683-687 (2016) - [j46]Mo Huang, Yan Lu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins, Wing-Hung Ki:
Limit Cycle Oscillation Reduction for Digital Low Dropout Regulators. IEEE Trans. Circuits Syst. II Express Briefs 63-II(9): 903-907 (2016) - [j45]Yan Zhu, Chi-Hang Chan, Si-Seng Wong, Seng-Pan U, Rui Paulo Martins:
Histogram-Based Ratio Mismatch Calibration for Bridge-DAC in 12-bit 120 MS/s SAR ADC. IEEE Trans. Very Large Scale Integr. Syst. 24(3): 1203-1207 (2016) - [j44]Jianwei Liu, Yan Zhu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Paulo da Silva Martins:
Uniform Quantization Theory-Based Linearity Calibration for Split Capacitive DAC in an SAR ADC. IEEE Trans. Very Large Scale Integr. Syst. 24(7): 2603-2607 (2016) - [c113]Mo Huang, Yan Lu, Seng-Pan U, Rui Paulo Martins:
A digital LDO with transient enhancement and limit cycle oscillation reduction. APCCAS 2016: 25-28 - [c112]Chak-Fong Cheang, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins:
Time-domain I/Q-LOFT compensator using a simple envelope detector for a sub-GHz IEEE 802.11af WLAN transmitter. ASP-DAC 2016: 3-4 - [c111]Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Sio-Hang Pun, Rui Paulo Martins:
Sub-threshold VLSI logic family exploiting unbalanced pull-up/down network, logical effort and inverse-narrow-width techniques. ASP-DAC 2016: 15-16 - [c110]Chio-In Ieong, Pui-In Mak, Mang I Vai, Rui Paulo Martins:
Sub-µW QRS detection processor using quadratic spline wavelet transform and maxima modulus pair recognition for power-efficient wireless arrhythmia monitoring. ASP-DAC 2016: 21-22 - [c109]Yuan Ren, Sai-Weng Sin, Chi-Seng Lam, Man-Chung Wong, Seng-Pan U, Rui Paulo Martins:
A high DR multi-channel stage-shared hybrid front-end for integrated power electronics controller. A-SSCC 2016: 57-60 - [c108]Chi-Hang Chan, Yan Zhu, Iok-Meng Ho, Wai-Hong Zhang, Chon-Lam Lio, Seng-Pan U, Rui Paulo Martins:
A 0.011mm2 60dB SNDR 100MS/s reference error calibrated SAR ADC with 3pF decoupling capacitance for reference voltages. A-SSCC 2016: 145-148 - [c107]Jianyu Zhong, Yan Zhu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A 12b 180MS/s 0.068mm2 pipelined-SAR ADC with merged-residue DAC for noise reduction. ESSCIRC 2016: 169-172 - [c106]Dante Gabriel Muratore, Alper Akdikmen, Edoardo Bonizzoni, Franco Maloberti, U. Fat Chio, Sai-Weng Sin, Rui Paulo Martins:
An 8-bit 0.7-GS/s single channel flash-SAR ADC in 65-nm CMOS technology. ESSCIRC 2016: 421-424 - [c105]Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A high-Q spiral inductor with dual-layer patterned floating shield in a class-B VCO achieving a 190.5-dBc/Hz FoM. ISCAS 2016: 2759-2762 - [c104]Wei Li, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A 94-dB DR, 105-Hz bandwidth interface circuit for inertial navigation applications. ISIC 2016: 1-4 - [c103]Jun Yin, Pui-In Mak, Franco Maloberti, Rui Paulo Martins:
2.7 A 0.003mm2 1.7-to-3.5GHz dual-mode time-interleaved ring-VCO achieving 90-to-150kHz 1/f3 phase-noise corner. ISSCC 2016: 48-49 - [c102]Gengzhen Qi, Pui-In Mak, Rui Paulo Martins:
26.9 A 0.038mm2 SAW-less multiband transceiver using an N-Path SC gain loop. ISSCC 2016: 452-454 - [c101]Ka-Meng Lei, Hadi Heidari, Pui-In Mak, Man-Kay Law, Franco Maloberti, Rui Paulo Martins:
28.1 A handheld 50pM-sensitivity micro-NMR CMOS platform with B-field stabilization for multi-type biological/chemical assays. ISSCC 2016: 474-475 - 2015
- [j43]Da Feng, Franco Maloberti, Sai-Weng Sin, Rui Paulo Martins:
Polyphase Decomposition for Tunable Band-Pass Sigma-Delta A/D Converters. IEEE J. Emerg. Sel. Topics Circuits Syst. 5(4): 537-547 (2015) - [j42]Md. Tawfiq Amin, Pui-In Mak, Rui Paulo Martins:
A 3.6-mW 6-GHz current-reuse VCO-buffer with improved load drivability in 65-nm CMOS. Int. J. Circuit Theory Appl. 43(1): 133-138 (2015) - [j41]Yaohua Zhao, Pui-In Mak, Rui Paulo Martins, Franco Maloberti:
A 0.02 mm2 59.2 dB SFDR 4th-Order SC LPF With 0.5-to-10 MHz Bandwidth Scalability Exploiting a Recycling SC-Buffer Biquad. IEEE J. Solid State Circuits 50(9): 1988-2001 (2015) - [j40]Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins, Franco Maloberti:
Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier With Enhancements of DC Gain, GBW and Slew Rate. IEEE J. Solid State Circuits 50(10): 2353-2366 (2015) - [j39]P. V. Ananda Mohan, Yaohua Zhao, Pui-In Mak, Rui Paulo Martins, Franco Maloberti:
Corrections to "A 0.02 mm2 59.2 dB SFDR 4th-Order SC LPF With 0.5-to-10 MHz Bandwidth Scalability Exploiting a Recycling SC-Buffer Biquad". IEEE J. Solid State Circuits 50(10): 2464 (2015) - [j38]Zushu Yan, Wei Wang, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A 0.0045-mm2 32.4-µW Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation. IEEE Trans. Circuits Syst. II Express Briefs 62-II(3): 246-250 (2015) - [j37]Chak-Fong Cheang, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A Combinatorial Impairment-Compensation Digital Predistorter for a Sub-GHz IEEE 802.11af-WLAN CMOS Transmitter Covering a 10x-Wide RF Bandwidth. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(4): 1025-1032 (2015) - [j36]Jianyu Zhong, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
Thermal and Reference Noise Analysis of Time-Interleaving SAR and Partial-Interleaving Pipelined-SAR ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(9): 2196-2206 (2015) - [j35]Yaohua Zhao, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
Improving the Linearity and Power Efficiency of Active Switched-Capacitor Filters in a Compact Die Area. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 3104-3108 (2015) - [j34]Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Sio-Hang Pun, Rui Paulo Martins:
Energy Optimized Subthreshold VLSI Logic Family With Unbalanced Pull-Up/Down Network and Inverse Narrow-Width Techniques. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 3119-3123 (2015) - [c100]Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A μNMR CMOS transceiver using a butterfly-coil input for integration with a digital microfluidic device inside a portable magnet. A-SSCC 2015: 1-4 - [c99]Jianwei Liu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A 89fJ-FOM 6-bit 3.4GS/s flash ADC with 4x time-domain interpolation. A-SSCC 2015: 1-4 - [c98]Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
26.5 A 5.5mW 6b 5GS/S 4×-lnterleaved 3b/cycle SAR ADC in 65nm CMOS. ISSCC 2015: 1-3 - [c97]Zhicheng Lin, Pui-In Mak, Rui Paulo Martins:
2.4 A 0.028mm2 11mW single-mixing blocker-tolerant receiver with double-RF N-path filtering, S11 centering, +13dBm OB-IIP3 and 1.5-to-2.9dB NF. ISSCC 2015: 1-3 - [c96]Yan Lu, Junmin Jiang, Wing-Hung Ki, C. Patrick Yue, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
20.4 A 123-phase DC-DC converter-ring with fast-DVS for microprocessors. ISSCC 2015: 1-3 - 2014
- [j33]Pui-In Mak, Miao Liu, Yaohua Zhao, Rui Paulo Martins:
Enhancing the performances of recycling folded cascode OpAmp in nanoscale CMOS through voltage supply doubling and design for reliability. Int. J. Circuit Theory Appl. 42(6): 605-619 (2014) - [j32]Zhicheng Lin, Pui-In Mak, Rui Paulo Martins:
A 2.4 GHz ZigBee Receiver Exploiting an RF-to-BB-Current-Reuse Blixer + Hybrid Filter Topology in 65 nm CMOS. IEEE J. Solid State Circuits 49(6): 1333-1344 (2014) - [j31]Fujian Lin, Pui-In Mak, Rui Paulo Martins:
An RF-to-BB-Current-Reuse Wideband Receiver With Parallel N-Path Active/Passive Mixers and a Single-MOS Pole-Zero LPF. IEEE J. Solid State Circuits 49(11): 2547-2559 (2014) - [j30]Zhicheng Lin, Pui-In Mak, Rui Paulo Martins:
A Sub-GHz Multi-ISM-Band ZigBee Receiver Using Function-Reuse and Gain-Boosted N-Path Techniques for IoT Applications. IEEE J. Solid State Circuits 49(12): 2990-3004 (2014) - [j29]Zhicheng Lin, Pui-In Mak, Rui Paulo Martins:
Analysis and Modeling of a Gain-Boosted N-Path Switched-Capacitor Bandpass Filter. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(9): 2560-2568 (2014) - [j28]Yan Zhu, Chi-Hang Chan, U. Fat Chio, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins, Franco Maloberti:
Split-SAR ADCs: Improved Linearity With Power and Speed Optimization. IEEE Trans. Very Large Scale Integr. Syst. 22(2): 372-383 (2014) - [c95]Shiheng Yang, Pui-In Mak, Rui Paulo Martins:
A 104μW EMI-resisting bandgap voltage reference achieving -20dB PSRR, and 5% DC shift under a 4dBm EMI level. APCCAS 2014: 57-60 - [c94]Diyang Zhao, Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
Design considerations of a low-noise receiver front-end and its spiral coil for portable NMR screening. APCCAS 2014: 403-406 - [c93]Yan Zhu, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins:
An 11b 900 MS/s time-interleaved sub-ranging pipelined-SAR ADC. ESSCIRC 2014: 211-214 - [c92]Da Feng, Franco Maloberti, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
Jitter-resistant Capacitor Based Sine-Shaped DAC for Continuous-Time Sigma-Delta modulators. ISCAS 2014: 1348-1351 - [c91]Wei Wang, Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
Micropower two-stage amplifier employing recycling current-buffer Miller compensation. ISCAS 2014: 1889-1892 - [c90]Suyan Fan, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A 0.3-V, 37.5-nW 1.5∼6.5-pF-input-range supply voltage tolerant capacitive sensor readout. ISIC 2014: 388-391 - [c89]Fujian Lin, Pui-In Mak, Rui Paulo Martins:
3.9 An RF-to-BB current-reuse wideband receiver with parallel N-path active/passive mixers and a single-MOS pole-zero LPF. ISSCC 2014: 74-75 - [c88]Zhicheng Lin, Pui-In Mak, Rui Paulo Martins:
9.4 A 0.5V 1.15mW 0.2mm2 Sub-GHz ZigBee receiver supporting 433/860/915/960MHz ISM bands with zero external components. ISSCC 2014: 164-165 - [c87]Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins, Franco Maloberti:
17.2 A 0.0013mm2 3.6μW nested-current-mirror single-stage amplifier driving 0.15-to-15nF capacitive loads with >62° phase margin. ISSCC 2014: 288-289 - 2013
- [j27]Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A 0.016-mm2 144-µW Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load With > 0.95-MHz GBW. IEEE J. Solid State Circuits 48(2): 527-540 (2013) - [j26]Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
Correction to "A 0.016 mm2 144-µW Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load With >0.95-MHz GBW". IEEE J. Solid State Circuits 48(6): 1539 (2013) - [j25]Si-Seng Wong, U-Fat Chio, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A 2.3 mW 10-bit 170 MS/s Two-Step Binary-Search Assisted Time-Interleaved SAR ADC. IEEE J. Solid State Circuits 48(8): 1783-1794 (2013) - [j24]Ka-Fai Un, Pui-In Mak, Rui Paulo Martins:
A 53-to-75-mW, 59.3-dB HRR, TV-Band White-Space Transmitter Using a Low-Frequency Reference LO in 65-nm CMOS. IEEE J. Solid State Circuits 48(9): 2078-2089 (2013) - [j23]Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins, Franco Maloberti:
A 5-Bit 1.25-GS/s 4x-Capacitive-Folding Flash ADC in 65-nm CMOS. IEEE J. Solid State Circuits 48(9): 2154-2169 (2013) - [j22]Tan-Tan Zhang, Pui-In Mak, Mang I Vai, Peng Un Mak, Man-Kay Law, Sio-Hang Pun, Feng Wan, Rui Paulo Martins:
15-nW Biopotential LPFs in 0.35-µm CMOS Using Subthreshold-Source-Follower Biquads With and Without Gain Compensation. IEEE Trans. Biomed. Circuits Syst. 7(5): 690-702 (2013) - [j21]Wei-Han Yu, Chak-Fong Cheang, Pui-In Mak, Weng-Fai Cheng, Ka-Fai Un, U-Wai Lok, Rui Paulo Martins:
A Nonrecursive Digital Calibration Technique for Joint Elimination of Transmitter and Receiver I/Q Imbalances With Minimized Add-On Hardware. IEEE Trans. Circuits Syst. II Express Briefs 60-II(8): 462-466 (2013) - [c86]Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Rui Paulo Martins:
Sub-threshold standard cell library design for ultra-low power biomedical applications. EMBC 2013: 1454-1457 - [c85]Yun Du, Tao He, Yang Jiang, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins:
A continuous-time VCO-assisted VCO-based ΣΔ modulator with 76.6dB SNDR and 10MHz BW. ISCAS 2013: 373-376 - [c84]Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
A 1.83 μW, 0.78 μVrms input referred noise neural recording front end. ISCAS 2013: 405-408 - [c83]Wen-Lan Wu, Yan Zhu, Li Ding, Chi-Hang Chan, U. Fat Chio, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins:
A 0.6V 8b 100MS/s SAR ADC with minimized DAC capacitance and switching energy in 65nm CMOS. ISCAS 2013: 2239-2242 - [c82]Md. Tawfiq Amin, Pui-In Mak, Rui Paulo Martins:
A 0.5V 10GHz 8-phase LC-VCO Combining current-reuse and back-gate-coupling techniques consuming 2mW. ISCAS 2013: 2698-2701 - [c81]Zhicheng Lin, Pui-In Mak, Rui Paulo Martins:
A 1.7mW 0.22mm2 2.4GHz ZigBee RX exploiting a current-reuse blixer + hybrid filter topology in 65nm CMOS. ISSCC 2013: 448-449 - [c80]Li Ding, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A background gain- calibration technique for low voltage pipelined ADCs based on nonlinear interpolation. MWSCAS 2013: 665-668 - 2012
- [j20]Yan Zhu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins, Franco Maloberti:
A 50-fJ 10-b 160-MS/s Pipelined-SAR ADC Decoupled Flip-Around MDAC and Self-Embedded Offset Cancellation. IEEE J. Solid State Circuits 47(11): 2614-2626 (2012) - [j19]He Gong Wei, Chi-Hang Chan, U. Fat Chio, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins, Franco Maloberti:
An 8-b 400-MS/s 2-b-Per-Cycle SAR ADC With Resistive DAC. IEEE J. Solid State Circuits 47(11): 2763-2772 (2012) - [j18]Chio-In Ieong, Pui-In Mak, Chi-Pang Lam, Cheng Dong, Mang I Vai, Peng Un Mak, Sio-Hang Pun, Feng Wan, Rui Paulo Martins:
A 0.83-µW QRS Detection Processor Using Quadratic Spline Wavelet Transform for Wireless ECG Acquisition in 0.35-µm CMOS. IEEE Trans. Biomed. Circuits Syst. 6(6): 586-595 (2012) - [c79]Yun Du, Tao He, Yang Jiang, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A robust NTF zero optimization technique for both low and high OSRs sigma-delta modulators. APCCAS 2012: 29-32 - [c78]Tao He, Yun Du, Yang Jiang, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A DT 0-2 MASH ΣΔ modulator with VCO-based quantizer for enhanced linearity. APCCAS 2012: 33-36 - [c77]Yinsidi Jiao, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A dynamic-range-improved 2.4GHz WLAN class-E PA combining PWPM and cascode modulation. APCCAS 2012: 148-151 - [c76]Wen-Lan Wu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins:
A 10-bit SAR ADC with two redundant decisions and splitted-MSB-cap DAC array. APCCAS 2012: 268-271