default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDISCAS 2004: Vancouver, BC, Canada - Volume 1
- Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004. IEEE 2004, ISBN 0-7803-8251-X
- Arun Ravindran, Anup Savla, Jennifer Leonard:
Digital error correction and calibration of gain non-linearities in a pipelined ADC. 1-4 - Kamal El-Sankary, Mohamad Sawan:
A new digital background calibration technique for pipelined ADC. 5-8 - Tae-Hwan Oh, Ho-Young Lee, Ho-Jin Park, Jae-Whui Kim:
A 1.8V 8-bit 250Msample/s Nyquist-rate CMOS pipelined ADC. 9-12 - Martin Kinyua, Franco Maloberti, William Gosney:
Digital background auto-calibration of DAC non-linearity in pipelined ADCs. 13-16 - Peter Bogner:
A 28mW 10b 80MS/s pipelined ADC in 0.13µm CMOS. 17-20 - Jader A. De Lima, Fernando M. Alcaide:
On designing linearly tunable high-Q OTA-C filters with low sensitivity. 21-24 - Francisco Serra-Graells
, Xavier Redondo:
Exact design of all-MOS log filters. 25-28 - Pamela Abshire, Eric Liu Wong, Yiming Zhai, Marc H. Cohen:
Adaptive log domain filters using floating gate transistors. 29-32 - Ravi Chawla, Haw-Jing Lo, Arindam Basu, Paul E. Hasler, Bradley A. Minch:
A fully programmable log-domain bandpass filter using multiple-input translinear elements. 33-36 - Chun-Ming Chang:
6.61MHz to 317MHz nth-order current-mode low-pass and high-pass OTA-only-without-C filter. ISCAS (1) 2004: 37-40 - Ming-Dou Ker, Jung-Sheng Chen, Ching-Yun Chu:
A CMOS bandgap reference circuit for sub-1-V operation without using extra low-threshold-voltage device. ISCAS (1) 2004: 41-44 - Armin Tajalli, Seyed Mojtaba Atarodi, Abbas Khodaverdi, Farzad Sahandi Esfanjani:
Design and optimization of a high PSRR CMOS bandgap voltage reference. 45-48 - Chi Yat Leung, Ka Nang Leung, Philip K. T. Mok:
Design of a 1.5-V high-order curvature-compensated CMOS bandgap reference. 48-52 - Laleh Najafizadeh, Igor M. Filanovsky:
Towards a sub-1 V CMOS voltage reference. ISCAS (1) 2004: 53-56 - Ferdinando Bedeschi, Edoardo Bonizzoni, Andrea Fantini, Claudio Resta, Guido Torelli:
A low-power low-voltage MOSFET-only voltage reference. 57-60 - Hanjun Jiang, Haibo Fei, Degang Chen, Randall L. Geiger:
A background digital self-calibration scheme for pipelined ADCs based on transfer curve estimation. 61-64 - Anup Savla, Jennifer Leonard, Arun Ravindran:
A novel queuing architecture for background calibration of pipeline ADCs. ISCAS (1) 2004: 65-68 - Reza Lotfi, Mohammad Taherzadeh-Sani, Omid Shoaei:
A 12-bit 40MSPS 3.3-V 56-mW pipelined A/D convereter in 0.25-µm CMOS [convereter read converter]. ISCAS (1) 2004: 69-72 - Babak Nejati, Omid Shoaei:
A 10-bit, 3.3-V, 60MSample/s, combined radix<2 and 1.5-bit/stage pipelined analog-to-digital converter. ISCAS (1) 2004: 73-76 - Hamid Movahedian, Meysam Azin, Mehrdad Sharif Bakhtiar:
A low voltage low power 8-bit folding/interpolating ADC with rail-to-rail input range. ISCAS (1) 2004: 77-80 - Tom J. Kazmierski, Fazrena A. Hamid:
Behavioral modelling of RF filters in VHDL-AMS for automated architectural and parametric optimization. ISCAS (1) 2004: 81-84 - José L. Ausín, J. Francisco Duque-Carrillo, Guido Torelli, Miguel Angel Domínguez:
A design strategy for area efficient high-order high-Q SC filters. ISCAS (1) 2004: 85-88 - Drazen Jurisic, George S. Moschytz, Neven Mijat:
Low active-sensitivity allpole active-RC filters using impedance tapering. ISCAS (1) 2004: 89-92 - Taner Sumesaglam, Aydin I. Karsilayan:
Digital tuning of analog bandpass filters based on envelope detection. ISCAS (1) 2004: 93-96 - David W. Graham, Paul D. Smith, Richard Ellis, Ravi Chawla, Paul E. Hasler:
A programmable bandpass array using floating-gate elements. ISCAS (1) 2004: 97-100 - Bo Shi, Michael Yan Wah Chia:
Design of a SiGe low-noise amplifier for 3.1-10.6 GHz ultra-wideband radio. ISCAS (1) 2004: 101-104 - Su-Tarn Lim, John R. Long:
A feedforward compensated high-linearity differential transconductor for RF applications. ISCAS (1) 2004: 105-108 - Sumit Bagga, Giuseppe de Vita, Sandro A. P. Haddad, Wouter A. Serdijn, John R. Long:
A PPM Gaussian pulse generator for ultra-wideband communications. ISCAS (1) 2004: 109-112 - Xuejin Wang, Aykut Dengi, Sayfe Kiaei:
A high IIP3 X-band BiCMOS mixer for radar applications. ISCAS (1) 2004: 113-116 - Jinho Park, David J. Allstot:
A 12.5 GHz RF matrix amplifier in 180nm SOI CMOS. 117-20 - Pedro M. Figueiredo, João C. Vital:
Termination of averaging networks in flash ADCs. ISCAS (1) 2004: 121-124 - Chun-Cheng Huang, Jieh-Tsorng Wu:
A statistical background calibration technique for flash analog-to-digital converters. 125-128 - Erik Säll, Mark Vesterbacka, K. Ola Andersson:
A study of digital decoders in flash analog-to-digital converters. ISCAS (1) 2004: 129-132 - Ovidiu Carnu, Adrian Leuciuc:
Optimal offset averaging for flash and folding A/D converters. ISCAS (1) 2004: 133-136 - Quentin Diduck, Martin Margala:
6-bit low power low area frequency modulation based flash ADC. ISCAS (1) 2004: 137-140 - Igor M. Filanovsky, Arie van Staveren, Chris J. M. Verhoeven:
Synthesis of amplifier transfer function using time-domain response. 141-144 - Sandro A. P. Haddad, Nanko Verwaal, Richard Houben, Wouter A. Serdijn:
Optimized dynamic translinear implementation of the Gaussian wavelet transform. ISCAS (1) 2004: 145-148 - Mladen Vucic, Goran Molnar, Hrvoje Babic:
Method for equalizer design based on time-domain symmetry. ISCAS (1) 2004: 149-152 - Roberto Gómez-García, José I. Alonso:
Exact synthesis of bandpass responses using an isolated cascade connection of same order lowpass and highpass filters. ISCAS (1) 2004: 153-156 - Yannis P. Tsividis:
Mixing domains in signal processing. ISCAS (1) 2004: 157-160 - Luca Romanò, Salvatore Levantino, Andrea Bonfanti, Carlo Samori, Andrea L. Lacaita:
Phase noise and accuracy in quadrature oscillators. ISCAS (1) 2004: 161-164 - Luís Bica Oliveira, Jorge R. Fernandes, Igor M. Filanovsky, Chris J. M. Verhoeven:
A 2.4 GHz CMOS quadrature LC-oscillator/mixer. ISCAS (1) 2004: 165-168 - Paola Tortori, Davide Guermandi, Eleonora Franchi, Antonio Gnudi:
Quadrature VCO based on direct second harmonic locking. ISCAS (1) 2004: 169-172 - Sebastian Magierowski, Krzysztof Iniewski, Stefan Zukotynski:
A wideband LC-VCO with enhanced PSRR for SOC applications. ISCAS (1) 2004: 173-176 - Aleksandar Tasic, Wouter A. Serdijn, John R. Long:
DCS1800/WCDMA adaptive voltage-controlled oscillator. ISCAS (1) 2004: 177-180 - Lourans Samid, Patrick Volz, Yiannos Manoli:
A dynamic analysis of a latched CMOS comparator. 181-184 - Herng-Jer Lee, Chia-Chi Chu, Wu-Shiung Feng:
Generalizations of adjoint networks technique for RLC interconnects model-order reductions. ISCAS (1) 2004: 185-188 - Shyam Subramanian, David V. Anderson, Paul E. Hasler:
Synthesis of static multiple input multiple output MITE networks. ISCAS (1) 2004: 189-192 - Makeswaran Loganathan, Suvarcha Malhotra, Pamela Abshire:
Information capacity and power efficiency in operational transconductance amplifiers. ISCAS (1) 2004: 193-196 - Arvind Kumar, Sandip Tiwari:
A power-performance adaptive low voltage analog circuit design using independently controlled double gate CMOS technology. ISCAS (1) 2004: 197-200 - Haibin Huang, Ezz I. El-Masry:
An 89dB low-power CMOS Sigma Delta modulator for Bluetooth application. ISCAS (1) 2004: 201-204 - José M. García-González, Sara Escalera, José M. de la Rosa, Oscar Guerra, Fernando Medeiro, Rocío del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez:
A 0.35µm CMOS 17-bit@40kS/s sensor A/D interface based on a programmable-gain cascade 2-1 Sigma Delta modulator. 205-208 - Olujide A. Adeniran, Andreas Demosthenous, Chris Clifton, Sam Atungsiri, Randeep Soin:
A CMOS low-power ADC for DVB-T and DVB-H systems. ISCAS (1) 2004: 209-212 - Angelo W. Pereira, Daniel J. Allen, Paul E. Hasler:
A 0.5µm CMOS programmable discrete-time Delta-Sigma modulator with floating gate elements. ISCAS (1) 2004: 213-216 - Sami Karvonen, Tom A. D. Riley, Juha Kostamovaara:
A 50-MHz CMOS quadrature charge sampling circuit with 66 dB SFDR. ISCAS (1) 2004: 217-220 - Omid Oliaei:
Spectral analysis of signals experiencing nonstationary stochastic time-shifts. ISCAS (1) 2004: 221-224 - Reuben Wilcock, Bashir M. Al-Hashimi:
Power-conscious design methodology for class-A switched-current wave filters. ISCAS (1) 2004: 225-228 - Ralf M. Philipp, Ralph Etienne-Cummings:
Low power current rectifiers for large scale current-mode signal processing. ISCAS (1) 2004: 229-232 - Phil Corbishley, Esther Rodríguez-Villegas, Chris Toumazou:
An ultra-low power analogue directionality system for digital hearing aids. ISCAS (1) 2004: 233-236 - Chengming He, Kuangming Yap, Degang Chen, Randall L. Geiger:
NTH order circular symmetry pattern and hexagonal tesselation: two new layout techniques cancelling nonlinear gradient. ISCAS (1) 2004: 237-240 - Jangsup Yoon, William R. Eisenstadt:
Lumped passive circuits for 5GHz embedded test of RF SoCs. ISCAS (1) 2004: 241-244 - Qizhang Yin, Robert M. Fox, William R. Eisenstadt:
A translinear-based RF RMS detector for embedded test. ISCAS (1) 2004: 245-248 - Zhongjun Yu, Degang Chen, Randall L. Geiger:
The SRE/SRM approach for spectral testing of AMS circuits. ISCAS (1) 2004: 249-252 - Peter M. Levine, Gordon W. Roberts:
A calibration technique for a high-resolution flash time-to-digital converter. ISCAS (1) 2004: 253-256 - Sara Escalera, José M. García-González, Oscar Guerra, José M. de la Rosa, Fernando Medeiro, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez:
An alternative DFT methodology to test high-resolution Sigma Delta modulators. ISCAS (1) 2004: 257-260 - Igor M. Filanovsky:
Reactance network shaping a sinusoidal pulse with sinusoidal envelope of finite duration. ISCAS (1) 2004: 261-264 - Ernst Goepel:
Active RC networks: what benefit is there in having conjugate real zeros in the second-order transfer function? ISCAS (1) 2004: 265-268 - Timo Rahkonen, Jyri Kortekangas:
Mixed-mode parameter analysis of fully differential circuits. ISCAS (1) 2004: 269-272 - Herminio Martínez, Eva Vidal, Eduard Alarcón, Alberto Poveda:
Dynamic modelling of analog integrated filters for the stability study of on-chip automatic tuning loops. ISCAS (1) 2004: 273-276 - Tetsuo Nishi, Masato Ogata:
Simultaneous realization of Z21/Z11 and Y21 of an RC two-port. ISCAS (1) 2004: 277-280 - Sunil Rafeeque, Vinita Vasudevan:
An on-chip DNL estimation and reconfiguration for improved linearity in current steering DAC. ISCAS (1) 2004: 281-284 - Martin Clara, Andreas Wiesbauer, Wolfgang Klatzer:
Nonlinear distortion in current-steering D/A-converters due to asymmetrical switching errors. ISCAS (1) 2004: 285-288 - Matthias Keller, Yiannos Manoli, Friedel Gerfers:
A calibration method for current steering digital to analog converters in continuous time multi-bit sigma delta modulators. ISCAS (1) 2004: 289-292 - Tao Chen, Georges G. E. Gielen:
Modelling of the impact of the current source output impedance on the SFDR of current-steering CMOS D/A converters. ISCAS (1) 2004: 293-296 - Jussi Pirkkalaniemi, Marko Kosunen, Mikko Waltari, Kari Halonen:
A digital calibration for a 16-bit, 400-MHz current-steering DAC. ISCAS (1) 2004: 297-300 - Teresa Serrano-Gotarredona, Rafael Serrano-Gotarredona, Bernabé Linares-Barranco:
Hardware implementation of complex reaction-diffusion neural networks using log-domain techniques. ISCAS (1) 2004: 301-304 - Vishnu Ravinuthula, John G. Harris:
Time-based arithmetic using step functions. ISCAS (1) 2004: 305-308 - Ethan Farquhar, Paul E. Hasler:
A bio-physically inspired silicon neuron. ISCAS (1) 2004: 309-312 - Ethan Farquhar, David N. Abramson, Paul E. Hasler:
A reconfigurable bidirectional active 2 dimensional dendrite model. ISCAS (1) 2004: 313-316 - Christal Gordon, Ethan Farquhar, Paul E. Hasler:
A family of floating-gate adapting synapses based upon transistor channel models. 317-20 - Ming-Dou Ker, Shih-Lun Chen, Chia-Sheng Tsai:
A new charge pump circuit dealing with gate-oxide reliability issue in low-voltage processes. ISCAS (1) 2004: 321-324 - Susanta Sengupta, Kanan Saurabh, Phillip E. Allen:
A process, voltage, and temperature compensated CMOS constant current reference. ISCAS (1) 2004: 325-328 - Chua-Chin Wang, Yih-Long Tseng, Tzung-Je Lee, Ron Hu:
High-PSR bias circuitry for NTSC sync separation. ISCAS (1) 2004: 329-332 - Edgar Mauricio Camacho-Galeano, Carlos Galup-Montoro, Márcio C. Schneider:
Design of an ultra-low-power current source. ISCAS (1) 2004: 333-336 - Tobi Delbruck, André van Schaik:
Bias current generators with wide dynamic range. ISCAS (1) 2004: 337-340 - Marc Pastre, Maher Kayal:
High-precision DAC based on a self-calibrated sub-binary radix converter. ISCAS (1) 2004: 341-344 - Jeroen De Maeyer, Pieter Rombouts, Ludo Weyten:
Addressing static and dynamic errors in bandpass unit element multibit DAC's. ISCAS (1) 2004: 345-348 - Saeed Saeedi, Saeid Mehrmanesh, Seyed Mojtaba Atarodi, Hesam Amir Aslanzadeh:
A 1-V 400MS/s 14bit self-calibrated CMOS DAC with enhanced dynamic linearity. 349-352 - Kuo-Hsing Cheng, Tsung-Shen Chen, Chia Ming Tu:
A 14-bit, 200 MS/s digital-to-analog converter without trimming. ISCAS (1) 2004: 353-358 - Guillermo J. Serrano, Paul E. Hasler:
A floating-gate DAC array. ISCAS (1) 2004: 357-360 - Bernabé Linares-Barranco, Teresa Serrano-Gotarredona, Rafael Serrano-Gotarredona, Luis A. Camuñas:
On leakage current temperature characterization using sub-pico-ampere circuit techniques. ISCAS (1) 2004: 361-364 - Inchang Seo, Robert M. Fox:
Comparison of quasi-/pseudo-floating gate techniques. ISCAS (1) 2004: 365-368 - Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins:
A generalized timing-skew-free, multi-phase clock generation platform for parallel sampled-data systems. ISCAS (1) 2004: 369-372 - Guillermo J. Serrano, Paul D. Smith, Haw-Jing Lo, Ravi Chawla, Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler:
Automatic rapid programming of large arrays of floating-gate elements. ISCAS (1) 2004: 373-376 - Bernabé Linares-Barranco, Teresa Serrano-Gotarredona, Rafael Serrano-Gotarredona, Gustavo Vicente-Sánchez:
On mismatch properties of MOS and resistors calibrated ladder structures. ISCAS (1) 2004: 377-380 - Ilkka Nissinen, Juha Kostamovaara:
A low voltage CMOS constant current-voltage reference circuit. ISCAS (1) 2004: 381-384 - Ka Nang Leung, Philip K. T. Mok, Sai Kit Lau:
A low-voltage CMOS low-dropout regulator with enhanced loop response. ISCAS (1) 2004: 385-388 - Walter Aloisi, Stello Matteo Billé, Gaetano Palumbo:
Low-voltage linear voltage regulator suitable for memories. 389-392 - Vladislav Y. Potanin, Elena E. Potanina:
High-voltage-tolerant power supply in a low-voltage CMOS technology. 393-396 - Preetam Tadeparthy:
A CMOS bandgap reference with correction for device-to-device variation. 397-400 - Pieter Rombouts, Jeroen De Maeyer, Johan Raman, Ludo Weyten:
Systematic design of double-sampling Sigma Delta ADC's with modified NTF. 401-404 - Maurits Ortmanns, Markus Kuderer, Yiannos Manoli, Friedel Gerfers:
A cascaded continuous-time Sigma Delta modulator with 80 dB dynamic range. 405-408 - Ut-Va Koc, Jaesik Lee:
Direct RF sampling continuous-time bandpass Delta-Sigma A/D converter design for 3G wireless applications. 409-412 - Wern Ming Koe, Franco Maloberti:
Feed-forward path and gain-scaling - a swing and distortion reduction scheme for second order sigma-delta modulator. 413-416 - Jannik Hammel Nielsen, Erik Bruun:
A low-power 10-bit continuous-time CMOS Sigma Delta A/D converter. 417-420 - Belén Calvo, Santiago Celma, Maria Teresa Sanz:
CMOS digitally programmable cell for high frequency amplification and filtering. 421-424 - Tomoyuki Nakayama, Toshihiko Yamasaki, Tadashi Shibata:
Quasi-parallel multi-path detection architecture using floating-gate-MOS-based CDMA matched filters. 425-428 - Jacqueline S. Pereira, Antonio Petraglia, Franco Maloberti:
A 0.18µm CMOS SC lowpass filter for Bluetooth channel selection. 429-432 - Shelly Xiao, José B. Silva, Un-Ku Moon, Gabor C. Temes:
A tunable duty-cycle-controlled switched-R-MOSFET-C CMOS filter for low-voltage and high-linearity applications. 433-436 - Sami Karvonen, Tom A. D. Riley, Sami Kurtti, Juha Kostamovaara:
A 50-MHz BiCMOS quadrature charge sampler and complex bandpass SC filter for narrowband applications. 437-440 - Abdelohahab Djemouai, Mohamad Sawan:
New CMOS current-mode amplitude shift keying demodulator (ASKD) dedicated for implantable electronic devices. 441-444 - Alfredo Arnaud, Carlos Galup-Montoro:
A fully integrated 0.5-7 Hz CMOS bandpass amplifier. 445-448 - Timothy G. Constandinou, Julius Georgiou, Chris Toumazou:
A nano-power tuneable edge-detection circuit. 449-452 - Fausto Borghetti, Lorenzo Farina, Piero Malcovati, Franco Maloberti:
A high speed and low power CMOS current comparator for photon counting systems. 453-456 - Harpreet S. Narula, John G. Harris:
VLSI potentiostat for amperometric measurements for electrolytic reactions. 457-460 - Shubha Bommalingaiahnapallya, Ramesh Harjani:
Low power implementation of an n-tone Sigma Delta converter. 461-464 - Mohammad Yavari, Omid Shoaei:
Low-voltage sigma-delta modulator topologies for broadband applications. 465-468 - Mitsuhiko Yagyu, Akinori Nishihara:
Fast and efficient algorithm to design noise-shaping FIR filters for high-order overload-free stable sigma-delta modulators. 469-472 - Kye-Shin Lee, Yunyoung Choi, Franco Maloberti:
Domino free 4-path time-interleaved second order sigma-delta modulator. 473-476 - Ralph Mason, Chris DeVries, Eugene Ivanov:
An RF sub-sampling mixer, PGA and Sigma Delta ADC for conversion at 900 MHz. 477-480 - Chengming He, Le Jin, Degang Chen, Randall L. Geiger:
Robust design of high gain amplifiers using dynamical systems and bifurcation theory. 481-484 - Gaetano Palumbo, Salvatore Pennisi:
Harmonic distortion in three-stage nested-Miller-compensated amplifiers. 485-488 - Craig Petrie, Tianxue Sun, Matthew R. Miller:
A high-gain offset-compensated differential amplifier. 489-492 - Xiaohua Fan, Chinmaya Mishra, Edgar Sánchez-Sinencio:
Single Miller capacitor compensated multistage amplifiers for large capacitive load applications. 493-496 - Preetam Tadeparthy:
An improved frequency compensation techinique for low power, low voltage CMOS amplifiers [techinique read technique]. 497-500 - Andre Vilas Boas, Alfredo Olmos:
A temperature compensated digitally trimmable on-chip IC oscillator with low voltage inhibit capability. 501-504 - Nikolas Stefanou, Sameer R. Sonkusale:
High speed array of oscillator-based truly binary random number generators. 505-508 - Mourad Oulmane, Gordon W. Roberts:
A CMOS time amplifier for Femto-second resolution timing measurement. 509-512 - Jerzy J. Dabrowski:
Fault modeling of RF blocks based on noise analysis. 513-516 - Antonio Petraglia, Jorge M. Cañive, Mariane R. Petraglia:
Accurate fault detection in switched-capacitor filters using structurally allpass building blocks. 517-520 - David I. Bergman, Bryan C. Waltrip:
Low thermal error sampling comparator for accurate settling measurements. 521-524 - Sunwoo Kwon, Franco Maloberti:
Op-amp swing reduction in sigma-delta modulators. 525-528 - Eric Liu Wong, Pamela Abshire, Marc H. Cohen:
Floating gate comparator with automatic offset manipulation functionality. 529-532 - Masaru Chibashi, Keisuke Eguchi, Takao Waho:
A novel delta-sigma modulator using resonant-tunneling quantizers. 533-536 - Pedro M. Figueiredo, João C. Vital:
Low kickback noise techniques for CMOS latched comparators. 537-540 - Chung-Wei Lin, Yen-Zen Liu, Klaus Y. J. Hsu:
A low distortion and fast settling automatic gain control amplifier in CMOS technology. 541-544 - Xian Ping Fan, Pak Kwong Chan:
A CMOS high-speed multistage preamplifier for comparator design. 545-548 - Stanislaw Szczepanski, Slawomir Koziel, Edgar Sánchez-Sinencio:
Linearized CMOS OTA using active-error feedforward technique. 549-552 - Nima Maghari, Mohammad Yavari, Omid Shoaei:
An analytical model for the slewing behavior of CMOS two-stage operational transconductance amplifiers. 553-556 - Gonggui Xu, Haydar Bilhan:
A programmable gain amplifier buffer design for video applications. 557-560 - Hung-Che Wei, Ro-Min Weng, Kun-Yi Lin:
A 1.5 V high-linearity CMOS mixer for 2.4 GHz applications. 561-564 - Vojkan Vidojkovic, Johan van der Tang, Eric Hanssen, Arjan J. Leeuwenburgh, Arthur H. M. van Roermund:
Fully-integrated DECT/Bluetooth multi-band LNA in 0.18µm CMOS. 565-568 - Vojkan Vidojkovic, Johan van der Tang, Eric Hanssen, Arjan J. Leeuwenburgh, Arthur H. M. van Roermund:
Low voltage, low power folded-switching mixer with current-reuse in 0.18µm CMOS. 569-72 - Vojkan Vidojkovic, Johan van der Tang, Eric Hanssen, Arjan J. Leeuwenburgh, Arthur H. M. van Roermund:
A DECT/Bluetooth multi-standard front-end with adaptive image rejection in 0.18µm CMOS. 573-576 - Khurram Muhammad, Robert Bogdan Staszewski:
Direct RF sampling mixer with recursive filtering in charge domain. 577-580 - Rahmi Hezar, Oguz Altun:
A novel single amplifier architecture for second order noise shaping. 581-584 - Gang Xu, Jiren Yuan:
A programmable analog-to-digital converter. 585-588 - Min-Gyu Kim, Gil-Cho Ahn, Un-Ku Moon:
An improved algorithmic ADC clocking scheme. 589-592 - Christian Vogel, Gernot Kubin:
Analysis and compensation of nonlinearity mismatches in time-interleaved ADC arrays. 593-596 - Masaaki Naka, Toshimichi Saito:
Multi-step analog-to-digital converters with trapping window. 597-600 - Yin-Lung Lu, Yi-Cheng Wu, Kyung-Wan Yu, Wei-Li Chen, M. Frank Chang:
Design of a 1.8 V 4.9 ~ 5.9 GHz CMOS broadband low noise amplifier with 0.28 dB gain flatness using AMER inductor loads. 601-604 - Ertan Zencir, Ahmet Tekin, Numan Sadi Dogan, Ercument Arvas:
A low-power DC-7-GHz SOI CMOS distributed amplifier. 605-608 - M. Reza Samadi, Aydin I. Karsilayan, José Silva-Martínez:
Bandwidth enhancement of multi-stage amplifiers using active feedback. 609-612 - Ahmad Yazdi, Payam Heydari:
A novel non-uniform distributed amplifier. 613-616 - Ziad El-Khatib, Leonard MacEachern, Samy A. Mahmoud:
A 0.1-12 GHz fully differential CMOS distributed amplifier employing a feedforward distortion cancellation technique. 617-620 - Paolo Cusinato, Stefano Cipriani, Guglielmo Sirna, Gianni Puccio, Eric Duvivier:
Gain/bandwidth programmable PA control loop for GMS/GPRS quad-band applications. 621-624 - Suhas Kulhalli, Sumantra Seth, Shih-Tsang Fu:
An integrated linear RF power detector. 625-628 - João Ramos, Kenneth Francken, Georges G. E. Gielen, Michiel Steyaert:
Knowledge- and optimization-based design of RF power amplifiers. 629-632 - Jaakko Ketola, Johan Sommarek, Jouko Vankka, Kari Halonen:
Transmitter utilising bandpass delta-sigma modulator and switching mode power amplifier. 633-636 - Dusan M. Milosevic, Johan van der Tang, Arthur H. M. van Roermund:
Intermodulation products in the EER technique applied to class-E amplifiers. 637-640 - Josias O. Mainardi, Adão Antônio de Souza Jr., Luigi Carro, Altamiro Amadeu Susin:
A comparison of totally digital ADCs for SOCs. 641-644 - Zhongjun Yu, Degang Chen, Randall L. Geiger:
Accurate testing of ADC's spectral performance using imprecise sinusoidal excitations. 645-648 - Vincenzo Ferragina, Andrea Fornasari, Umberto Gatti, Piero Malcovati, Franco Maloberti, Luigi Marco, Athos Monfasani:
Use of dynamic element matching in a multi-path sigma-delta modulator. 649-652 - Brent Nordick, Craig S. Petrie, Yongjie Cheng:
Dynamic element matching techniques for delta-sigma ADCs with large internal quantizers. 653-656 - Mikael Gustavsson, Nianxiong Nick Tan:
Decimating SC filter for high speed sigma-delta D/A converters. 657-660 - Shanthi Pavan:
A fixed transconductance bias technique for CMOS analog integrated circuits. 661-664 - Sean Nicolson, Khoman Phang:
Improvements in biasing and compensation of CMOS opamps. 665-668 - George Jie Yuan, Nabil H. Farhat:
A compensation-based optimization methodology for gain-boosted opamp. 669-672 - Chun-Jen Huang, Hong-Yi Huang:
A low-voltage CMOS rail-to-rail operational amplifier using double p-channel differential input pairs. 673-676 - Siddharth Devarajan, Ronald J. Gutmann, Kenneth Rose:
A 87 dB, 2.3 GHz, SiGe BiCMOS operational transconductance amplifier. 677-680 - Jaime Ramírez-Angulo, Shanta Thoutam, Antonio J. López-Martín, Ramón González Carvajal:
Low-voltage CMOS analog four quadrant multiplier based on flipped voltage followers. 681-684 - Mladen Panovic, Andreas Demosthenous:
Compact CMOS linear transconductor and four-quadrant analogue multiplier. 685-688 - Phanumas Khumsat, Apisak Worapishet:
Highly-linear, current-feedback resistive source-degenerated MOS transconductor. 689-692 - Meghraj Kachare, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal:
Compact tunable CMOS OTA with high linearity. 693-696 - Yunbin Deng, Shantanu Chakrabartty, Gert Cauwenberghs:
Three-decade programmable fully differential linear OTA. 697-700 - David G. Haigh, Paul M. Radmore:
Systematic synthesis method for analogue circuits. Part I. Notation and synthesis toolbox. 701-704 - David Haigh, Fang Qun Tan, Christos Papavassiliou:
Systematic synthesis method for analogue circuits. Part II. Active-RC circuit synthesis. 705-708 - David Haigh, Fang Qun Tan, Christos Papavassiliou:
Systematic synthesis method for analogue circuits. Part III. All-transistor circuit synthesis. 709-712 - Herng-Jer Lee, Ming-Hong Lai, Chia-Chi Chu, Wu-Shiung Feng:
Applications of tree/link partitioning for moment computations of general lumped RLC networks with resistor loops. 713-716 - Ganesh Kumar Basnet, Masayuki Yamauchi, Tsuyoshi Otake, Mamoru Tanaka:
New relaxation-based circuit simulator based on fast automatic differentiation. 717-720 - Vadim Ivanov, Igor M. Filanovsky:
Design of class AB output stages using the structural methodology. 721-724 - Marta Laguna Garcia, Carlos Aristoteles De la Cruz-Blas, Antonio Jesús Torralba Silgado, Antonio J. López-Martín, Alfonso Carlosena, Ramón González Carvajal:
A novel low-voltage low-power class-AB linear transconductor. 725-728 - Sushmita Baswa, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal:
A novel family of low-voltage very low power super class AB OTAs with significantly enhanced slew rate and bandwidth. 729-732 - Shanta Thoutam, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal:
Power efficient fully differential low-voltage two stage class AB/AB op-amp architectures. 733-736 - Mohammad Taherzadeh-Sani, Reza Lotfi, Omid Shoaei:
A pseudo-class-AB telescopic-cascode operational amplifier. 737-740 - Paolo Cusinato:
Configurable direct-conversion / superheterodyne baseband down-link channel for W-CDMA applications. 741-744 - Mikko Pänkäälä, Jonne Poikonen, Laura Vesalainen, Ari Paasio:
Realization of an analog current-mode 2D DCT. 745-748 - Masayuki Umejima, Toshihiko Yamasaki, Tadashi Shibata:
A bump-circuit-based motion detector using projected-activity histograms. 749-752 - Teresa Serrano-Gotarredona, Bernabé Linares-Barranco, Jesús Velarde-Ramírez:
A precise CMOS mismatch model for analog design from weak to strong inversion. 753-756 - Haw-Jing Lo, Guillermo J. Serrano, Paul E. Hasler, David V. Anderson, Bradley A. Minch:
Programmable multiple input translinear elements. 757-760 - Yi-Ran Sun, Svante Signell:
Effects of noise and jitter on algorithms for bandpass sampling in radio receivers. 761-764 - Andreas Gothenberg, Hannu Tenhunen:
Performance analysis of sampling switches in voltage and frequency domains using Volterra series. 765-768 - Junmou Zhang, Simon R. Cooper, Andrew R. LaPietra, Michael W. Mattern, Robert M. Guidash, Eby G. Friedman:
A low power thyristor-based CMOS programmable delay element. 769-772 - Chengxin Liu, John A. McNeill:
Jitter in oscillators with 1/f noise sources. 773-776 - Kuo-Hsing Cheng, Wei-Bin Yang, Shu-Chang Kuo:
A dual-slope phase frequency detector and charge pump architecture to achieve fast locking of phased-locked loop. 777-780 - Armin Tajalli, Saeid Mehrmanesh, Seyed Mojtaba Atarodi:
A duty cycle control circuit for high speed applications. 781-784 - Chorng-Sii Hwang, Poki Chen, Hen-Wai Tsao:
A wide-range and fast-locking clock synthesizer IP based on delay-locked loop. 785-788 - Jader A. De Lima, Peterson R. Agostinho:
A low-voltage low sensitivity sinusoidal VCO for DPLL realizations. 789-792 - Gladys Omayra Ducoudray, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal:
High-speed high-precision analog rank order filter in CMOS technology. 793-796 - Renato Galembeck, Jader A. De Lima, Márcio C. Schneider:
A Gm-C bump equalizer for low-voltage low-power applications. 797-800 - Jarkko Jussila, Kari Halonen:
Programmable-gain amplifiers based on AC couplings for continuous reception. 801-804 - Chandrika Durbha, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal:
Highly linear wide tuning range CMOS transconductor operating in moderate inversion. 805-808 - Seoung-Jae Yoo, Arun Ravindran, Mohammed Ismail:
A low voltage CMOS transresistance-based variable gain amplifier. 809-812 - Yuanjin Zheng, Jiangnan Yan, Yong Ping Xu:
A CMOS dB-linear VGA with pre-distortion compensation for wireless communication applications. 813-816 - Ravi Chawla, Guillermo J. Serrano, Daniel J. Allen, Angelo W. Pereira, Paul E. Hasler:
Fully differential floating-gate programmable OTAs with novel common-mode feedback. 817-820 - Amr A. Tammam, Khaled Hayatleh, Bryan L. Hart, F. John Lidgey:
A hierarchy of input stages for current feedback operational amplifiers. 821-824 - Amr A. Tammam, Khaled Hayatleh, Bryan L. Hart, F. John Lidgey:
High performance current-feedback op-amps. 825-828 - Jürgen Leeb, Johannes Knorr, Horst Zimmermann:
Sensitivity-enhanced OEIC with capacitance multiplier for reduced lower-cutoff frequency. 829-832 - Antti Heiskanen, Timo Rahkonen:
On the second harmonic control requirements in balanced common-emitter BJT low noise amplifier. 833-836 - Il Kwon Chang, Yong Weon Jeon, Jang Sub Lee, Kyung Wol Kim, Jin Tae Kim:
A current-mode interface cascade on COG(CiCC) for TFT-LCD systems. 837-840 - Roxana Saint-Nom, Daniel Jacoby:
Switched capacitors: a bridge between analog and digital SP. 841-844 - Sachin Ranganathan, Terri S. Fiez:
A variable gain high linearity low power baseband filter for WLAN. ISCAS (1) 2004: 845-848 - Yan Xie, Bashir M. Al-Hashimi:
Analogue adaptive filters using wave synthesis technique. 849-852 - Franklin Baez, Jon S. Duster, Kevin T. Kornegay:
A 1.5V class A 5th order log domain filter in SiGe technology. ISCAS (1) 2004: 853-860 - Zeljko Ignjatovic, Mark F. Bocko:
A fully-differential switched capacitor chopper stabilized high-pass filter (mirrored integrator). ISCAS (1) 2004: 857-860 - Paul D. Smith, David W. Graham, Ravi Chawla, Paul E. Hasler:
A five-transistor bandpass filter element. 861-864 - Haibo Fei, Randall L. Geiger, Degang Chen:
Optimum area allocation for resistors and capacitors in continuous-time monolithic filters. ISCAS (1) 2004: 865-868 - Joarez B. Monteiro, Antonio Petraglia:
A 0.8µm CMOS programmable IIR SC filter. ISCAS (1) 2004: 869-872 - Stefano D'Amico, Andrea Baschirotto:
Low-power compact Gm-C filters structures. ISCAS (1) 2004: 873-876 - Chao Yang, Theng-Tee Yeo, Masaaki Itoh:
Low-IF complex filter with transconductance networks. 877-880 - Rafaella Fiorelli, Alfredo Arnaud, Carlos Galup-Montoro:
Series-parallel association of transistors for the reduction of random offset in non-unity gain current mirrors. 881-884 - Radu M. Secareanu, Bill Peterson:
An adaptive circuits concept to address mismatch in analog circuits. 885-888 - Aleksandar Tasic, Wouter A. Serdijn, John R. Long:
Optimal distribution of the RF front-end system specifications to the RF front-end circuit blocks. 889-892 - Farshid Rezaei, Kenneth W. Martin:
A poor man's BiCMOS using standard CMOS. 893-896 - Tao Zhang, William R. Eisenstadt, Robert M. Fox:
A novel 5GHz RF power detector. 897-900 - Shantanu Chakrabartty, Gert Cauwenberghs:
Margin normalization and propagation in analog VLSI. 901-904 - Chunyan Wang:
A minimization of the charge injection in switched-current circuits. 905-908 - Laleh Najafizadeh, Igor M. Filanovsky:
A simple voltage reference using transistor with ZTC point and PTAT current source. 909-911 - Susanta Sengupta:
An input-free NMOS VT extractor circuit in presence of body effects. 912-915 - Rahul Shukla, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal:
A low voltage rail to rail V-I conversion scheme for applications in current mode A/D converters. 916-919 - Beatriz Olleta, Hanjun Jiang, Degang Chen, Randall L. Geiger:
Testing high resolution ADCs using deterministic dynamic element matching. 920-923 - Beatriz Olleta, Hanjun Jiang, Degang Chen, Randall L. Geiger:
Parameter optimization of deterministic dynamic element matching DACs for accurate and cost-effective ADC testing. 924-927 - Le Jin, Chengming He, Degang Chen, Randall L. Geiger:
An SoC compatible linearity test approach for precision ADCs using easy-to-generate sinusoidal stimuli. 928-931 - Le Jin, Chengming He, Degang Chen, Randall L. Geiger:
Fast implementation of a linearity test approach for high-resolution ADCs using non-linear ramp signals. ISCAS (1) 2004: 932-935 - Ayman A. Fayed, Mohammed Ismail:
A digital tuning algorithm for on-chip resistors. 936-939 - Kambiz K. Moez:
An integrated a-Si TFT demultiplexer for driving gate lines in active-matrix arrays. 940-943 - Bryan Nelson, Mani Soma:
On-chip calibration technique for delay line based BIST jitter measurement. 944-947 - Tajeshwar Singh, Trond Ytterdal:
A single-ended to differential capacitive sensor interface circuit designed in CMOS technology. 948-951 - Chih-Hsien Lin, Chang-Hsiao Tsai, Chih-Ning Chen, Shyh-Jye Jou:
4/2 PAM serial link transmitter with tunable pre-emphasis. 952-958 - Kiyong Choi, David J. Allstot:
Post-optimization design centering for RF integrated circuits. 956-959 - Rola A. Baki, Mourad N. El-Gamal:
RF CMOS fully-integrated heterodyne front-end receivers design technique for 5 GHz applications. 960-963 - Jiquing Cui, Yong Lian, Ming Fu Li:
A low voltage dual gate integrated CMOS mixer for 2.4GHz band applications. 964-967 - Xiaoyan Wang, Pietro Andreani:
Comparison of the image rejection between the passive and the Gilbert mixer. 968-971 - Taeik Kim, David J. Allstot:
A tunable transmission line phase shifter (TTPS). 972-975 - Sankaran Aniruddhan, Min Chu, David J. Allstot:
A lateral-BJT-biased CMOS voltage-controlled oscillator. 976-979 - B. Siddik Yarman, Ali Kilinc, Ahmet Aksen:
A new software tool to model measured RF-data with optimum circuit topology. 980-983 - Sio Weng Ting, Kam-Weng Tam, Rui Paulo Martins:
Novel interdigital microstrip bandpass filter with improved spurious response. 984-987 - Xinzhong Duo, Li-Rong Zheng, Hannu Tenhunen:
RF robustness enhancement through statistical analysis of chip package co-design. ISCAS (1) 2004: 988-991 - Amin Q. Safarian, Payam Heydari:
Design and analysis of a distributed regenerative frequency divider using distributed mixer. 992-995 - Yaxiong Zhang, Alister Hamilton:
Current mode radic X-domain Palmo technique cell for programmable analog VLSI. ISCAS (1) 2004: 996-999 - Zhan Xu, Ezz I. El-Masry:
Synthesis of log-domain filter with well-defined operating point. 1000-1003 - Peter Kiss, Vladimir I. Prodanov:
I/Q imbalance of two-path ladder filters. 1004-1007 - Ba-Ngu Vo, Alex S. Leong, Pok Iu:
Analog envelop constrained filter with input uncertainty. ISCAS (1) 2004: 1008-1011 - Xuguang Zhang, Ezz I. El-Masry:
A 1.8 V CMOS linear transconductor and its application to continuous-time filters. 1012-1015 - Stanislaw Szczepanski, Slawomir Koziel:
1.2V low-power four-quadrant CMOS transconductance multiplier operating in saturation region. 1016-1019 - M. N. Hamid Reza Sadr:
A novel approach to the linearization of the differential transconductors. 1020-1023 - Goran Molnar, Mladen Vucic:
Design of constant-delay systems based on symmetry of time-domain response. 1024-1027 - Jaime Ramírez-Angulo, Sushmita Baswa, Antonio J. López-Martín, Ramón González Carvajal:
Winner-take-all class AB input stage: a novel concept for low-voltage power-efficient class AB amplifiers. ISCAS (1) 2004: 1028-1031 - Behrouz Nowrouzian, Arthur T. G. Fuller, M. N. S. Swamy:
Design of arbitrary-order minimal operational-amplifier BIBO stable Bode-type variable-amplitude active-RC equalizers. 1032-1035 - Patrick Muggler, Wayne Chen, Clif Jones, Paras Dagli, Navid Yazdi:
A filter free class D audio amplifier with 86 power efficiency. 1036-1039 - Dongliang Huang, Henry Leung, Xinping Huang:
A rational function based predistorter for high power amplifier. 1040-1043 - Chia-Hsin Wu, Jieh-Wei Liao, Shen-Iuan Liu:
A 1V 4.2mW fully integrated 2.5Gb/s CMOS limiting amplifier using folded active inductors. 1044-1047 - Kambiz K. Moez, Mohammad Ibrahim Elmasry:
A novel matrix-based lumped-element analysis method for CMOS distributed amplifiers. 1048-1051 - Mikko Aho, Väinö Hakkarainen, Lauri Sumanen, Mikko Waltari, Kari Halonen:
An IF-sampling timing skew-insensitive parallel S/H circuit. 1052-1055 - Jorge R. Fernandes, Manuel Medeiros Silva:
A very low-power CMOS parallel A/D converter for embedded applications. 1056-1059 - Mohammad Sharifkhani:
A frequency digitizer based on the continuous time phase domain noise shaping. 1060-1063 - Erhan Ozalevli, Paul E. Hasler, Farhan Adil:
Programmable voltage-output, floating-gate digital-analog converter. ISCAS (1) 2004: 1064-1067 - Pui-In Mak, Kin-Kwan Ma, Weng-leng Mok, Chi-sam Sou, Kit-man Ho, Cheng-Man Ng, Seng-Pan U., Rui Paulo Martins:
An I/Q-multiplexed and OTA-shared CMOS pipelined ADC with an A-DQS S/H front-end for two-step-channel-select low-IF receiver. ISCAS (1) 2004: 1068-1071 - Luis Hernández, Andreas Wiesbauer, Susana Patón, Antonio Di Giandomenico:
Modelling and optimization of low pass continuous-time sigma delta modulators for clock jitter noise reduction. ISCAS (1) 2004: 1072-1075 - Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli:
Design issues and performance limitations of a clock jitter insensitive multibit DAC architecture for high-performance low-power CT Sigma Delta modulators. 1076-1079 - Shiang-Hwua Yu, Jwu-Sheng Hu:
Sigma-delta modulators operated in optimization mode. 1080-1083 - Daniël Schinkel, Ed van Tuijl, Anne-Johan Annema:
Reducing quantization noise with recursive Sigma Delta modulators. 1084-1087 - Fabio Sousa, Volker Mauer, Neimar Duarte, Ricardo P. Jasinski, Volnei A. Pedroni:
Taking advantage of LVDS input buffers to implement sigma-delta A/D converters in FPGAs. 1088-1091 - Joachim Becker, Yiannos Manoli:
A continuous-time field programmable analog array (FPAA) consisting of digitally reconfigurable GM-cells. 1092-1095 - Eisse Mensink, Eric A. M. Klumperink, Bram Nauta:
Distortion cancellation via polyphase multipath circuits. 1098-1101 - Sandro A. P. Haddad, Sumit Bagga, Wouter A. Serdijn:
Log-domain wavelet bases. 1100-1103 - Alon Ascoli, Orla Feely:
Chaos in a differential fourth-order log-domain band-pass filter. 1104-1107 - Gang Li, Brent Maundy:
A novel four quadrant CMOS analog multiplier/divider. 1108-1111 - Madhu Chennam, Terri S. Fiez:
A 0.35µm current-mode T/H with -81dB THD. ISCAS (1) 2004: 1112-1115 - Nhan Nguyen, Chris Winstead, Vincent C. Gaudet, Christian Schlegel:
A 0.8V CMOS analog decoder for an (8, 4, 4) extended Hamming code. 1116-1119 - Gunjan Mandal, Pradip Mandal:
Low power LVDS transmitter with low common mode variation for 1GB/s-per pin operation. ISCAS (1) 2004: 1120-1123 - Hassan Aboushady, Marie-Minerve Louërat:
Loop delay compensation in bandpass continuous-time Sigma Delta modulators without additional feedback coefficients. 1124-1127 - Francisco Colodro Ruiz, Antonio Jesús Torralba Silgado, Alfredo Pérez Vega-Leal, Francisco Perez Ridao:
A multirate based band-pass sigma-delta modulator. 1128-1131 - Zeljko Ignjatovic, Mark F. Bocko:
Sigma-delta analog to digital converter architecture based upon a modulator design employing a mirrored integrator. 1132-1135 - Roberto Maurino, Christos Papavassiliou:
Multibit quadrature sigma-delta modulator with DEM scheme. 1136-1139 - Wang Tung Cheng, Kong-Pang Pun, Cheong-Fat Chan, Chiu-sing Choy:
An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharing. 1140-1143 - José B. Silva, Un-Ku Moon, Gabor C. Temes:
Low-distortion delta-sigma topologies for MASH architectures. 1144-1147 - Daniel J. Allen, Angelo W. Pereira, Paul E. Hasler:
A programmable coefficient continuous-time A/D Delta-Sigma modulator. 1148-1151 - Youngcheol Chae, Minho Kwon, Gunhee Han:
A 0.8-µW switched-capacitor sigma-delta modulator using a class-C inverter. 1152-1155 - Yongjie Cheng, Craig S. Petrie, Brent Nordick:
A 4th order single-loop delta-sigma ADC with 8-bit two-step flash quantization. 1156-1159
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2026-01-20 23:10 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
