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ORCIDIEEE Transactions on Circuits and Systems I: Regular Papers, Volume 66
Volume 66-I, Number 1, January 2019
- Ian Galton
, Colin Weltin-Wu:
Understanding Phase Error and Jitter: Definitions, Implications, Simulations, and Measurement. 1-19 - Shubin Liu, Zhangming Zhu, Jingyu Wang, Lianxi Liu, Yintang Yang:
A 1.2-V 2.41-GHz Three-Stage CMOS OTA With Efficient Frequency Compensation Technique. 20-30 - Mitra Gilasgar, Antoni Barlabé, Lluís Pradell:
A 2.4 GHz CMOS Class-F Power Amplifier With Reconfigurable Load-Impedance Matching. 31-42 - Ahmad Sharkia, Sankaran Aniruddhan, Shahriar Mirabbasi, Sudip Shekhar:
A Compact, Voltage-Mode Type-I PLL With Gain-Boosted Saturated PFD and Synchronous Peak Tracking Loop Filter. 43-53 - Deyan Levski, Martin Wäny, Bhaskar Choubey:
A 1-µs Ramp Time 12-bit Column-Parallel Flash TDC-Interpolated Single-Slope ADC With Digital Delay-Element Calibration. 54-67 - Longqiang Lai, Xueqing Li, Yushen Fu, Yongpan Liu, Huazhong Yang:
Demystifying and Mitigating Code-Dependent Switching Distortions in Current-Steering DACs. 68-81 - Cheng Li, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
Analysis of Reference Error in High-Speed SAR ADCs With Capacitive DAC. 82-93 - Spyridon Vlassis, Fabian Khateb, George Souliotis:
An On-Chip Linear, Squaring, Cubic and Exponential Analog Function Generator. 94-104 - David E. Bellasi, Marco Crescentini, Domenico Cristaudo, Aldo Romani, Marco Tartagni, Luca Benini:
A Broadband Multi-Mode Compressive Sensing Current Sensor SoC in 0.16 µm CMOS. 105-118 - Jian Liu, Xiu Yin Zhang, Quan Xue:
Dual-Band Transmission-Line Resistance Compression Network and Its Application to Rectifiers. 119-132 - Alireza Asoodeh, Shahriar Mirabbasi:
On the Design of nth-Order Polyphase All-Pass Filters. 133-146 - Kazuki Kishida, Tadashi Maeda:
Simple, Analytical Expressions of an Effect of Local Signal Imperfections on Four-Phase Passive-Mixer-Based Bandpass Filter. 147-160 - Charley Wilson, Brian A. Floyd:
Harmonic Performance of Mixer-First Receivers With Circulant-Symmetric Basebands. 161-174 - Thomas Charisoulis, Collin Reiman, Douglas Frey, Miltiadis K. Hatalis:
Current Feedback Compensation Circuit for 2T1C LED Displays: Analysis and Evaluation. 175-188 - Honglan Jiang, Cong Liu, Fabrizio Lombardi, Jie Han:
Low-Power Approximate Unsigned Multipliers With Configurable Error Recovery. 189-202 - Chiou-Yng Lee, Jiafeng Xie:
Digit-Serial Versatile Multiplier Based on a Novel Block Recombination of the Modified Overlap-Free Karatsuba Algorithm. 203-214 - Guanda Wang, Yue Zhang, Beibei Zhang, Bi Wu, Jiang Nan, Xueying Zhang, Zhizhong Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Zhaohao Wang, Youguang Zhang, Weisheng Zhao:
Ultra-Dense Ring-Shaped Racetrack Memory Cache Design. 215-225 - Xiaoqing Zhao, Hongbin Sun, Longjun Liu, Yang Yang, Liangliang Dai, Xiulong Wu, Ruizhi Zhang, Jianxiao Wang, Nanning Zheng:
Architectural Exploration to Address the Reliability Challenges for ReRAM-Based Buffer in SSD. 226-238 - Hao Cai, You Wang, Lirida Alves de Barros Naviner, Xinning Liu, Weiwei Shan, Jun Yang, Weisheng Zhao:
Addressing Failure and Aging Degradation in MRAM/MeRAM-on-FDSOI Integration. 239-250 - Riadul Islam, Matthew R. Guthaus:
HCDN: Hybrid-Mode Clock Distribution Networks. 251-262 - Xuan Hu, Michael J. Schultis, Matthew Kramer, Archit Bagla, Akshay Shetty, Joseph S. Friedman:
Overhead Requirements for Stateful Memristor Logic. 263-273 - Ali Jafari, Ashwinkumar Ganesan, Chetan Sai Kumar Thalisetty, Varun Sivasubramanian, Tim Oates, Tinoosh Mohsenin:
SensorNet: A Scalable and Low-Power Deep Convolutional Neural Network for Multimodal Data Classification. 274-287 - Yizhi Wang, Jun Lin, Zhongfeng Wang:
FPAP: A Folded Architecture for Energy-Quality Scalable Convolutional Neural Networks. 288-301 - Rana A. Abdelaal, Hasan Erdem Yantir, Ahmed M. Eltawil, Fadi J. Kurdahi:
Power Performance Tradeoffs Using Adaptive Bit Width Adjustments on Resistive Associative Processors. 302-312 - Honglan Jiang, Leibo Liu, Pieter P. Jonker, Duncan G. Elliott, Fabrizio Lombardi, Jie Han:
A High-Performance and Energy-Efficient FIR Adaptive Filter Using Approximate Distributed Arithmetic Circuits. 313-326 - Masoud Pashaeifar, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram:
A Theoretical Framework for Quality Estimation and Optimization of DSP Applications Using Low-Power Approximate Adders. 327-340 - Hai-Sheng Li, Ping Fan, Haiying Xia, Huiling Peng, Shuxiang Song:
Quantum Implementation Circuits of Quantum Signal Representation and Type Conversion. 341-354 - Brian Hong, Ali Hajimiri:
A Phasor-Based Analysis of Sinusoidal Injection Locking in LC and Ring Oscillators. 355-368 - Guoyong Shi:
Symbolic Distortion Analysis of Multistage Amplifiers. 369-382 - Federico Bizzarri, Angelo Maurizio Brambilla, Lorenzo Codecasa:
Shooting by a Two-Step Galerkin Method. 383-390 - Hangli Ren, Guangdeng Zong, Hamid Reza Karimi:
Asynchronous Finite-Time Filtering of Networked Switched Systems and its Application: an Event-Driven Method. 391-402 - Khoa Le, Fakhreddine Ghaffari, Lounis Kessal, David Declercq, Emmanuel Boutillon, Chris Winstead, Bane Vasic:
A Probabilistic Parallel Bit-Flipping Decoder for Low-Density Parity-Check Codes. 403-416 - Yangxurui Liu, Liang Liu, Ove Edfors, Viktor Öwall:
An Area-Efficient On-Chip Memory System for Massive MIMO Using Channel Data Compression. 417-427 - Ze-kun Zhou, Yue Shi, Yao Wang, Nie Li, Zhiping Xiao, Yunkun Wang, Xiaolin Liu, Zhuo Wang, Bo Zhang:
A Resistorless High-Precision Compensated CMOS Bandgap Voltage Reference. 428-437 - Lin Cong, Jin Liu, Hoi Lee:
A High-Efficiency Low-Profile Zero-Voltage Transition Synchronous Non-Inverting Buck-Boost Converter With Auxiliary-Component Sharing. 438-449
Volume 66-I, Number 2, February 2019
- Francesco Chicco, Alessandro Pezzotta, Christian C. Enz:
Charge-Based Distortion Analysis of Nanoscale MOSFETs. 453-462 - Ricardo Riaza:
Circuit Theory in Projective Space and Homogeneous Circuit Models. 463-476 - Wei Mao, Yongfu Li, Chun-Huat Heng, Yong Lian:
A Low Power 12-bit 1-kS/s SAR ADC for Biomedical Signal Processing. 477-488 - Dezhi Xing, Yan Zhu, Chi-Hang Chan, Franco Maloberti, Seng-Pan U, Rui Paulo Martins:
Design of a High-Speed Time-Interleaved Sub-Ranging SAR ADC With Optimal Code Transfer Technique. 489-501 - You Li, Degang Chen:
Low-Cost, High-Precision DAC Design Based on Ordered Element Matching. 502-512 - Fabian Khateb, Tomasz Kulej:
Design and Implementation of a 0.3-V Differential Difference Amplifier. 513-523 - Pekka Keränen, Juha Kostamovaara:
256 × TDC Array With Cyclic Interpolators Based on Calibration-Free 2× Time Amplifier. 524-533 - Huan Hu, Tanzila Islam, Alla Kostyukova, Su Ha, Subhanshu Gupta:
From Battery Enabled to Natural Harvesting: Enzymatic BioFuel Cell Assisted Integrated Analog Front-End in 130nm CMOS for Long-Term Monitoring. 534-545 - Sinyoung Kim, Kuduck Kwon:
A 50-MHz-1-GHz 2.3-dB NF Noise-Cancelling Balun-LNA Employing a Modified Current-Bleeding Technique and Balanced Loads. 546-554 - Shunli Ma, Hao Yu, Qun Jane Gu, Junyan Ren:
A 5-10-Gb/s 12.5-mW Source Synchronous I/O Interface With 3-D Flip Chip Package. 555-568 - Yingying Wang, Jifu Liang, Suranga Handagala, Arjuna Madanayake, Soumyajit Mandal:
ΔΣ Noise-Shaping in 2-D Space-Time for Wideband Antenna Array Receivers. 569-582 - Hyunuk Kang, Hwiseob Lee, Wooseok Lee, Hansik Oh, Wonseob Lim, Hyungmo Koo, Cheon-Seok Park, Keum-Cheol Hwang, Kang-Yoon Lee, Youngoo Yang:
Octave Bandwidth Doherty Power Amplifier Using Multiple Resonance Circuit for the Peaking Amplifier. 583-593 - Matthew A. Morgan, Wavley M. Groves, Tod A. Boyd:
Reflectionless Filter Topologies Supporting Arbitrary Low-Pass Ladder Prototypes. 594-604 - Cheol Kim, Sung-Gi Ahn, Jisu Min, Kee-Won Kwon:
Power Efficient and Reliable Nonvolatile TCAM With Hi-PFO and Semi-Complementary Driver. 605-615 - Manami Suzuki, Rei Ueno, Naofumi Homma, Takafumi Aoki:
Efficient Fuzzy Extractors Based on Ternary Debiasing Method for Biased Physically Unclonable Functions. 616-629 - Mohd. Tasleem Khan, Shaik Rafi Ahamed:
Optimal Complexity Architectures for Pipelined Distributed Arithmetic-Based LMS Adaptive Filter. 630-642 - Edouard Giacomin, Tzofnat Greenberg-Toledo, Shahar Kvatinsky, Pierre-Emmanuel Gaillardon:
A Robust Digital RRAM-Based Convolutional Block for Low-Power Image Processing and Learning Applications. 643-654 - Jinpeng Song, Shulin Tian, Yu Hen Hu:
Analysis and Correction of Combined Channel Mismatch Effects in Frequency-Interleaved ADCs. 655-668 - Temesghen Tekeste, Hani H. Saleh, Baker Mohammad, Mohammed Ismail:
Ultra-Low Power QRS Detection and ECG Compression Architecture for IoT Healthcare Devices. 669-679 - Guilherme Paim, Leandro Mateus Giacomini Rocha, Gustavo Madeira Santana, Leonardo Bandeira Soares, Eduardo Antonio Cesar da Costa, Sergio Bampi:
Power-, Area-, and Compression-Efficient Eight-Point Approximate 2-D Discrete Tchebichef Transform Hardware Design Combining Truncation Pruning and Efficient Transposition Buffers. 680-693 - Alberto Bernardini, Kurt James Werner, Julius Orion Smith III, Augusto Sarti:
Generalized Wave Digital Filter Realizations of Arbitrary Reciprocal Connection Networks. 694-707 - Xiaozhen Liu, Jin Sha, Hongxiang Xie, Feifei Gao, Shi Jin, Zaichen Zhang, Xiaohu You, Chuan Zhang:
Efficient Channel Estimator With Angle-Division Multiple Access. 708-718 - Olga Krestinskaya, Khaled Nabil Salama, Alex Pappachen James:
Learning in Memristive Neural Network Architectures Using Analog Backpropagation Circuits. 719-732 - Li Tang, Jun Zhao:
Switched Threshold-Based Fault Detection for Switched Nonlinear Systems With Its Application to Chua's Circuit System. 733-741 - Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik:
A Combined Arithmetic-High-Level Synthesis Solution to Deploy Partial Carry-Save Radix-8 Booth Multipliers in Datapaths. 742-755 - Jong Beom Park, William Rhett Davis, Paul D. Franzon:
3-D-DATE: A Circuit-Level Three-Dimensional DRAM Area, Timing, and Energy Model. 756-768 - Farid Kenarangi, Inna Partin-Vaisband:
Exploiting Machine Learning Against On-Chip Power Analysis Attacks: Tradeoffs and Design Considerations. 769-781 - Muhammad Saeed Aslam, Peng Shi, Cheng-Chew Lim:
Variable Threshold-Based Selective Updating Algorithms in Feed-Forward Active Noise Control Systems. 782-795 - Di Zhang, Qingling Zhang:
Reduced-Order Observer-Based Sliding Mode Control for Singular Markovian Jump System With Time-Varying Transition Rate. 796-809 - Li-Heng Chen, Yuxin Zhao, Shasha Fu, Ming Liu, Jianbin Qiu:
Fault Estimation Observer Design for Descriptor Switched Systems With Actuator and Sensor Failures. 810-819 - Huizhen Jenny Qian, Bo Zhang, Xun Luo:
High-Resolution Wideband Phase Shifter With Current Limited Vector-Sum. 820-833 - Sheikh Nijam Ali, Pawan Agarwal, Srinivasan Gopal, Shahriar Mirabbasi, Deukhyoun Heo:
A 25-35 GHz Neutralized Continuous Class-F CMOS Power Amplifier for 5G Mobile Communications Achieving 26% Modulation PAE at 1.5 Gb/s and 46.4% Peak PAE. 834-847 - Steve Blandino, Giovanni Mangraviti, Claude Desset, André Bourdoux, Piet Wambacq, Sofie Pollin:
Multi-User Hybrid MIMO at 60 GHz Using 16-Antenna Transmitters. 848-858 - Adrián Pérez-Resa, Miguel Garcia-Bosque, Carlos Sánchez-Azqueta, Santiago Celma:
Chaotic Encryption for 10-Gb Ethernet Optical Links. 859-868 - Cédric Marchand, Emmanuel Boutillon, Hassan Harb, Laura Conde-Canencia, Ali Al Ghouwayel:
Hybrid Check Node Architectures for NB-LDPC Decoders. 869-880
Volume 66-I, Number 3, March 2019
- Mohammed Abdulaziz, Eric A. M. Klumperink, Bram Nauta, Henrik Sjöland:
Improving Receiver Close-In Blocker Tolerance by Baseband Gm-C Notch Filtering. 885-896 - Congyin Shi, Edgar Sánchez-Sinencio:
An On-Chip Built-in Linearity Estimation Methodology and Hardware Implementation. 897-908 - Minglei Zhang, Qingsong Cai, Zhong Yang, Xiaoyun Jia, Xiaohua Fan:
A 1-MHz-Bandwidth Gm-C-Based Quadrature Bandpass Sigma-Delta Modulator Achieving -153.7-dBFS/Hz NSD With Background Calibration. 909-919 - Fernando Cardes, Victor Medina, Susana Patón, Luis Hernández:
Clock Jitter Analysis of Continuous-Time ΣΔ Modulators Based on a Relative Time-Base Projection. 920-929 - Fei Wang, Albert J. P. Theuwissen:
Pixel Optimizations and Digital Calibration Methods of a CMOS Image Sensor Targeting High Linearity. 930-940 - Xin Fan, Jan Stuijt, Bo Liu, Tobias Gemmeke:
Synthesizable Memory Arrays Based on Logic Gates for Subthreshold Operation in IoT. 941-954 - Lawrence T. Clark, Sai Bharadwaj Medapuram, Divya Kiran Kadiyala, John S. Brunhaver:
Physically Unclonable Functions Using Foundry SRAM Cells. 955-966 - Jianwei Jiang, Yiran Xu, Wenyi Zhu, Jun Xiao, Shichang Zou:
Quadruple Cross-Coupled Latch-Based 10T and 12T SRAM Bit-Cell Designs for Highly Reliable Terrestrial Applications. 967-977 - Shourya Gupta, Kirti Gupta, Benton H. Calhoun, Neeta Pandey:
Low-Power Near-Threshold 10T SRAM Bit Cells With Enhanced Data-Independent Read Port Leakage for Array Augmentation in 32-nm CMOS. 978-988 - Amit Kumar Panda, Kailash Chandra Ray:
Modified Dual-CLCG Method and its VLSI Architecture for Pseudorandom Bit Generation. 989-1002 - Jinnan Ding, Shuguo Li, Zhen Gu:
High-Speed ECC Processor Over NIST Prime Fields Applied With Toom-Cook Multiplication. 1003-1016 - Sharvil Patil, Suhas Gundu Rao, Yu Chen, Yannis P. Tsividis:
Signal Encoding and Processing in Continuous Time Using a Cascade of Digital Delays. 1017-1030 - Han Le Duc, Bruno Feuvrie, Matthieu Pastore, Yide Wang:
An Adaptive Cascaded ILA- and DLA-Based Digital Predistorter for Linearizing an RF Power Amplifier. 1031-1041 - Basant K. Mohanty, Pramod Kumar Meher:
Area-Delay-Energy Efficient VLSI Architecture for Scalable In-Place Computation of FFT on Real Data. 1042-1050 - Sheng Zhang, Wei Xing Zheng:
Mean-Square Analysis of Multi-Sampled Multiband-Structured Subband Filtering Algorithm. 1051-1062 - Mohsin Aziz, Mehdi Vejdani Amiri, Mohamed Helaoui, Fadhel M. Ghannouchi:
Statistics-Based Approach for Blind Post-Compensation of Modulator's Imperfections and Power Amplifier Nonlinearity. 1063-1075 - Yiming Sun, Jinyong Yu, Zhengchao Li:
Event-Triggered Finite-Time Robust Filtering for a Class of State-Dependent Uncertain Systems With Network Transmission Delay. 1076-1089 - Krishnaiyan Thulasiraman, Mamta Yadav, Kshirasagar Naik:
Network Science Meets Circuit Theory: Resistance Distance, Kirchhoff Index, and Foster's Theorems With Generalizations and Unification. 1090-1103 - Giovanni De Luca, Pascal Bolcato, Wil H. A. Schilders:
Proper Initial Solution to Start Periodic Steady-State-Based Methods. 1104-1115 - Lanlin Yu, Junlin Xiong:
H∞ Model Reduction for Interval Frequency Negative Imaginary Systems. 1116-1129 - Hao Shen, Yunzhe Men, Zheng-Guang Wu, Jinde Cao, Guoping Lu:
Network-Based Quantized Control for Fuzzy Singularly Perturbed Semi-Markov Jump Systems and its Application. 1130-1140 - Peijun Wang, Guanghui Wen, Xinghuo Yu, Wenwu Yu, Tingwen Huang:
Synchronization of Multi-Layer Networks: From Node-to-Node Synchronization to Complete Synchronization. 1141-1152 - Ahmed El Sayed, Amit Kumar Mishra, Abdelrahman H. Ahmed, Amir Hossein Masnadi Shirazi, Sang-Pil Woo, Yang-Seok Choi, Shahriar Mirabbasi, Sudip Shekhar:
A Hilbert Transform Equalizer Enabling 80 MHz RF Self-Interference Cancellation for Full-Duplex Receivers. 1153-1165 - Ajinkya Kale, Suchendranath Popuri, Michael Koeberle, Johannes Sturm, Vijaya Sankara Rao Pasupureddi:
A -40 dB EVM, 77 MHz Dual-Band Tunable Gain Sub-Sampling Receiver Front End in 65-nm CMOS. 1166-1179 - Mehmet Tamer Ozgun, Amr Abdelhamid, Hakan Dogan:
A Low Power Receiver Front-End Design With Tunable Notch Filter for TX Leakage and Blocker Suppression. 1180-1191 - Ashwin Ramachandran, Arun Natarajan, Tejasvi Anand:
Line Coding Techniques for Channel Equalization: Integrated Pulse-Width Modulation and Consecutive Digit Chopping. 1192-1204 - Yan-Tong Chen, Wei-Cheng Sun, Chung-Chao Cheng, Tsung-Lin Tsai, Yeong-Luh Ueng, Chia-Hsiang Yang:
An Integrated Message-Passing Detector and Decoder for Polar-Coded Massive MU-MIMO Systems. 1205-1218 - Yen-Chin Liao, Chien Lin, Hsie-Chia Chang, Shu Lin:
A (21150, 19050) GC-LDPC Decoder for NAND Flash Applications. 1219-1230 - Alak Majumder, Monalisa Das, Suraj Kumar Saw, Abir J. Mondal, Bidyut K. Bhattacharyya:
Variation Aware Design of 50-Gbit/s, 5.027-fJ/bit Serializer Using Latency Combined Mux-Dual Latch for Inter-Chip Communication. 1231-1244 - Sigang Ryu, Seuk Son, Jaeha Kim:
An Accurate and Noise-Resilient Spread-Spectrum Clock Tracking Aid for Digitally-Controlled Clock and Data Recovery Loops. 1245-1257 - Boyu Shen, Soumya Bose, Matthew L. Johnston:
Fully-Integrated Charge Pump Design Optimization for Above-Breakdown Biasing of Single-Photon Avalanche Diodes in 0.13-µm CMOS. 1258-1269 - Teruki Someya, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya:
A 0.90-4.39-V Detection Voltage Range, 56-Level Programmable Voltage Detector Using Fine Voltage-Step Subtraction for Battery Management. 1270-1279 - Dawei Liu, Simon J. Hollis, Bernard H. Stark:
A New Design Technique for Sub-Nanosecond Delay and 200 V/ns Power Supply Slew-Tolerant Floating Voltage Level Shifters for GaN SMPS. 1280-1290 - Luigi Costanzo, Alessandro Lo Schiavo, Massimo Vitelli:
Power Extracted From Piezoelectric Harvesters Driven by Non-Sinusoidal Vibrations. 1291-1303
Volume 66-I, Number 4, April 2019
- Michele Spasaro, Federico Alimenti, Domenico Zito:
The Theory of Special Noise Invariants. 1305-1318 - Luke Renaud, Joe Baylon, Srinivasan Gopal, Md. Aminul Hoque, Deukhyoun Heo:
Analysis of Systematic Losses in Hybrid Envelope Tracking Modulators. 1319-1330 - Tao He, Manjunath Kareppagoudr, Yi Zhang, Emanuel Caceres, Un-Ku Moon, Gabor C. Temes:
Noise Filtering and Linearization of Single-Ended Sampled-Data Circuits. 1331-1341 - Jiaxin Liu, Chen-Kai Hsu, Xiyuan Tang, Shaolan Li, Guangjun Wen, Nan Sun:
Error-Feedback Mismatch Error Shaping for High-Resolution Data Converters. 1342-1354 - Soheil Ziabakhsh, Ghyslain Gagnon, Gordon W. Roberts:
A Second-Order Bandpass $\Delta\Sigma$ Time-to-Digital Converter With Negative Time-Mode Feedback. 1355-1368 - Dries Vercaemer, Johan Raman, Pieter Rombouts:
Low-Pass Filtering SC-DAC for Reduced Jitter and Slewing Requirements on CTSDMs. 1369-1381 - Ming Ding, Yao-Hong Liu, Pieter Harpe, Christian Bachmann, Kathleen Philips, Arthur H. M. van Roermund:
A Low-Power Fast Start-Up Crystal Oscillator With an Autonomous Dynamically Adjusted Load. 1382-1392 - Longjie Zhong, Xinquan Lai, Donglai Xu, Xinqin Liao, Chuanshi Yang, Zhongyuan Fang, Yuanjin Zheng:
Capacitive Touch Panel With Low Sensitivity to Water Drop Employing Mutual-Coupling Electrical Field Shaping Technique. 1393-1404 - Mohammad S. Islam, Siddharth K. Singh, Jaesung Lee, Yong Xie, Christian A. Zorman, Philip X.-L. Feng, Soumyajit Mandal:
A Programmable Sustaining Amplifier for Flexible Multimode MEMS-Referenced Oscillators. 1405-1418 - Can Çaliskan, Ilker Kalyoncu, Melik Yazici, Yasar Gurbuz:
Sub-1-dB and Wideband SiGe BiCMOS Low-Noise Amplifiers for $X$ -Band Applications. 1419-1430 - Kyle D. Holzer, Jeffrey S. Walling:
1-to- $N$ Ring Power Combiners With Common Delta Ports. 1431-1441 - Haruki Mori, Tomoki Nakagawa, Yuki Kitahara, Yuta Kawamoto, Kenta Takagi, Shusuke Yoshimoto, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 28-nm FD-SOI 8T Dual-Port SRAM for Low-Energy Image Processor With Selective Sourceline Drive Scheme. 1442-1453 - Chengzhi Wang, Deming Zhang, Lang Zeng, Erya Deng, Jie Chen, Weisheng Zhao:
A Novel MTJ-Based Non-Volatile Ternary Content-Addressable Memory for High-Speed, Low-Power, and High-Reliable Search Operation. 1454-1464 - Taha Shahroodi, Siavash Bayat Sarmadi, Hatameh Mosanaei-Boorani:
Low-Latency Double Point Multiplication Architecture Using Differential Addition Chain Over $GF(2^m)$. 1465-1473 - Dongsheng Liu, Cong Zhang, Hui Lin, Yuyang Chen, Mingyu Zhang:
A Resource-Efficient and Side-Channel Secure Hardware Implementation of Ring-LWE Cryptographic Processor. 1474-1483 - Mohammed F. Tolba, Lobna A. Said, Ahmed H. Madian, Ahmed G. Radwan:
FPGA Implementation of the Fractional Order Integrator/Differentiator: Two Approaches and Applications. 1484-1495 - Wangqian Chen, Mo Huang, Xin Lou:
Design of Sparse FIR Filters With Reduced Effective Length. 1496-1506 - Mario Garrido, Konrad Möller, Martin Kumm:
World's Fastest FFT Architectures: Breaking the Barrier of 100 GS/s. 1507-1516 - Heming Sun, Zhengxue Cheng, Amir Masoud Gharehbaghi, Shinji Kimura, Masahiro Fujita:
Approximate DCT Design for Video Encoding Based on Novel Truncation Scheme. 1517-1530 - Vahnood Pourahmad, Farzad Khoeini, Ehsan Afshari:
A System of Two Coupled Oscillators With a Continuously Controllable Phase Shift. 1531-1543 - Shashikant Koul, Timothy K. Horiuchi:
Waypoint Path Planning With Synaptic-Dependent Spike Latency. 1544-1557 - Corey Lammie, Tara Julia Hamilton, André van Schaik, Mostafa Rahimi Azghadi:
Efficient FPGA Implementations of Pair and Triplet-Based STDP for Neuromorphic Architectures. 1558-1570 - Tzofnat Greenberg-Toledo, Roee Mazor, Ameer Haj Ali, Shahar Kvatinsky:
Supporting the Momentum Training Algorithm Using a Memristor-Based Synapse. 1571-1583 - Mohammad Saleh Tavazoei:
Upper and Lower Bounds for the Maximum Number of Frequencies That Can Be Generated by a Class of Fractional Oscillators. 1584-1593 - Hsiu-Chen Chang, Yunsik Hahn, Patrick Roblin, Taylor W. Barton:
New Mixed-Mode Design Methodology for High-Efficiency Outphasing Chireix Amplifiers. 1594-1607 - Hai-Feng Zhang, Fang Xu, Zhongkui Bao, Chuang Ma:
Reconstructing of Networks With Binary-State Dynamics via Generalized Statistical Inference. 1608-1619 - Hao Li, Carlos E. Saavedra:
Linearization of Active Downconversion Mixers at the IF Using Feedforward Cancellation. 1620-1631 - Ilker Kalyoncu, Emre Ozeren, Abdurrahman Burak, Omer Ceylan, Yasar Gurbuz:
A Phase-Calibration Method for Vector-Sum Phase Shifters Using a Self-Generated LUT. 1632-1642 - Oana Boncalo, Gyorgy Kolumban-Antal, Alexandru Amaricai, Valentin Savin, David Declercq:
Layered LDPC Decoders With Efficient Memory Access Scheduling and Mapping and Built-In Support for Pipeline Hazards Mitigation. 1643-1656 - Abdelali El Aroudi, Luis Benadero, Enrique Ponce, Carlos Olalla, Francisco Torres, Luis Martínez-Salamero:
Nonlinear Dynamic Modeling and Analysis of Self-Oscillating H-Bridge Parallel Resonant Converter Under Zero Current Switching Control: Unveiling Coexistence of Attractors. 1657-1667
Volume 66-I, Number 5, May 2019
- Elena Blokhina:
Guest Editorial Special Issue on the IEEE International Symposium on Circuits and Systems 2018. 1669 - Arzu Ergintav, Frank Herzel, Gunter Fischer, Dietmar Kissinger:
A Study of Phase Noise and Frequency Error of a Fractional-N PLL in the Course of FMCW Chirp Generation. 1670-1680 - Sarthak Kalani, Tanbir Haque, Rupal Gupta, Peter R. Kinget:
Benefits of Using VCO-OTAs to Construct TIAs in Wideband Current-Mode Receivers Over Inverter-Based OTAs. 1681-1691 - Runze Han, Peng Huang, Yachen Xiang, Chen Liu, Zhen Dong, Zhiqiang Su, Yongbo Liu, Lu Liu, Xiaoyan Liu, Jinfeng Kang:
A Novel Convolution Computing Paradigm Based on NOR Flash Array With High Computing Speed and Energy Efficiency. 1692-1703 - Benoit Larras, Paul Chollet, Cyril Lahuec, Fabrice Seguin, Matthieu Arzel:
A Fully Flexible Circuit Implementation of Clique-Based Neural Networks in 65-nm CMOS. 1704-1715 - Hongshuai Zhang, Hong Zhang, Yan Song, Ruizhi Zhang:
A 10-Bit 200-kS/s 1.76- $\mu$ W SAR ADC With Hybrid CAP-MOS DAC for Energy-Limited Applications. 1716-1727 - Josip Mikulic, Gregor Schatzberger, Adrijan Baric:
A 1-MHz Relaxation Oscillator Core Employing a Self-Compensating Chopped Comparator Pair. 1728-1736 - Alessandro Garghetti, Andrea L. Lacaita, Salvatore Levantino:
A Novel Single-Inductor Injection-Locked Frequency Divider by Three With Dual-Injection Secondary Locking. 1737-1745 - Chutham Sawigun, Surachoke Thanapitak:
A Nanopower Biopotential Lowpass Filter Using Subthreshold Current-Reuse Biquads With Bulk Effect Self-Neutralization. 1746-1757 - Ramy Tantawy, Vipul J. Patel, Dale Shane Smith, S. M. Shahriar Rashid, Matthew J. Casto, Lucas Duncan, Roman Fragasse, Brian Dupaix, Luciano Boglione, Joel Goodman, Waleed Khalil:
Wide-Bandwidth, High-Linearity, 2.8-GS/s, 10-bit Accurate Sample and Hold Amplifier in 130-nm SiGe BiCMOS. 1758-1768 - Yecheng Lyu, Lin Bai, Xinming Huang:
ChipNet: Real-Time LiDAR Processing for Drivable Region Segmentation on an FPGA. 1769-1779 - Xiaoming Chen, Kai Ni, Michael T. Niemier, Yinhe Han, Suman Datta, Xiaobo Sharon Hu:
Power and Area Efficient FPGA Building Blocks Based on Ferroelectric FETs. 1780-1793 - Donghyeon Han, Jinsu Lee, Jinmook Lee, Hoi-Jun Yoo:
A Low-Power Deep Neural Network Online Learning Processor for Real-Time Object Tracking Application. 1794-1804 - Ram Kuber Singh, Ying Xu, Runchun Wang, Tara Julia Hamilton, Susan L. Denham, André van Schaik:
CAR-Lite: A Multi-Rate Cochlear Model on FPGA for Spike-Based Sound Encoding. 1805-1817 - Razieh Abedi, Rouzbeh Kananizadeh, Omeed Momeni, Payam Heydari:
A CMOS V-Band PLL With a Harmonic Positive Feedback VCO Leveraging Operation in Triode Region for Phase-Noise Improvement. 1818-1830 - Massimo Gottardi, Michela Lecca:
A 64×64 Pixel Vision Sensor for Local Binary Pattern Computation. 1831-1839 - Hao-Chiao Hong, Long-Yi Lin, Yi Chiu:
Design of a 0.20-0.25-V, Sub-nW, Rail-to-Rail, 10-bit SAR ADC for Self-Sustainable IoT Applications. 1840-1852 - Bi Wang, Zhaohao Wang, Bi Wu, Yumeng Bai, Kaihua Cao, Yuanfu Zhao, Youguang Zhang, Weisheng Zhao:
Novel Radiation Hardening Read/Write Circuits Using Feedback Connections for Spin-Orbit Torque Magnetic Random Access Memory. 1853-1862 - Yan Zhang, Yanghyo Kim, Adrian Tang, Jon Kawamura, Theodore Reck, Mau-Chung Frank Chang:
Integrated Wide-Band CMOS Spectrometer Systems for Spaceborne Telescopic Sensing. 1863-1873 - Armia Salib, Mark F. Flanagan, Barry Cardiff:
A Generic Foreground Calibration Algorithm For ADCs With Nonlinear Impairments. 1874-1885 - Pietro Burrascano, Stefano Laureti, Luca Senni, Marco Ricci:
Pulse Compression in Nondestructive Testing Applications: Reduction of Near Sidelobes Exploiting Reactance Transformation. 1886-1896 - Igor M. Filanovsky, Luís B. Oliveira, Nikolay T. Tchamov:
Using Modified Bessel Functions for Analysis of Nonlinear Effects in a MOS Transistor Operating in Moderate Inversion. 1897-1907 - Chih-Ting Liu, Tung-Wei Lin, Yi-Heng Wu, Yu-Sheng Lin, Heng Lee, Yu Tsao, Shao-Yi Chien:
Computation-Performance Optimization of Convolutional Neural Networks With Redundant Filter Removal. 1908-1921 - Sijia Geng, Ian A. Hiskens:
Second-Order Trajectory Sensitivity Analysis of Hybrid Systems. 1922-1934 - Nicola Lupo, Eduardo Pérez, Christian Wenger, Franco Maloberti, Edoardo Bonizzoni:
Analysis of Parasitic Effects in Filamentary-Switching Memristive Memories Using an Approximated Verilog-A Memristor Model. 1935-1947 - Yande Jiang, Nicoleta Cucu Laurenciu, Sorin Dan Cotofana:
On Basic Boolean Function Graphene Nanoribbon Conductance Mapping. 1948-1959 - Graziano Chesi:
Stability Test for Complex Matrices Over the Complex Unit Circumference via LMIs and Applications in 2D Systems. 1960-1969 - Yixiong Yang, Xin Shi, Fang Su, Zhibo Wang, Pei Yang, Huazhong Yang, Yongpan Liu:
A 2.2-GHz Configurable Direct Digital Frequency Synthesizer Based on LUT and Rotation. 1970-1980 - W. Daniel Leon-Salas, Xiaozhe Fan:
Solar Cell Photo-Luminescence Modulation for Optical Frequency Identification Devices. 1981-1992
Volume 66-I, Number 6, June 2019
- Elena Blokhina:
Guest Editorial Selected Papers From Regional Flagship Conferences of the IEEE Circuits and Systems Society (ICECS 2017, LASCAS 2018, and NEWCAS 2018). 1997 - Dmitry Osipov, Steffen Paul:
Compact Extended Industrial Range CMOS Current References. 1998-2006 - Takao Kihara, Tomoya Takahashi, Tsutomu Yoshimura:
Digital Mismatch Correction for Bandpass Sampling Four-Channel Time-Interleaved ADCs in Direct-RF Sampling Receivers. 2007-2016 - Lucas C. Severo, Wilhelmus A. M. Van Noije:
A 0.4-V 10.9- $\mu$ W/Pole Third-Order Complex BPF for Low Energy RF Receivers. 2017-2026 - Guillermo Antúnez-Calistro, Mariana Siniscalchi, Fernando Silveira, Conrado Rossi-Aicardi:
Variability-Aware Design Method for a Constant Inversion Level Bias Current Generator. 2027-2036 - Roman Fragasse, Ramy Tantawy, Brian Dupaix, Trevor Dean, Daron Disabato, Matthew R. Belz, Dale Shane Smith, Jamin J. McCue, Waleed Khalil:
Analysis of SRAM Enhancements Through Sense Amplifier Capacitive Offset Correction and Replica Self-Timing. 2037-2050 - Milad Haghi Kashani, Amirahmad Tarkeshdouz, Ehsan Afshari, Shahriar Mirabbasi:
A 53-67 GHz Low-Noise Mixer-First Receiver Front-End in 65-nm CMOS. 2051-2063 - Benjamín T. Reyes, Laura Biolato, Agustin C. Galetto, Leandro Passetti, Fredy Solis, Mario R. Hueda:
An Energy-Efficient Hierarchical Architecture for Time-Interleaved SAR ADC. 2064-2076 - Mehdi Noormohammadi Khiarak, Sylvain Martel, Yves De Koninck, Benoit Gosselin:
High-DR CMOS Fluorescence Biosensor With Extended Counting ADC and Noise Cancellation. 2077-2087 - Konstantinos Pexaras, Irene G. Karybali, Emmanouil Kalligeros:
Optimization and Hardware Implementation of Image and Video Watermarking for Low-Cost Applications. 2088-2101 - Ismael Seidel, Marcio Monteiro, Bruno Bonotto, Luciano Volcan Agostini, José Luís Güntzel:
Energy-Efficient Hadamard-Based SATD Hardware Architectures Through Calculation Reuse. 2102-2115 - Aminadabe dos Santos Pires Soares, Wemerson Delcio Parreira, Everton Granemann Souza, Chiara das Dores do Nascimento, Sérgio Jose Melo de Almeida:
Voice Activity Detection Using Generalized Exponential Kernels for Time and Frequency Domains. 2116-2123 - Thiago Luiz Alves Bubolz, Ruhan A. Conceição, Mateus Grellert, Luciano Agostini, Bruno Zatt, Guilherme Corrêa:
Quality and Energy-Aware HEVC Transrating Based on Machine Learning. 2124-2136 - Leonardo Bandeira Soares, Morgana Macedo Azevedo da Rosa, Cláudio Machado Diniz, Eduardo Antonio Cesar da Costa, Sergio Bampi:
Design Methodology to Explore Hybrid Approximate Adders for Energy-Efficient Image and Video Processing Accelerators. 2137-2150 - Felipe Rocha da Rosa, Rafael Garibotti, Luciano Ost, Ricardo Reis:
Using Machine Learning Techniques to Evaluate Multicore Soft Error Reliability. 2151-2164 - Elias de Almeida Ramos, Guilherme Bontorin, Ricardo Reis:
A New Nonlinear Global Placement for FPGAs: The Chaotic Place. 2165-2174 - Calebe Micael de Oliveira Conceição, Ricardo Augusto da Luz Reis:
Transistor Count Reduction by Gate Merging. 2175-2187 - Morgan Madec, Luc Hébrard, Jean-Baptiste Kammerer, Alexi Bonament, Elise Rosati, Christophe Lallement:
Multiphysics Simulation of Biosensors Involving 3D Biological Reaction-Diffusion Phenomena in a Standard Circuit EDA Environment. 2188-2197 - Javier Valls, Vicente Torres, María José Canet, Francisco Miguel Garcia-Herrero:
A Test Vector Generation Method Based on Symbol Error Probabilities for Low-Complexity Chase Soft-Decision Reed-Solomon Decoding. 2198-2207 - Shrikant Singh, Debashis Mandal, Bertan Bakkaloglu, Sayfe Kiaei:
Low-Power/Low-Voltage Integrated CMOS Sense Resistor-Free Analog Power/Current Sensor Compatible With High-Voltage Switching DC-DC Converter. 2208-2218 - Chandani Anand, Kapil Jainwal, Mukul Sarkar:
A Three-Phase, One-Tap High Background Light Subtraction Time-of-Flight Camera. 2219-2229 - Mikhail S. Yenuchenko, Alexander S. Korotkov, Dmitry V. Morozov, Mikhail M. Pilipko:
A Switching Sequence for Unary Digital-to-Analog Converters Based on a Knight's Tour. 2230-2239 - Yi Chen, Zheng Wang, Aakash Patil, Arindam Basu:
A 2.86-TOPS/W Current Mirror Cross-Bar-Based Machine-Learning and Physical Unclonable Function Engine For Internet-of-Things Applications. 2240-2252 - Parisa Vejdani, Frederic Nabki:
Dual-Path and Dual-Chopper Amplifier Signal Conditioning Circuit With Improved SNR and Ultra-Low Power Consumption for MEMS. 2253-2262 - Sean C. Smithson, Naoya Onizawa, Brett H. Meyer, Warren J. Gross, Takahiro Hanyu:
Efficient CMOS Invertible Logic Using Stochastic Computing. 2263-2274 - Mayur Agarwal, Arijit De, Swapna Banerjee:
An IEEE Single Precision Floating Point Arithmetic-Based Apodization Architecture for Portable Ultrasound Imaging System. 2275-2287 - Weiwei Shan, Xinchao Shang, Xing Wan, Hao Cai, Chuan Zhang, Jun Yang:
A Wide-Voltage-Range Half-Path Timing Error-Detection System With a 9-Transistor Transition-Detector in 40-nm CMOS. 2288-2297 - T. Bindima, Elizabeth Elias:
Low-Complexity 2-D Digital FIR Filters Using Polyphase Decomposition and Farrow Structure. 2298-2308 - Wei Luo, Yun Yin, Liang Xiong, Tong Li, Hongtao Xu:
Nonlinear Analytical Model for Switched-Capacitor Class-D RF Power Amplifiers. 2309-2321 - Chengqing Li, Bingbing Feng, Shujun Li, Jürgen Kurths, Guanrong Chen:
Dynamic Analysis of Digital Chaotic Maps via State-Mapping Networks. 2322-2335 - Ehsan Jokar, Hadis Abolfathi, Arash Ahmadi, Majid Ahmadi:
An Efficient Uniform-Segmented Neuron Model for Large-Scale Neuromorphic Circuit Design: Simulation and FPGA Synthesis Results. 2336-2349 - John Pillans:
Improved Analog Filter Design by Random Search. 2350-2360 - Huaicheng Yan, Hao Zhang, Xisheng Zhan, Zhichen Li, Chun-xi Yang:
Event-Based $H_{\infty}$ Fault Detection for Buck Converter With Multiplicative Noises Over Network. 2361-2370 - Fangzhou Fu, Dayi Wang, Steven X. Ding, Dong Zhao:
Fault Identifiability Analysis of Linear Discrete Time-Varying Systems. 2371-2381 - Ling Lee, Chun-An Chen, Chiao-En Chen, Yuan-Hao Huang:
Square-Root Generalized Eigenvalue Decomposition Processor for Leakage-Based Multi-User MIMO Precoding With Multi-Antenna Users. 2382-2393 - Alberto Oliveri, Giulia Di Capua, Kateryna Stoyka, Matteo Lodi, Marco Storace, Nicola Femia:
A Power-Loss-Dependent Inductance Model for Ferrite-Core Power Inductors in Switch-Mode Power Supplies. 2394-2402
Volume 66-I, Number 7, July 2019
- Hui Liu, Xinpeng Xing, Georges G. E. Gielen:
An 85-MHz-BW ASAR-Assisted CT 4-0 MASH $\Delta\Sigma$ Modulator With Background Half-Range Dithering-Based DAC Calibration in 28-nm CMOS. 2405-2414 - Akshay Jayaraj, Mohammadhadi Danesh, Sanjeev Tannirkulam Chandrasekaran, Arindam Sanyal:
Highly Digital Second-Order $\Delta\Sigma$ VCO ADC. 2415-2425 - Yann Donnelly, Michael Peter Kennedy:
Wandering Spurs in MASH 1-1 Delta-Sigma Modulators. 2426-2439 - Hamidreza Maghami, Pedram Payandehnia, Hossein Mirzaie, Ramin Zanbaghi, Siladitya Dey, Kartikeya Mayaram, Terri S. Fiez:
A Highly Linear OTA-Free VCO-Based 1-1 MASH $\Delta\Sigma$ ADC. 2440-2453 - Wei-Ling Chang, Chinchun Meng, Jung-Hung Ni, Kai-Chun Chang, Chih-Kai Chang, Po-Yi Lee, Yen-Lin Huang:
Analytical Noise Optimization of Single-/Dual-Band MOS LNAs With Substrate and Metal Loss Effects of Inductors. 2454-2467 - Jinbo Li, Qun Jane Gu:
Harmonic-Based Nonlinearity Factorization of Switching Behavior in Up-Conversion Mixers. 2468-2477 - Frank Herzel, Silvio Waldmann, Dietmar Kissinger:
Numerical Jitter Minimization for PLL-Based FMCW Radar Systems. 2478-2488 - Giancarlo Lombardi, Bruno Neri:
On the Relationships Between Input and Output Stability in Two-Ports. 2489-2495 - Boyoung Lee, Seunggoo Nam, Juseop Lee:
Optimization-Free Design Equations for Narrowband Equal-Division Filtering Power Divider With Pre-Specified Filtering Response and Wideband Isolation. 2496-2507 - Pei-Yuan Chou, Jinn-Shyan Wang:
An All-Digital On-Chip Peak-to-Peak Jitter Measurement Circuit With Automatic Resolution Calibration for High PVT-Variation Resilience. 2508-2518 - Dhruv Patel, Adam Neale, Derek Wright, Manoj Sachdev:
Hybrid Latch-Type Offset Tolerant Sense Amplifier for Low-Voltage SRAMs. 2519-2532 - Srivatsa Rangachar Srinivasa, Akshay Krishna Ramanathan, Xueqing Li, Wei-Hao Chen, Sumeet Kumar Gupta, Meng-Fan Chang, Swaroop Ghosh, Jack Sampson, Vijaykrishnan Narayanan:
ROBIN: Monolithic-3D SRAM for Enhanced Robustness with In-Memory Computation Support. 2533-2545 - Kleanthis Papachatzopoulos, Vassilis Paliouras:
Static Delay Variation Models for Ripple-Carry and Borrow-Save Adders. 2546-2559 - Ugo Mureddu, Nathalie Bochard, Lilian Bossuet, Viktor Fischer:
Experimental Study of Locking Phenomena on Oscillating Rings Implemented in Logic Devices. 2560-2571 - Chun-Hun Wu, Pei-Yun Tsai:
An SVD Processor Based on Golub-Reinsch Algorithm for MIMO Precoding With Adjustable Precision. 2572-2583 - Aleksandr Cariow, Dorota Majorkowska-Mech, Janusz P. Paplinski, Galina Cariowa:
A New Fast Algorithm for Discrete Fractional Hadamard Transform. 2584-2592 - Tianchan Guan, Peiye Liu, Xiaoyang Zeng, Martha A. Kim, Mingoo Seok:
Recursive Binary Neural Network Training Model for Efficient Usage of On-Chip Memory. 2593-2605 - Brent Maundy, Ahmed S. Elwakil, Costas Psychalinos:
Correlation Between the Theory of Lissajous Figures and the Generation of Pinched Hysteresis Loops in Nonlinear Circuits. 2606-2614 - Jeeson Kim, Hussein Nili, Nhan Duy Truong, Taimur Ahmed, Jiawei Yang, Doo Seok Jeong, Sharath Sriram, Damith Chinthana Ranasinghe, Samuel James Ippolito, Hosung Chun, Omid Kavehei:
Nano-Intrinsic True Random Number Generation: A Device to Data Study. 2615-2626 - Martin Weiher, Melanie Herzig, Ronald Tetzlaff, Alon Ascoli, Thomas Mikolajick, Stefan Slesazeck:
Pattern Formation With Locally Active S-Type NbOx Memristors. 2627-2638 - Gabriel Antonio Fanelli de Souza, Rodrigo Bispo dos Santos, Lester de Abreu Faria:
Low-Power Current-Mode Interval Type-2 Fuzzy Inference Engine Circuit. 2639-2650 - Moslem Heidarpur, Arash Ahmadi, Majid Ahmadi, Mostafa Rahimi Azghadi:
CORDIC-SNN: On-FPGA STDP Learning With Izhikevich Neurons. 2651-2661 - Abdulhamid Zahedi, Saeed Haghiri, Mohsen Hayati:
Multiplierless Digital Implementation of Time-Varying FitzHugh-Nagumo Model. 2662-2670 - Victor M. van Santen, Hussam Amrouch, Jörg Henkel:
Modeling and Mitigating Time-Dependent Variability From the Physical Level to the Circuit Level. 2671-2684 - Ragh Kuttappa, Adarsha Balaji, Vasil Pano, Baris Taskin, Hamid Mahmoodi:
RotaSYN: Rotary Traveling Wave Oscillator SYNthesizer. 2685-2698 - Asma Ben Ahmed, Olfa Mosbahi, Mohamed Khalgui, Zhiwu Li:
Boundary Scan Extension for Testing Distributed Reconfigurable Hardware Systems. 2699-2708 - Hui Zhou, Yi Zhang, Wenxue Li:
Synchronization of Stochastic Lévy Noise Systems on a Multi-Weights Network and Its Applications of Chua's Circuits. 2709-2722 - Qiang Song, Guoping Lu, Guanghui Wen, Jinde Cao, Fang Liu:
Bipartite Synchronization and Convergence Analysis for Network of Harmonic Oscillator Systems With Signed Graph and Time Delay. 2723-2734 - Marco Crepaldi, Gian Nicola Angotzi, Luca Berdondini:
A 0.34 mm2 1 Gb/s Non-Coherent UWB Receiver Architecture With Pulse Enhancement and Double PLL Clock/Data Packet Recovery. 2735-2748 - Sudabeh Fotoohi Piraghaj, Saeed Saeedi:
Analysis of Timing Accuracy and Sensitivity in a RF Correlation-Based Impulse Radio Receiver With Phase Interpolation for Data Synchronization. 2749-2762 - Mojtaba Mahdavi, Ove Edfors, Viktor Öwall, Liang Liu:
A Low Latency FFT/IFFT Architecture for Massive MIMO Systems Utilizing OFDM Guard Bands. 2763-2774 - H. Bo Marr:
Fundamental Energy Limits of Digital Phased Arrays. 2775-2783 - Salar Chamanian, Berkay Çiftci, Hasan Ulusan, Ali Muhtaroglu, Haluk Külah:
Power-Efficient Hybrid Energy Harvesting System for Harnessing Ambient Vibrations. 2784-2793 - Ali Lotfi, Akihiko Katsuki, Fujio Kurokawa, Hiroo Sekiya, Marian K. Kazimierczuk, Frede Blaabjerg:
Analysis of Class-DE PA Using MOSFET Devices With Non-Equally Grading Coefficient. 2794-2802 - Yong Li, Jiefeng Hu, Xiaofei Li, Ka Wai Eric Cheng:
A Flexible Load-Independent Multi-Output Wireless Power Transfer System Based on Cascaded Double T-Resonant Circuits: Analysis, Design and Experimental Verification. 2803-2812
Volume 66-I, Number 8, August 2019
- Hao Xu, Asad A. Abidi:
Analysis and Design of Regenerative Comparators for Low Offset and Noise. 2817-2830 - Raviteja Theertham, Shanthi Pavan:
Unified Analysis, Modeling, and Simulation of Chopping Artifacts in Continuous-Time Delta-Sigma Modulators. 2831-2842 - Derui Kong, Ian Galton:
Subsampling Mismatch Noise Cancellation for High-Speed Continuous-Time DACs. 2843-2853 - David J. Stoops, Jenny Kuo, Paul J. Hurst, Bernard C. Levy, Stephen H. Lewis:
Digital Background Calibration of a Split Current-Steering DAC. 2854-2864 - Orazio Aiello, Paolo Stefano Crovetti, Massimo Alioto:
Fully Synthesizable Low-Area Digital-to-Analog Converter With Graceful Degradation and Dynamic Power-Resolution Scaling. 2865-2875 - Jeonggoo Song, Kareem Ragab, Xiyuan Tang, Nan Sun:
A 10-b 600-MS/s 2-Way Time-Interleaved SAR ADC With Mean Absolute Deviation-Based Background Timing-Skew Calibration. 2876-2887 - Ali Basaligheh, Parvaneh Saffari, Wolfgang Winkler, Kambiz Moez:
A Wide Tuning Range, Low Phase Noise, and Area Efficient Dual-Band Millimeter-Wave CMOS VCO Based on Switching Cores. 2888-2897 - Dongseok Shin, Kwang-Jin Koh:
24-GHz Injection-Locked Frequency Tripler With Third-Harmonic Quadrature Phase Generator. 2898-2906 - Yong-Hwan Moon, Jae-Wook Yoo, Young-Soo Ryu, Sang-Ho Kim, Kyung-Sub Son, Jin-Ku Kang:
A 2.41-pJ/bit 5.4-Gb/s Dual-Loop Reference-Less CDR With Fully Digital Quarter-Rate Linear Phase Detector for Embedded DisplayPort. 2907-2920 - Amirreza Alizadeh, Saleh Hassanzadehyamchi, Ali Medi:
Integrated Output Matching Networks for Class-J/J-1 Power Amplifiers. 2921-2934 - Chenyu Liang, Patrick Roblin, Yunsik Hahn, Zoya Popovic, Hsiu-Chen Chang:
Novel Outphasing Power Amplifiers Designed With an Analytic Generalized Doherty-Chireix Continuum Theory. 2935-2948 - Zhixian Deng, Huizhen Jenny Qian, Xun Luo:
Tunable Quasi-Circulator Based on a Compact Fully-Reconfigurable 180° Hybrid for Full-Duplex Transceivers. 2949-2962 - Byungkyu Song, Sara Choi, Seung-Hyuk Kang, Seong-Ook Jung:
Offset-Cancellation Sensing-Circuit-Based Nonvolatile Flip-Flop Operating in Near-Threshold Voltage Region. 2963-2972 - Sebastian Höppner, Bernhard Vogginger, Yexin Yan, Andreas Dixius, Stefan Scholze, Johannes Partzsch, Felix Neumärker, Stephan Hartmann, Stefan Schiefer, Georg Ellguth, Love Cederstroem, Luis A. Plana, Jim D. Garside, Steve B. Furber, Christian Mayr:
Dynamic Power Management for Neuromorphic Many-Core Systems. 2973-2986 - Ching-Chun Liao, Ting-Sheng Chen, An-Yeu Wu:
Real-Time Multi-User Detection Engine Design for IoT Applications via Modified Sparsity Adaptive Matching Pursuit. 2987-3000 - Junqi Huang, T. Nandha Kumar, Haider A. F. Almurib, Fabrizio Lombardi:
A Deterministic Low-Complexity Approximate (Multiplier-Less) Technique for DCT Computation. 3001-3014 - Junjie Yang, Yi Guo, Zuyuan Yang, Shengli Xie:
Under-Determined Convolutive Blind Source Separation Combining Density-Based Clustering and Sparse Reconstruction in Time-Frequency Domain. 3015-3027 - Luka Ribar, Rodolphe Sepulchre:
Neuromodulation of Neuromorphic Circuits. 3028-3040 - Georgios Papandroulidakis, Alexander Serb, Ali Khiat, Geoff V. Merrett, Themis Prodromakis:
Practical Implementation of Memristor-Based Threshold Logic Gates. 3041-3051 - Esraa M. Hamed, Mohammed E. Fouda, Ahmed G. Radwan:
Multiple Pinch-Off Points in Memristive Equations: Analysis and Experiments. 3052-3063 - Amogh Agrawal, Akhilesh Jaiswal, Deboleena Roy, Bing Han, Gopalakrishnan Srinivasan, Aayush Ankit, Kaushik Roy:
Xcel-RAM: Accelerating Binary Neural Networks in High-Throughput SRAM Compute Arrays. 3064-3076 - Jahyun Koo, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Quadrature RC Oscillator With Noise Reduction by Voltage Swing Control. 3077-3088 - Yang Yang, Huiwen Xu, Dong Yue:
Observer-Based Distributed Secure Consensus Control of a Class of Linear Multi-Agent Systems Subject to Random Attacks. 3089-3099 - Guanghui Wen, Peijun Wang, Xinghuo Yu, Wenwu Yu, Jinde Cao:
Pinning Synchronization of Complex Switching Networks With a Leader of Nonzero Control Inputs. 3100-3112 - Xiaoqun Wu, Wenbin Wei, Longkun Tang, Junan Lu, Jinhu Lü:
Coreness and $h$ -Index for Weighted Networks. 3113-3122 - Jie Wu, Xinghuo Yu, Xiang Li:
Global Frequency Synchronization of Complex Power Networks Via Coordinating Switching Control. 3123-3133 - Junning Jiang, Jusung Kim, Aydin Ilker Karsilayan, José Silva-Martínez:
A 3-6-GHz Highly Linear I-Channel Receiver With Over +3.0-dBm In-Band P1dB and 200-MHz Baseband Bandwidth Suitable for 5G Wireless and Cognitive Radio Applications. 3134-3147 - Yo-Sheng Lin, Yuanxun Ethan Wang:
Design and Analysis of a 94-GHz CMOS Down-Conversion Mixer With CCPT-RL-Based IF Load. 3148-3161 - Spoorthi Nayak, Abdelrahman H. Ahmed, Ahmad Sharkia, Ajith Sivadhasan Ramani, Shahriar Mirabbasi, Sudip Shekhar:
A 10-Gb/s -18.8 dBm Sensitivity 5.7 mW Fully-Integrated Optoelectronic Receiver With Avalanche Photodetector in 0.13- $\mu$ m CMOS. 3162-3173 - Wenjie Li, Jun Lin, Zhongfeng Wang:
A 124-Gb/s Decoder for Generalized Integrated Interleaved Codes. 3174-3187 - Hangxuan Cui, Jun Lin, Zhongfeng Wang:
An Improved Gradient Descent Bit-Flipping Decoder for LDPC Codes. 3188-3200 - Diaaeldin Abdelrahman, Glenn E. R. Cowan:
Noise Analysis and Design Considerations for Equalizer-Based Optical Receivers. 3201-3212 - Fang Lu, Yan Dong, Chang Wen Chen:
Layered Decoding Algorithm and Two-Level Quasi-Cyclic Matrix Construction for Rate Compatible Modulation. 3213-3226 - Kishalay Datta, Vinod Menezes, Shanthi Pavan:
Analysis and Design of Cyclic Switched-Capacitor DC-DC Converters. 3227-3237 - Mohammad Amin Karami, Kambiz Moez:
Systematic Co-Design of Matching Networks and Rectifiers for CMOS Radio Frequency Energy Harvesters. 3238-3251
Volume 66-I, Number 9, September 2019
- Elena Blokhina:
Guest Editorial Special Issue on the 2019 International Symposium on Integrated Circuits and Systems. 3253 - Matthew Schormans, Dai Jiang, Virgilio Valente, Andreas Demosthenous:
Short-Range Quality-Factor Modulation (SQuirM) for Low Power High Speed Inductive Data Transfer. 3254-3265 - Xiaojun Bi, Zhen Gu, Qinfen Xu:
Analysis and Design of Ultra-Large Dynamic Range CMOS Transimpedance Amplifier With Automatically-Controlled Multi-Current-Bleeding Paths. 3266-3278 - Xiong Song, Zhenghao Lu, Liying Cai, Xiaopeng Yu, Kiat Seng Yeo, Jer-Ming Chen:
A Wideband dB-Linear VGA With Temperature Compensation and Active Load. 3279-3287 - Hao-Chung Cheng, Yen-Ting Chen, Po-Hung Chen, Yu-Te Liao:
An Optically-Powered 432 MHz Wireless Tag for Batteryless Internet-of-Things Applications. 3288-3295 - Erfan Ghaderi, Ajith Sivadhasan Ramani, Arya A. Rahimi, Deukhyoun Heo, Sudip Shekhar, Subhanshu Gupta:
An Integrated Discrete-Time Delay-Compensating Technique for Large-Array Beamformers. 3296-3306 - Ka-Fai Un, Gengzhen Qi, Jun Yin, Shiheng Yang, Shupeng Yu, Chio-In Ieong, Pui-In Mak, Rui Paulo Martins:
A 0.12-mm2 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N Bang-Bang Digital PLL With 8-µs Settling Time for Multi-ISM-Band ULP Radios. 3307-3316 - Jingcheng Tao, Chun-Huat Heng:
A 2.2-GHz 3.2-mW DTC-Free Sampling ΔΣ Fractional-N PLL With -110-dBc/Hz In-Band Phase Noise and -246-dB FoM and -83-dBc Reference Spur. 3317-3329 - Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins:
A 0.0018-mm2 153% Locking-Range CML-Based Divider-by-2 With Tunable Self-Resonant Frequency Using an Auxiliary Negative-gm Cell. 3330-3339 - Nikolaus Hammler, Andreia Cathelin, Philippe Cathelin, Boris Murmann:
A Spectrum-Sensing DPD Feedback Receiver With 30× Reduction in ADC Acquisition Bandwidth and Sample Rate. 3340-3351 - Mohammad H. Naderi, Chulhyun Park, Suraj Prakash, Martin Kinyua, Eric G. Soenen, José Silva-Martínez:
A 27.7 fJ/conv-step 500 MS/s 12-Bit Pipelined ADC Employing a Sub-ADC Forecasting Technique and Low-Power Class AB Slew Boosted Amplifiers. 3352-3364 - Xuewei Lei, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
A 4-b 7-µW Phase Domain ADC With Time Domain Reference Generation for Low-Power FSK/PSK Demodulation. 3365-3372 - Dadian Zhou, Carlos Briseno-Vidrios, Junning Jiang, Chulhyun Park, Qiyuan Liu, Eric G. Soenen, Martin Kinyua, José Silva-Martínez:
A 13-Bit 260MS/s Power-Efficient Pipeline ADC Using a Current-Reuse Technique and Interstage Gain and Nonlinearity Errors Calibration. 3373-3383 - Mahmoud Sadollahi, Gabor C. Temes:
A 10-MHz BW 77.9 dB SNDR DT MASH Δ!Σ ADC With NC-VCO-Based Quantizer and OPAMP Sharing. 3384-3392 - Sangeeta Kumar, Rajashekar Goroju, Dileep Kumar Bhat, K. S. Rakshitdatta, Nagendra Krishnapura:
Design Considerations for Low-Distortion Filter and Oscillator ICs for Testing High-Resolution ADCs. 3393-3401 - Elisabetta Moisello, Michele Vaiana, Maria Eloisa Castagna, Giuseppe Bruno, Piero Malcovati, Edoardo Bonizzoni:
An Integrated Micromachined Thermopile Sensor With a Chopper Interface Circuit for Contact-Less Temperature Measurements. 3402-3413 - Chen Yuan, Sudip Shekhar:
A Supply-Noise-Insensitive Digitally-Controlled Oscillator. 3414-3422 - Devrishi Khanna, Chirn Chye Boon, Pilsoon Choi, Liter Siek, Bei Liu, Chenyang Li:
A Low-Noise, Positive-Input, Negative-Output Voltage Generator for Low-to-Moderate Driving Capacity Applications. 3423-3436 - Zhicong Luo, Li-Chin Yu, Ming-Dou Ker:
An Efficient, Wide-Output, High-Voltage Charge Pump With a Stage Selection Circuit Realized in a Low-Voltage CMOS Process. 3437-3444 - Yannick Wenger, Bernd Meinerzhagen:
Low-Voltage Current and Voltage Reference Design Based on the MOSFET ZTC Effect. 3445-3456 - Lidan Wang, Chenchang Zhan:
A 0.7-V 28-nW CMOS Subthreshold Voltage and Current Reference in One Simple Circuit. 3457-3466 - Hao-Chiao Hong, Long-Yi Lin:
Accurate and Fast On-Wafer Test Circuitry for Device Array Characterization in Wafer Acceptance Test. 3467-3479 - Chen Yang, Yizhou Wang, Xiaoli Wang, Li Geng:
WRA: A 2.2-to-6.3 TOPS Highly Unified Dynamically Reconfigurable Accelerator Using a Novel Winograd Decomposition Algorithm for Convolutional Neural Networks. 3480-3493 - Xiaojin Zhao, Peizhou Gan, Qiang Zhao, Dejian Liang, Yuan Cao, Xiaofang Pan, Amine Bermak:
A 124 fJ/Bit Cascode Current Mirror Array Based PUF With 1.50% Native Unstable Bit Ratio. 3494-3503 - Shang-Yuan Chang, Bing-Chen Wu, Yi-Long Liou, Rui-Xuan Zheng, Pei-Lin Lee, Tzi-Dar Chiueh, Tsung-Te Liu:
An Ultra-Low-Power Dual-Mode Automatic Sleep Staging Processor Using Neural-Network-Based Decision Tree. 3504-3516 - Thomas Paireder, Christian Motz, Ram Sunil Kanumalli, Silvester Sadjina, Mario Huemer:
Ultra-Low Complex Blind I/Q-Imbalance Compensation. 3517-3530 - Nagendra Krishnapura, Anoop Narayan Bhat, Subhashish Mukherjee, Kumar Anurag Shrivastava, Madhulatha Bonu:
Maximizing the Data Rate of an Inductively Coupled Chip-to-Chip Link by Resetting the Channel State Variables. 3531-3543 - João L. A. de Melo, Nuno Pereira, Pedro V. Leitão, Nuno Paulino, João Goes:
A Systematic Design Methodology for Optimization of Sigma-Delta Modulators Based on an Evolutionary Algorithm. 3544-3556 - Vadim Issakov, Sebastian Kehl-Waas, Sascha Breun:
Analytical Equivalent Circuit Extraction Procedure for Broadband Scalable Modeling of Three-Port Center-Tapped Symmetric On-Chip Inductors. 3557-3570 - Wei-Cheng Sun, Yu-Chieh Su, Yeong-Luh Ueng, Chia-Hsiang Yang:
An LDPC-Coded SCMA Receiver With Multi-User Iterative Detection and Decoding. 3571-3584 - Cheng-Han Li, Yen-Lin Chen, Wan-Nong Hu, Chiao-En Chen, Yuan-Hao Huang:
A 4 × 64 MIMO Detector for Generalized Spatial Modulation Systems. 3585-3597 - Arunkumar Salimath, Edoardo Botti, Giovanni Gonano, Paolo Cacciagrano, Davide Luigi Brambilla, Tommaso Barbieri, Franco Maloberti, Edoardo Bonizzoni:
An 86% Efficiency, Wide-V in SIMO DC-DC Converter Embedded in a Car-Radio IC. 3598-3609 - Guigang Cai, Chenchang Zhan, Yan Lu:
A Fast-Transient-Response Fully-Integrated Digital LDO With Adaptive Current Step Size Control. 3610-3619 - Qiong Wei Low, Liter Siek:
A Single-Stage Dual-Output Tri-Mode AC-DC Regulator for Inductively Powered Application. 3620-3630 - Fu-Yan Xie, Bing-Chen Wu, Tsung-Te Liu:
A Ripple Reduction Method for Switched-Capacitor DC-DC Voltage Converter Using Fully Digital Resistance Modulation. 3631-3641
Volume 66-I, Number 10, October 2019
- Sevil Zeynep Lulec, David A. Johns, Antonio Liscidini:
A Third-Order Integrated Passive Switched-Capacitor Filter Obtained With a Continuous-Time Design Approach. 3643-3652 - Gabrielle Guitton, Marcelo de Souza, André Augusto Mariano, Thierry Taris:
Design Methodology Based on the Inversion Coefficient and its Application to Inductorless LNA Implementations. 3653-3663 - Amirreza Alizadeh, Milad Frounchi, Ali Medi:
Class-J23 Power Amplifiers. 3664-3675 - Dan Li, Ming Liu, Shengwei Gao, Yongjun Shi, Yihua Zhang, Zhiyong Li, Patrick Yin Chiang, Franco Maloberti, Li Geng:
Low-Noise Broadband CMOS TIA Based on Multi-Stage Stagger-Tuned Amplifier for High-Speed High-Sensitivity Optical Communication. 3676-3689 - Jeng-Han Tsai:
Design of a 5.2-GHz CMOS Power Amplifier Using TF-Based 2-Stage Dual-Radial Power Splitting/Combining Architecture. 3690-3699 - Kamlesh Badiyari, Nagarjuna Nallam, Shouri Chatterjee:
An N-Path Band-Pass Filter With Parametric Gain-Boosting. 3700-3712 - Shahbaz Abbasi, Omer Ceylan, Yasar Gurbuz:
A DROIC Based on PFM ADCs Employing Over-Integration for Error Shaping. 3713-3722 - Jaekwon Kim, Woojin Jang, Yanghoon Lee, Wan Kim, Seunghyun Oh, Jongwoo Lee, Jaehyuk Choi, Jung-Hoon Chun, Thomas Byunghak Cho:
Design and Analysis of a 12-b Current-Steering DAC in a 14-nm FinFET Technology for 2G/3G/4G Cellular Applications. 3723-3732 - Zhao Zhang, Jincheng Yang, Liyuan Liu, Nan Qi, Peng Feng, Jian Liu, Nanjian Wu:
An 18-23 GHz 57.4-fs RMS Jitter -253.5-dB FoM Sub-Harmonically Injection-Locked All-Digital PLL With Single-Ended Injection Technique and ILFD Aided Adaptive Injection Timing Alignment Technique. 3733-3746 - Armia Salib, Mark F. Flanagan, Barry Cardiff:
A High-Precision Time Skew Estimation and Correction Technique for Time-Interleaved ADCs. 3747-3760 - Claudia Palattella, Eric A. M. Klumperink, Mark S. Oude Alink, Bram Nauta:
Digital-to-Frequency Converters With a DTC: Theoretical Analysis of the Output SFDR. 3761-3774 - Alessio Santiccioli, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino:
Time-Variant Modeling and Analysis of Multiplying Delay-Locked Loops. 3775-3785 - Lianxi Liu, Xufeng Liao, Junchao Mu:
A 3.6 µVrms Noise, 3 ppm/°C TC Bandgap Reference With Offset/Noise Suppression and Five-Piece Linear Compensation. 3786-3796 - Yong-Joon Jeon, Lei Yao, Yuan Gao, Muthukumaraswamy Annamalai Arasu:
A 0.034% Charge-Imbalanced Neural Stimulation Front-End (SFE) IC With on-Chip Voltage Compliance Monitoring Circuit and Analysis on Resting Potential by Utilizing the SFE IC. 3797-3810 - Amir Ebrahimi, Thomas C. Baum, Ke Wang, James R. Scott, Kamran Ghorbani:
Differential Transmission Lines Loaded With Magnetic LC Resonators and Application in Common Mode Suppression. 3811-3821 - Yuan Chun Li, Qin-chuang Chen, Quan Xue, Jinchao Mou:
Filtering Power Amplifier With Wide Bandwidth Using Discriminating Coupling. 3822-3830 - Li Gao, Tsu-Wei Lin, Gabriel M. Rebeiz:
Design of Tunable Multi-Pole Multi-Zero Bandpass Filters and Diplexer With High Selectivity and Isolation. 3831-3842 - Minkyu Kim, Abinash Mohanty, Deepak Kadetotad, Luning Wei, Xiaofei He, Yu Cao, Jae-sun Seo:
A Real-Time 17-Scale Object Detection Accelerator With Adaptive 2000-Stage Classification in 65 nm CMOS. 3843-3853 - Raziyeh Salarifard, Siavash Bayat Sarmadi:
An Efficient Low-Latency Point-Multiplication Over Curve25519. 3854-3862 - Hans Kanders, Tobias Mellqvist, Mario Garrido, Kent Palmkvist, Oscar Gustafsson:
A 1 Million-Point FFT on a Single FPGA. 3863-3873 - Hossein Mahdavi, Somayeh Timarchi:
Area-Time-Power Efficient FFT Architectures Based on Binary-Signed-Digit CORDIC. 3874-3881 - Sandeep Patel, Ravindra Dhuli, Brejesh Lall:
Analysis of Signals via Non-Maximally Decimated Non-Uniform Filter Banks. 3882-3895 - Seiya Yoshida, Shintaro Izumi, Koichi Kajihara, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Energy-Efficient Spectral Analysis Method Using Autoregressive Model-Based Approach for Internet of Things. 3896-3905 - Changju Yang, Shyam Prasad Adhikari, Hyongsuk Kim:
On Learning With Nonlinear Memristor-Based Neural Network and its Replication. 3906-3916 - Michele Bonnin, Fabio L. Traversa, Fabrizio Bonani:
Colored Noise in Oscillators. Phase-Amplitude Analysis and a Method to Avoid the itô-Stratonovich Dilemma. 3917-3927 - Xiao-Zheng Jin, Chengcheng Jiang, Jiahu Qin, Wei Xing Zheng:
Robust Pinning Constrained Control and Adaptive Regulation of Coupled Chua's Circuit Networks. 3928-3940 - Nilan Udayanga, S. I. Hariharan, Soumyajit Mandal, Leonid Belostotski, Len T. Bruton, Arjuna Madanayake:
Continuous-Time Algorithms for Solving Maxwell's Equations Using Analog Circuits. 3941-3954 - Muhammad Saeed Aslam, Peng Shi, Cheng-Chew Lim:
Robust Active Noise Control Design by Optimal Weighted Least Squares Approach. 3955-3967 - Peng Wang, Jun Zhao:
Almost Output Regulation for Switched Positive Systems With Different Coordinates Transformations and its Application to a Positive Circuit Model. 3968-3977 - Roshni Maiti, Kaushik Das Sharma, Gautam Sarkar:
Linear Consequence-Based Fuzzy Parallel Distributed Compensation Type L1 Adaptive Controller for Two Link Robot Manipulator. 3978-3990 - Yong Chen, Pui-In Mak, Zunsong Yang, Chirn Chye Boon, Rui Paulo Martins:
A 0.0071-mm2 10.8pspp-Jitter 4 to 10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for Sub-1-UI Fractional De-Emphasis. 3991-4004 - Xiangyun Deng, Jin Sha, Xiaotian Zhou, Yuxiang Fu, Zaichen Zhang, Xiaohu You, Chuan Zhang:
Joint Detection and Decoding of Polar-Coded OFDM-IDMA Systems. 4005-4017 - Xinmiao Zhang, Zhenshan Xie:
Efficient Architectures for Generalized Integrated Interleaved Decoder. 4018-4031 - Yaoyu Tao, Shuanghong Sun, Zhengya Zhang:
Efficient Post-Processors for Improving Error-Correcting Performance of LDPC Codes. 4032-4043 - Maria Jesus Canavate Sanchez, Andrea Segneri, Savvas A. Kosmopoulos, Qiuming Zhu, Theodoros A. Tsiftsis, Apostolos Georgiadis, George Goussetis:
Novel Data Pre-Distorter for APSK Signals in Solid-State Power Amplifiers. 4044-4054 - Yongjie Jiang, Sita Asar, Muhammad Swilam Ahmed, Hua Zhang, Ayman A. Fayed:
Output Control Techniques for Dual-Frequency SIMO Buck Converters. 4055-4067 - Hung-Hsien Wu, Chi-Hsiang Huang, Chia-Ling Wei, Jih-Sheng Lai:
Bidirectional Single-Inductor Dual-Supply Converter With Automatic State-Transition for IoT Applications. 4068-4078 - Ahmed M. Mohey, Sameh A. Ibrahim, Ismail M. Hafez, HyungWon Kim:
Design Optimization for Low-Power Reconfigurable Switched-Capacitor DC-DC Voltage Converter. 4079-4092
Volume 66-I, Number 11, November 2019
- Siddharth Joshi, Chul Kim, Chris M. Thomas, Gert Cauwenberghs:
Digitally Adaptive High-Fidelity Analog Array Signal Processing Resilient to Capacitive Multiplying DAC Inter-Stage Gain Error. 4095-4107 - Yann Donnelly, Michael Peter Kennedy:
Prediction of Phase Noise and Spurs in a Nonlinear Fractional-N Frequency Synthesizer. 4108-4121 - Pekka Keränen, Juha Kostamovaara:
256 × 8 SPAD Array With 256 Column TDCs for a Line Profiling Laser Radar. 4122-4133 - James K. Cavers, Kishore Mehrotra, Graeme K. Woodward:
Advantages of Second-Order Cartesian Feedback Linearizers for Radio Amplifiers. 4134-4146 - Ajith Sivadhasan Ramani, Spoorthi Nayak, Sudip Shekhar:
A Differential Push-Pull Voltage Mode VCSEL Driver in 65-nm CMOS. 4147-4157 - Mohammad S. Islam, Siddharth K. Singh, George Xereas, Vamsy P. Chodavarapu, Soumyajit Mandal:
A Digitally Programmable CMOS Feedback ASIC for Highly Stable MEMS-Referenced Oscillators. 4158-4171 - Xin Si, Win-San Khwa, Jia-Jing Chen, Jia-Fang Li, Xiaoyu Sun, Rui Liu, Shimeng Yu, Hiroyuki Yamauchi, Qiang Li, Meng-Fan Chang:
A Dual-Split 6T SRAM-Based Computing-in-Memory Unit-Macro With Fully Parallel Product-Sum Operation for Binarized DNN Edge Processors. 4172-4185 - Weng-Geng Ho, Kwen-Siong Chong, Tony Tae-Hyoung Kim, Bah-Hwee Gwee:
A Secure Data-Toggling SRAM for Confidential Data Protection. 4186-4199 - Farnaz Sabetzadeh, Mohammad Hossein Moaiyeri, Mohammad Ahmadinejad:
A Majority-Based Imprecise Multiplier for Ultra-Efficient Approximate Image Multiplication. 4200-4208 - Amir Jalali, Reza Azarderakhsh, Mehran Mozaffari Kermani, Matthew Campagna, David Jao:
ARMv8 SIKE: Optimized Supersingular Isogeny Key Encapsulation on ARMv8 Processors. 4209-4218 - Abdullah Ash-Saki, Sung-Hao Lin, Mahabubul Alam, Sandeep Krishna Thirumala, Sumeet Kumar Gupta, Swaroop Ghosh:
A Family of Compact Non-Volatile Flip-Flops With Ferroelectric FET. 4219-4229 - Lichen Feng, Zunchao Li, Yuanfa Wang, Chuang Wang:
A Fast On-Chip SVM-Training System With Dual-Mode Configurable Pipelines and MSMO Scheduler. 4230-4241 - Feiran Yang, Jun Yang:
Convergence Analysis of Deficient-Length Frequency-Domain Adaptive Filters. 4242-4255 - Nishant Kumar, Bhim Singh, Bijaya Ketan Panigrahi:
ANOVA Kernel Kalman Filter for Multi-Objective Grid Integrated Solar Photovoltaic-Distribution Static Compensator. 4256-4264 - Lujuan Dang, Badong Chen, Shiyuan Wang, Yuantao Gu, José C. Príncipe:
Kernel Kalman Filtering With Conditional Embedding and Maximum Correntropy Criterion. 4265-4277 - Gyu-Seob Jeong, Byungjun Kang, Haram Ju, Kwanseo Park, Deog-Kyoon Jeong:
A Modulo-FIR Equalizer for Wireline Communications. 4278-4286 - Subhabrata Roy, Abhijit Chandra:
On the Order Minimization of Interpolated Bandpass Method Based Narrow Transition Band FIR Filter Design. 4287-4295 - Subiman Chatterjee, Kishor Sarawadekar:
Approximated Core Transform Architectures for HEVC Using WHT-Based Decomposition Method. 4296-4308 - Robert T. Wirski:
Synthesis and Realization of Two-Dimensional Separable Denominator Orthogonal Systems via Decomposition Into 1-D Systems. 4309-4322 - Dong Liu, Chi K. Tse:
Cascading Failure of Cyber-Coupled Power Systems Considering Interactions Between Attack and Defense. 4323-4336 - Thanasin Bunnam, Ahmed Soltan, Danil Sokolov, Oleg V. Maevsky, Alex Yakovlev:
Toward Designing Thermally-Aware Memristance Decoder. 4337-4347 - Kyung Min Kim, R. Stanley Williams:
A Family of Stateful Memristor Gates for Complete Cascading Logic. 4348-4355 - Farid Kenarangi, Inna Partin-Vaisband:
Leveraging Independent Double-Gate FinFET Devices for Machine Learning Classification. 4356-4367 - Rassul Bairamkulov, Eby G. Friedman:
Effective Resistance of Two-Dimensional Truncated Infinite Mesh Structures. 4368-4376 - Xiangpeng Xie, Dong Yue, Ju H. Park:
Observer-Based Fault Estimation for Discrete-Time Nonlinear Systems and Its Application: A Weighted Switching Approach. 4377-4387 - Bernardo Severino, Kai Strunz:
Enhancing Transient Stability of DC Microgrid by Enlarging the Region of Attraction Through Nonlinear Polynomial Droop Control. 4388-4401 - Rodrigo Morfin Magaña, J. Jesús Rico-Melgoza, Fernando Ornelas-Tellez, Francesco Vasca:
Complementarity Model of a Photovoltaic Power Electronic System With Model Predictive Control. 4402-4414 - Yue Song, David J. Hill, Tao Liu:
On Extension of Effective Resistance With Application to Graph Laplacian Definiteness and Power Network Stability. 4415-4428 - Qiang Jia, Zeyu Han, Wallace K. S. Tang:
Synchronization of Multi-Agent Systems With Time-Varying Control and Delayed Communications. 4429-4438 - Mazen Soliman, Abhay Kochhar, Hoda Abdelsalam, Flavius V. Pop, Gabriel Vidal-Álvarez, Jeffrey A. Weldon, Gianluca Piazza, Jeyanandh Paramesh:
An 18 nW -47/-40 dBm Sensitivity 3/100 kbps MEMS-Assisted CMOS Wake-Up Receiver. 4439-4447 - Rohit B. Chaurasiya, Rahul Shrestha:
Hardware-Efficient and Fast Sensing-Time Maximum-Minimum-Eigenvalue-Based Spectrum Sensor for Cognitive Radio Network. 4448-4461 - Seokha Hwang, Seungsik Moon, Jaehwan Jung, Daesung Kim, In-Cheol Park, Jeongseok Ha, Youngjoo Lee:
Energy-Efficient Symmetric BC-BCH Decoder Architecture for Mobile Storages. 4462-4475 - Cheng-Hung Lin, Ching-Wen Hsieh:
Low-Routing-Complexity Convolutional/Turbo Decoder Design for Iterative Detection and Decoding Receivers. 4476-4489 - Jun Song, Yugang Niu, Hak-Keung Lam:
Reliable Sliding Mode Control of Fast Sampling Singularly Perturbed Systems: A Redundant Channel Transmission Protocol Approach. 4490-4501 - Sijie Pan, Philip K. T. Mok:
A 10-MHz Hysteretic-Controlled Buck Converter With Single On/Off Reference Tracking Using Turning-Point Prediction for DVFS Application. 4502-4515 - Balakumar Muniandi, Chao-Jen Huang, Chun-Chieh Kuo, Te-Fu Yang, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
A 97% Maximum Efficiency Fully Automated Control Turbo Boost Topology for Battery Chargers. 4516-4527 - Weiguo Lu, Jinxin Han, Shaoling Li, Herbert Ho-Ching Iu:
Mitigating Line Frequency Instability of Boost PFC Converter Under Proportional Outer-Voltage Loop With Additional Third Current-Harmonic Feedforward Compensation. 4528-4541 - Xu Chen, Shengbao Yu, Zhe Zhang:
A Receiver-Controlled Coupler for Multiple Output Wireless Power Transfer Applications. 4542-4552
Volume 66-I, Number 12, December 2019
- Andreas Demosthenous:
Outgoing Editorial. 4555-4556 - Gianluca Giustolisi, Gaetano Palumbo:
In-Depth Analysis of Pole-Zero Compensations in CMOS Operational Transconductance Amplifiers. 4557-4570 - Hamidreza Mafi, Mostafa Yargholi, Mohammad Yavari, Shahriar Mirabbasi:
Digital Calibration of Elements Mismatch in Multirate Predictive SAR ADCs. 4571-4581 - Shuenn-Yuh Lee, Chieh Tsou, Yu-Cheng Li:
Single-Bin DFT-Based Digital Calibration Technique for CDAC in SAR ADCs. 4582-4591 - Yang Zhang, Debajit Basak, Kong-Pang Pun:
A Highly Linear Multi-Level SC DAC in a Power-Efficient Gm-C Continuous-Time Delta-Sigma Modulator. 4592-4605 - Augusto Guilabert, Matthew A. Morgan, Tod A. Boyd:
Reflectionless Filters for Generalized Elliptic Transmission Functions. 4606-4618 - Alican Çaglar, Mustafa Berke Yelten:
Design of Cryogenic LNAs for High Linearity in Space Applications. 4619-4627 - Ragh Kuttappa, Selçuk Köse, Baris Taskin:
FOPAC: Flexible On-Chip Power and Clock. 4628-4636 - Bo Wei Xu, Shao Yong Zheng, Weimin Wang, Yongle Wu, Yuan'an Liu:
A Coupled Line-Based Coupler With Simultaneously Tunable Phase and Frequency. 4637-4647 - Shixuan Zheng, Peng Ouyang, Dandan Song, Xiudong Li, Leibo Liu, Shaojun Wei, Shouyi Yin:
An Ultra-Low Power Binarized Convolutional Neural Network-Based Speech Recognition Processor With On-Chip Self-Learning. 4648-4661 - Ramtin Zand, Ronald F. DeMara:
MRAM-Enhanced Low Power Reconfigurable Fabric With Multi-Level Variation Tolerance. 4662-4672 - Suresh Mopuri, Amit Acharyya:
Low Complexity Generic VLSI Architecture Design Methodology for Nth Root and Nth Power Computations. 4673-4686 - Mohammad Ansari, Arash Fayyazi, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram:
OCTAN: An On-Chip Training Algorithm for Memristive Neuromorphic Circuits. 4687-4698 - Huai-Ting Li, Ching-Yao Chou, Yi-Ta Chen, Sheng-Hui Wang, An-Yeu Wu:
Robust and Lightweight Ensemble Extreme Learning Machine Engine Based on Eigenspace Domain for Compressed Learning. 4699-4712 - Chih-Feng Wu, Chun-Hung Chen, Muh-Tian Shiue:
A Design of Input-Decimation Technique for Recursive DFT/IDFT Algorithm. 4713-4726 - Weiqiang Liu, Qicong Liao, Fei Qiao, Weijie Xia, Chenghua Wang, Fabrizio Lombardi:
Approximate Designs for Fast Fourier Transform (FFT) With Application to Speech Recognition. 4727-4739 - Ruijie Zhao, Xiaoying Hong:
Matrix-Based Algorithms for the Optimal Design of Variable Fractional Delay FIR Filters. 4740-4752 - Fraser K. Coutts, Ian K. Proudler, Stephan Weiss:
Efficient Implementation of Iterative Polynomial Matrix EVD Algorithms Exploiting Structural Redundancy and Parallelisation. 4753-4766 - Ning Wang, Chengqing Li, Han Bao, Mo Chen, Bocheng Bao:
Generating Multi-Scroll Chua's Attractors via Simplified Piecewise-Linear Chua's Diode. 4767-4779 - Ismail Öztürk, Recai Kiliç:
Higher Dimensional Baker Map and its Digital Implementation With LSB-Extension Method. 4780-4792 - Ciyan Zheng, Dongsheng Yu, Herbert Ho-Ching Iu, Tyrone Fernando, Tingting Sun, Jason Kamran Eshraghian, Hengdao Guo:
A Novel Universal Interface for Constructing Memory Elements for Circuit Applications. 4793-4806 - Mikiya Tanaka, Masayuki Yamauchi, Yoshifumi Nishio:
Phase-Inversion Waves Propagating in an In-Phase Synchronization on Oscillators Coupled as a Cross. 4807-4816 - Jinliang Liu, Meng Yang, Engang Tian, Jie Cao, Shumin Fei:
Event-Based Security Control for State-Dependent Uncertain Systems Under Hybrid-Attacks and Its Application to Electronic Circuits. 4817-4828 - Shengping Luo, Dan Ye:
Adaptive Double Event-Triggered Control for Linear Multi-Agent Systems With Actuator Faults. 4829-4839 - Shang Shi, Shengyuan Xu, Jason Gu, Huifang Min:
Global High-Order Sliding Mode Controller Design Subject to Mismatched Terms: Application to Buck Converter. 4840-4849 - Chao Fan, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins:
A 40-Gb/s PAM-4 Transmitter Using a 0.16-pJ/bit SST-CML-Hybrid (SCH) Output Driver and a Hybrid-Path 3-Tap FFE Scheme in 28-nm CMOS. 4850-4861 - Parvaneh Saffari, Ali Basaligheh, Kambiz Moez:
An RF-to-DC Rectifier With High Efficiency Over Wide Input Power Range for RF Energy Harvesting Applications. 4862-4875 - Abhishekh Devaraj, Mohamed Megahed, Yutao Liu, Ashwin Ramachandran, Tejasvi Anand:
A Switched Capacitor Multiple Input Single Output Energy Harvester (Solar + Piezo) Achieving 74.6% Efficiency With Simultaneous MPPT. 4876-4887 - Seneke Chamith Chandrarathna, Jong-Wook Lee:
A Dual-Stage Boost Converter Using Two- Dimensional Adaptive Input-Sampling MPPT for Thermoelectric Energy Harvesting. 4888-4900 - Chenghui Qian, Ting Qian:
An LLC-Type Resonant Forward Converter With Adjustable Turning-Off Time Control. 4901-4910 - Bing Hao Lin, Jin Tong Tsai, Kuo-Lung Lian:
A Non-Invasive Method for Estimating Circuit and Control Parameters of Voltage Source Converters. 4911-4921
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