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ORCIDIEEE Transactions on Circuits and Systems I: Regular Papers, Volume 66
Volume 66-I, Number 1, January 2019
- Ian Galton
, Colin Weltin-Wu:
Understanding Phase Error and Jitter: Definitions, Implications, Simulations, and Measurement. 1-19 - Shubin Liu, Zhangming Zhu, Jingyu Wang, Lianxi Liu, Yintang Yang:
A 1.2-V 2.41-GHz Three-Stage CMOS OTA With Efficient Frequency Compensation Technique. 20-30 - Mitra Gilasgar, Antoni Barlabé, Lluís Pradell:
A 2.4 GHz CMOS Class-F Power Amplifier With Reconfigurable Load-Impedance Matching. 31-42 - Ahmad Sharkia, Sankaran Aniruddhan, Shahriar Mirabbasi, Sudip Shekhar:
A Compact, Voltage-Mode Type-I PLL With Gain-Boosted Saturated PFD and Synchronous Peak Tracking Loop Filter. 43-53 - Deyan Levski, Martin Wäny, Bhaskar Choubey:
A 1-µs Ramp Time 12-bit Column-Parallel Flash TDC-Interpolated Single-Slope ADC With Digital Delay-Element Calibration. 54-67 - Longqiang Lai, Xueqing Li, Yushen Fu, Yongpan Liu, Huazhong Yang:
Demystifying and Mitigating Code-Dependent Switching Distortions in Current-Steering DACs. 68-81 - Cheng Li, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins:
Analysis of Reference Error in High-Speed SAR ADCs With Capacitive DAC. 82-93 - Spyridon Vlassis, Fabian Khateb, George Souliotis:
An On-Chip Linear, Squaring, Cubic and Exponential Analog Function Generator. 94-104 - David E. Bellasi, Marco Crescentini, Domenico Cristaudo, Aldo Romani, Marco Tartagni, Luca Benini:
A Broadband Multi-Mode Compressive Sensing Current Sensor SoC in 0.16 µm CMOS. 105-118 - Jian Liu, Xiu Yin Zhang, Quan Xue:
Dual-Band Transmission-Line Resistance Compression Network and Its Application to Rectifiers. 119-132 - Alireza Asoodeh, Shahriar Mirabbasi:
On the Design of nth-Order Polyphase All-Pass Filters. 133-146 - Kazuki Kishida, Tadashi Maeda:
Simple, Analytical Expressions of an Effect of Local Signal Imperfections on Four-Phase Passive-Mixer-Based Bandpass Filter. 147-160 - Charley Wilson, Brian A. Floyd:
Harmonic Performance of Mixer-First Receivers With Circulant-Symmetric Basebands. 161-174 - Thomas Charisoulis, Collin Reiman, Douglas Frey, Miltiadis K. Hatalis:
Current Feedback Compensation Circuit for 2T1C LED Displays: Analysis and Evaluation. 175-188 - Honglan Jiang, Cong Liu, Fabrizio Lombardi, Jie Han:
Low-Power Approximate Unsigned Multipliers With Configurable Error Recovery. 189-202 - Chiou-Yng Lee, Jiafeng Xie:
Digit-Serial Versatile Multiplier Based on a Novel Block Recombination of the Modified Overlap-Free Karatsuba Algorithm. 203-214 - Guanda Wang, Yue Zhang, Beibei Zhang, Bi Wu, Jiang Nan, Xueying Zhang, Zhizhong Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Zhaohao Wang, Youguang Zhang, Weisheng Zhao:
Ultra-Dense Ring-Shaped Racetrack Memory Cache Design. 215-225 - Xiaoqing Zhao, Hongbin Sun, Longjun Liu, Yang Yang, Liangliang Dai, Xiulong Wu, Ruizhi Zhang, Jianxiao Wang, Nanning Zheng:
Architectural Exploration to Address the Reliability Challenges for ReRAM-Based Buffer in SSD. 226-238 - Hao Cai, You Wang, Lirida Alves de Barros Naviner, Xinning Liu, Weiwei Shan, Jun Yang, Weisheng Zhao:
Addressing Failure and Aging Degradation in MRAM/MeRAM-on-FDSOI Integration. 239-250 - Riadul Islam, Matthew R. Guthaus:
HCDN: Hybrid-Mode Clock Distribution Networks. 251-262 - Xuan Hu, Michael J. Schultis, Matthew Kramer, Archit Bagla, Akshay Shetty, Joseph S. Friedman:
Overhead Requirements for Stateful Memristor Logic. 263-273 - Ali Jafari, Ashwinkumar Ganesan, Chetan Sai Kumar Thalisetty, Varun Sivasubramanian, Tim Oates, Tinoosh Mohsenin:
SensorNet: A Scalable and Low-Power Deep Convolutional Neural Network for Multimodal Data Classification. 274-287 - Yizhi Wang, Jun Lin, Zhongfeng Wang:
FPAP: A Folded Architecture for Energy-Quality Scalable Convolutional Neural Networks. 288-301 - Rana A. Abdelaal, Hasan Erdem Yantir, Ahmed M. Eltawil, Fadi J. Kurdahi:
Power Performance Tradeoffs Using Adaptive Bit Width Adjustments on Resistive Associative Processors. 302-312 - Honglan Jiang, Leibo Liu, Pieter P. Jonker, Duncan G. Elliott, Fabrizio Lombardi, Jie Han:
A High-Performance and Energy-Efficient FIR Adaptive Filter Using Approximate Distributed Arithmetic Circuits. 313-326 - Masoud Pashaeifar, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram:
A Theoretical Framework for Quality Estimation and Optimization of DSP Applications Using Low-Power Approximate Adders. 327-340 - Hai-Sheng Li, Ping Fan, Haiying Xia, Huiling Peng, Shuxiang Song:
Quantum Implementation Circuits of Quantum Signal Representation and Type Conversion. 341-354 - Brian Hong, Ali Hajimiri:
A Phasor-Based Analysis of Sinusoidal Injection Locking in LC and Ring Oscillators. 355-368 - Guoyong Shi:
Symbolic Distortion Analysis of Multistage Amplifiers. 369-382 - Federico Bizzarri, Angelo Maurizio Brambilla, Lorenzo Codecasa:
Shooting by a Two-Step Galerkin Method. 383-390 - Hangli Ren, Guangdeng Zong, Hamid Reza Karimi:
Asynchronous Finite-Time Filtering of Networked Switched Systems and its Application: an Event-Driven Method. 391-402 - Khoa Le, Fakhreddine Ghaffari, Lounis Kessal, David Declercq, Emmanuel Boutillon, Chris Winstead, Bane Vasic:
A Probabilistic Parallel Bit-Flipping Decoder for Low-Density Parity-Check Codes. 403-416 - Yangxurui Liu, Liang Liu, Ove Edfors, Viktor Öwall:
An Area-Efficient On-Chip Memory System for Massive MIMO Using Channel Data Compression. 417-427 - Ze-kun Zhou, Yue Shi, Yao Wang, Nie Li, Zhiping Xiao, Yunkun Wang, Xiaolin Liu, Zhuo Wang, Bo Zhang:
A Resistorless High-Precision Compensated CMOS Bandgap Voltage Reference. 428-437 - Lin Cong, Jin Liu, Hoi Lee:
A High-Efficiency Low-Profile Zero-Voltage Transition Synchronous Non-Inverting Buck-Boost Converter With Auxiliary-Component Sharing. 438-449
Volume 66-I, Number 2, February 2019
- Francesco Chicco, Alessandro Pezzotta, Christian C. Enz:
Charge-Based Distortion Analysis of Nanoscale MOSFETs. 453-462 - Ricardo Riaza:
Circuit Theory in Projective Space and Homogeneous Circuit Models. 463-476 - Wei Mao, Yongfu Li, Chun-Huat Heng, Yong Lian:
A Low Power 12-bit 1-kS/s SAR ADC for Biomedical Signal Processing. 477-488 - Dezhi Xing, Yan Zhu, Chi-Hang Chan, Franco Maloberti, Seng-Pan U, Rui Paulo Martins:
Design of a High-Speed Time-Interleaved Sub-Ranging SAR ADC With Optimal Code Transfer Technique. 489-501 - You Li, Degang Chen:
Low-Cost, High-Precision DAC Design Based on Ordered Element Matching. 502-512 - Fabian Khateb, Tomasz Kulej:
Design and Implementation of a 0.3-V Differential Difference Amplifier. 513-523 - Pekka Keränen, Juha Kostamovaara:
256 × TDC Array With Cyclic Interpolators Based on Calibration-Free 2× Time Amplifier. 524-533 - Huan Hu, Tanzila Islam, Alla Kostyukova, Su Ha, Subhanshu Gupta:
From Battery Enabled to Natural Harvesting: Enzymatic BioFuel Cell Assisted Integrated Analog Front-End in 130nm CMOS for Long-Term Monitoring. 534-545 - Sinyoung Kim, Kuduck Kwon:
A 50-MHz-1-GHz 2.3-dB NF Noise-Cancelling Balun-LNA Employing a Modified Current-Bleeding Technique and Balanced Loads. 546-554 - Shunli Ma, Hao Yu, Qun Jane Gu, Junyan Ren:
A 5-10-Gb/s 12.5-mW Source Synchronous I/O Interface With 3-D Flip Chip Package. 555-568 - Yingying Wang, Jifu Liang, Suranga Handagala, Arjuna Madanayake, Soumyajit Mandal:
ΔΣ Noise-Shaping in 2-D Space-Time for Wideband Antenna Array Receivers. 569-582 - Hyunuk Kang, Hwiseob Lee, Wooseok Lee, Hansik Oh, Wonseob Lim, Hyungmo Koo, Cheon-Seok Park, Keum-Cheol Hwang, Kang-Yoon Lee, Youngoo Yang:
Octave Bandwidth Doherty Power Amplifier Using Multiple Resonance Circuit for the Peaking Amplifier. 583-593 - Matthew A. Morgan, Wavley M. Groves, Tod A. Boyd:
Reflectionless Filter Topologies Supporting Arbitrary Low-Pass Ladder Prototypes. 594-604 - Cheol Kim, Sung-Gi Ahn, Jisu Min, Kee-Won Kwon:
Power Efficient and Reliable Nonvolatile TCAM With Hi-PFO and Semi-Complementary Driver. 605-615 - Manami Suzuki, Rei Ueno, Naofumi Homma, Takafumi Aoki:
Efficient Fuzzy Extractors Based on Ternary Debiasing Method for Biased Physically Unclonable Functions. 616-629 - Mohd. Tasleem Khan, Shaik Rafi Ahamed:
Optimal Complexity Architectures for Pipelined Distributed Arithmetic-Based LMS Adaptive Filter. 630-642 - Edouard Giacomin, Tzofnat Greenberg-Toledo, Shahar Kvatinsky, Pierre-Emmanuel Gaillardon:
A Robust Digital RRAM-Based Convolutional Block for Low-Power Image Processing and Learning Applications. 643-654 - Jinpeng Song, Shulin Tian, Yu Hen Hu:
Analysis and Correction of Combined Channel Mismatch Effects in Frequency-Interleaved ADCs. 655-668 - Temesghen Tekeste, Hani H. Saleh, Baker Mohammad, Mohammed Ismail:
Ultra-Low Power QRS Detection and ECG Compression Architecture for IoT Healthcare Devices. 669-679 - Guilherme Paim, Leandro Mateus Giacomini Rocha, Gustavo Madeira Santana, Leonardo Bandeira Soares, Eduardo Antonio Cesar da Costa, Sergio Bampi:
Power-, Area-, and Compression-Efficient Eight-Point Approximate 2-D Discrete Tchebichef Transform Hardware Design Combining Truncation Pruning and Efficient Transposition Buffers. 680-693 - Alberto Bernardini, Kurt James Werner, Julius Orion Smith III, Augusto Sarti:
Generalized Wave Digital Filter Realizations of Arbitrary Reciprocal Connection Networks. 694-707 - Xiaozhen Liu, Jin Sha, Hongxiang Xie, Feifei Gao, Shi Jin, Zaichen Zhang, Xiaohu You, Chuan Zhang:
Efficient Channel Estimator With Angle-Division Multiple Access. 708-718 - Olga Krestinskaya, Khaled Nabil Salama, Alex Pappachen James:
Learning in Memristive Neural Network Architectures Using Analog Backpropagation Circuits. 719-732 - Li Tang, Jun Zhao:
Switched Threshold-Based Fault Detection for Switched Nonlinear Systems With Its Application to Chua's Circuit System. 733-741 - Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik:
A Combined Arithmetic-High-Level Synthesis Solution to Deploy Partial Carry-Save Radix-8 Booth Multipliers in Datapaths. 742-755 - Jong Beom Park, William Rhett Davis, Paul D. Franzon:
3-D-DATE: A Circuit-Level Three-Dimensional DRAM Area, Timing, and Energy Model. 756-768 - Farid Kenarangi, Inna Partin-Vaisband:
Exploiting Machine Learning Against On-Chip Power Analysis Attacks: Tradeoffs and Design Considerations. 769-781 - Muhammad Saeed Aslam, Peng Shi, Cheng-Chew Lim:
Variable Threshold-Based Selective Updating Algorithms in Feed-Forward Active Noise Control Systems. 782-795 - Di Zhang, Qingling Zhang:
Reduced-Order Observer-Based Sliding Mode Control for Singular Markovian Jump System With Time-Varying Transition Rate. 796-809 - Li-Heng Chen, Yuxin Zhao, Shasha Fu, Ming Liu, Jianbin Qiu:
Fault Estimation Observer Design for Descriptor Switched Systems With Actuator and Sensor Failures. 810-819 - Huizhen Jenny Qian, Bo Zhang, Xun Luo:
High-Resolution Wideband Phase Shifter With Current Limited Vector-Sum. 820-833 - Sheikh Nijam Ali, Pawan Agarwal, Srinivasan Gopal, Shahriar Mirabbasi, Deukhyoun Heo:
A 25-35 GHz Neutralized Continuous Class-F CMOS Power Amplifier for 5G Mobile Communications Achieving 26% Modulation PAE at 1.5 Gb/s and 46.4% Peak PAE. 834-847 - Steve Blandino, Giovanni Mangraviti, Claude Desset, André Bourdoux, Piet Wambacq, Sofie Pollin:
Multi-User Hybrid MIMO at 60 GHz Using 16-Antenna Transmitters. 848-858 - Adrián Pérez-Resa, Miguel Garcia-Bosque, Carlos Sánchez-Azqueta, Santiago Celma:
Chaotic Encryption for 10-Gb Ethernet Optical Links. 859-868 - Cédric Marchand, Emmanuel Boutillon, Hassan Harb, Laura Conde-Canencia, Ali Al Ghouwayel:
Hybrid Check Node Architectures for NB-LDPC Decoders. 869-880
Volume 66-I, Number 3, March 2019
- Mohammed Abdulaziz, Eric A. M. Klumperink, Bram Nauta, Henrik Sjöland:
Improving Receiver Close-In Blocker Tolerance by Baseband Gm-C Notch Filtering. 885-896 - Congyin Shi, Edgar Sánchez-Sinencio:
An On-Chip Built-in Linearity Estimation Methodology and Hardware Implementation. 897-908 - Minglei Zhang, Qingsong Cai, Zhong Yang, Xiaoyun Jia, Xiaohua Fan:
A 1-MHz-Bandwidth Gm-C-Based Quadrature Bandpass Sigma-Delta Modulator Achieving -153.7-dBFS/Hz NSD With Background Calibration. 909-919 - Fernando Cardes, Victor Medina, Susana Patón, Luis Hernández:
Clock Jitter Analysis of Continuous-Time ΣΔ Modulators Based on a Relative Time-Base Projection. 920-929 - Fei Wang, Albert J. P. Theuwissen:
Pixel Optimizations and Digital Calibration Methods of a CMOS Image Sensor Targeting High Linearity. 930-940 - Xin Fan, Jan Stuijt, Bo Liu, Tobias Gemmeke:
Synthesizable Memory Arrays Based on Logic Gates for Subthreshold Operation in IoT. 941-954 - Lawrence T. Clark, Sai Bharadwaj Medapuram, Divya Kiran Kadiyala, John S. Brunhaver:
Physically Unclonable Functions Using Foundry SRAM Cells. 955-966 - Jianwei Jiang, Yiran Xu, Wenyi Zhu, Jun Xiao, Shichang Zou:
Quadruple Cross-Coupled Latch-Based 10T and 12T SRAM Bit-Cell Designs for Highly Reliable Terrestrial Applications. 967-977 - Shourya Gupta, Kirti Gupta, Benton H. Calhoun, Neeta Pandey:
Low-Power Near-Threshold 10T SRAM Bit Cells With Enhanced Data-Independent Read Port Leakage for Array Augmentation in 32-nm CMOS. 978-988 - Amit Kumar Panda, Kailash Chandra Ray:
Modified Dual-CLCG Method and its VLSI Architecture for Pseudorandom Bit Generation. 989-1002 - Jinnan Ding, Shuguo Li, Zhen Gu:
High-Speed ECC Processor Over NIST Prime Fields Applied With Toom-Cook Multiplication. 1003-1016 - Sharvil Patil, Suhas Gundu Rao, Yu Chen, Yannis P. Tsividis:
Signal Encoding and Processing in Continuous Time Using a Cascade of Digital Delays. 1017-1030 - Han Le Duc, Bruno Feuvrie, Matthieu Pastore, Yide Wang:
An Adaptive Cascaded ILA- and DLA-Based Digital Predistorter for Linearizing an RF Power Amplifier. 1031-1041 - Basant K. Mohanty, Pramod Kumar Meher:
Area-Delay-Energy Efficient VLSI Architecture for Scalable In-Place Computation of FFT on Real Data. 1042-1050 - Sheng Zhang, Wei Xing Zheng:
Mean-Square Analysis of Multi-Sampled Multiband-Structured Subband Filtering Algorithm. 1051-1062 - Mohsin Aziz, Mehdi Vejdani Amiri, Mohamed Helaoui, Fadhel M. Ghannouchi:
Statistics-Based Approach for Blind Post-Compensation of Modulator's Imperfections and Power Amplifier Nonlinearity. 1063-1075 - Yiming Sun, Jinyong Yu, Zhengchao Li:
Event-Triggered Finite-Time Robust Filtering for a Class of State-Dependent Uncertain Systems With Network Transmission Delay. 1076-1089 - Krishnaiyan Thulasiraman, Mamta Yadav, Kshirasagar Naik:
Network Science Meets Circuit Theory: Resistance Distance, Kirchhoff Index, and Foster's Theorems With Generalizations and Unification. 1090-1103 - Giovanni De Luca, Pascal Bolcato, Wil H. A. Schilders:
Proper Initial Solution to Start Periodic Steady-State-Based Methods. 1104-1115 - Lanlin Yu, Junlin Xiong:
H∞ Model Reduction for Interval Frequency Negative Imaginary Systems. 1116-1129 - Hao Shen, Yunzhe Men, Zheng-Guang Wu, Jinde Cao, Guoping Lu:
Network-Based Quantized Control for Fuzzy Singularly Perturbed Semi-Markov Jump Systems and its Application. 1130-1140 - Peijun Wang, Guanghui Wen, Xinghuo Yu, Wenwu Yu, Tingwen Huang:
Synchronization of Multi-Layer Networks: From Node-to-Node Synchronization to Complete Synchronization. 1141-1152 - Ahmed El Sayed, Amit Kumar Mishra, Abdelrahman H. Ahmed, Amir Hossein Masnadi Shirazi, Sang-Pil Woo, Yang-Seok Choi, Shahriar Mirabbasi, Sudip Shekhar:
A Hilbert Transform Equalizer Enabling 80 MHz RF Self-Interference Cancellation for Full-Duplex Receivers. 1153-1165 - Ajinkya Kale, Suchendranath Popuri, Michael Koeberle, Johannes Sturm, Vijaya Sankara Rao Pasupureddi:
A -40 dB EVM, 77 MHz Dual-Band Tunable Gain Sub-Sampling Receiver Front End in 65-nm CMOS. 1166-1179 - Mehmet Tamer Ozgun, Amr Abdelhamid, Hakan Dogan:
A Low Power Receiver Front-End Design With Tunable Notch Filter for TX Leakage and Blocker Suppression. 1180-1191 - Ashwin Ramachandran, Arun Natarajan, Tejasvi Anand:
Line Coding Techniques for Channel Equalization: Integrated Pulse-Width Modulation and Consecutive Digit Chopping. 1192-1204 - Yan-Tong Chen, Wei-Cheng Sun, Chung-Chao Cheng, Tsung-Lin Tsai, Yeong-Luh Ueng, Chia-Hsiang Yang:
An Integrated Message-Passing Detector and Decoder for Polar-Coded Massive MU-MIMO Systems. 1205-1218 - Yen-Chin Liao, Chien Lin, Hsie-Chia Chang, Shu Lin:
A (21150, 19050) GC-LDPC Decoder for NAND Flash Applications. 1219-1230 - Alak Majumder, Monalisa Das, Suraj Kumar Saw, Abir J. Mondal, Bidyut K. Bhattacharyya:
Variation Aware Design of 50-Gbit/s, 5.027-fJ/bit Serializer Using Latency Combined Mux-Dual Latch for Inter-Chip Communication. 1231-1244 - Sigang Ryu, Seuk Son, Jaeha Kim:
An Accurate and Noise-Resilient Spread-Spectrum Clock Tracking Aid for Digitally-Controlled Clock and Data Recovery Loops. 1245-1257 - Boyu Shen, Soumya Bose, Matthew L. Johnston:
Fully-Integrated Charge Pump Design Optimization for Above-Breakdown Biasing of Single-Photon Avalanche Diodes in 0.13-µm CMOS. 1258-1269 - Teruki Someya, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya:
A 0.90-4.39-V Detection Voltage Range, 56-Level Programmable Voltage Detector Using Fine Voltage-Step Subtraction for Battery Management. 1270-1279 - Dawei Liu, Simon J. Hollis, Bernard H. Stark:
A New Design Technique for Sub-Nanosecond Delay and 200 V/ns Power Supply Slew-Tolerant Floating Voltage Level Shifters for GaN SMPS. 1280-1290 - Luigi Costanzo, Alessandro Lo Schiavo, Massimo Vitelli:
Power Extracted From Piezoelectric Harvesters Driven by Non-Sinusoidal Vibrations. 1291-1303
Volume 66-I, Number 4, April 2019
- Michele Spasaro, Federico Alimenti, Domenico Zito:
The Theory of Special Noise Invariants. 1305-1318 - Luke Renaud, Joe Baylon, Srinivasan Gopal, Md. Aminul Hoque, Deukhyoun Heo:
Analysis of Systematic Losses in Hybrid Envelope Tracking Modulators. 1319-1330 - Tao He, Manjunath Kareppagoudr, Yi Zhang, Emanuel Caceres, Un-Ku Moon, Gabor C. Temes:
Noise Filtering and Linearization of Single-Ended Sampled-Data Circuits. 1331-1341 - Jiaxin Liu, Chen-Kai Hsu, Xiyuan Tang, Shaolan Li, Guangjun Wen, Nan Sun:
Error-Feedback Mismatch Error Shaping for High-Resolution Data Converters. 1342-1354 - Soheil Ziabakhsh, Ghyslain Gagnon, Gordon W. Roberts:
A Second-Order Bandpass $\Delta\Sigma$ Time-to-Digital Converter With Negative Time-Mode Feedback. 1355-1368 - Dries Vercaemer, Johan Raman, Pieter Rombouts:
Low-Pass Filtering SC-DAC for Reduced Jitter and Slewing Requirements on CTSDMs. 1369-1381