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ORCIDIEEE Transactions on Circuits and Systems I: Regular Papers, Volume 64
Volume 64-I, Number 1, January 2017
- Andreas Demosthenous
:
Update From the Editor-in-Chief. 1-2 - Sandipan Kundu, Subhanshu Gupta, David J. Allstot, Jeyanandh Paramesh:
Frequency-Channelized Mismatch-Shaped Quadrature Data Converters for Carrier Aggregation in MU-MIMO LTE-A. 3-13 - Jason Remple, Ian Galton:
The Effects of Inter-Symbol Interference in Dynamic Element Matching DACs. 14-23 - Charis Basetas, Thanasis Orfanos, Paul P. Sotiriadis:
A Class of 1-Bit Multi-Step Look-Ahead Σ-Δ Modulators. 24-37 - Miron Klosowski, Waldemar Jendernalik, Jacek Jakusz, Grzegorz Blakiewicz, Stanislaw Szczepanski:
A CMOS Pixel With Embedded ADC, Digital CDS and Gain Correction Capability for Massively Parallel Imaging Array. 38-49 - Hang Yu, Wei Tang, Menghan Guo, Shoushun Chen:
A Two-Step Prediction ADC Architecture for Integrated Low Power Image Sensors. 50-60 - Hugo Serra, Rui Santos-Tavares, Nuno Paulino:
A Numerical Methodology for the Analysis of Switched-Capacitor Filters Taking Into Account Non-Ideal Effects of Switches and Amplifiers. 61-71 - Chayan Bhawal, Debasattam Pal, Sandeep Kumar, Madhu N. Belur:
New Results and Techniques for Computation of Stored Energy in Lossless/All-Pass Systems. 72-85 - Brian Koziel, Reza Azarderakhsh, Mehran Mozaffari Kermani, David Jao:
Post-Quantum Cryptography on FPGA Based on Isogenies on Elliptic Curves. 86-99 - Mehrnaz Ahmadi, Bijan Alizadeh, Behjat Forouzandeh:
A Hybrid Time Borrowing Technique to Improve the Performance of Digital Circuits in the Presence of Variations. 100-110 - Ahmad A. Hiasat:
A Reverse Converter and Sign Detectors for an Extended RNS Five-Moduli Set. 111-121 - Wang Kang, Tingting Pang, Weifeng Lv, Weisheng Zhao:
Dynamic Dual-Reference Sensing Scheme for Deep Submicrometer STT-MRAM. 122-132 - Yao Liu, Ray C. C. Cheung, Hei Wong:
A Bias-Bounded Digital True Random Number Generator Architecture. 133-144 - Minhao Yang, Shih-Chii Liu, Tobi Delbrück:
Analysis of Encoding Degradation in Spiking Sensors Due to Spike Delay Variation. 145-155 - Jingook Kim:
Statistical Analysis for Pattern-Dependent Simultaneous Switching Outputs (SSO) of Parallel Single-Ended Buffers. 156-169 - (Withdrawn) Reliable Output Feedback Control of Discrete-Time Fuzzy Affine Systems With Actuator Faults. 170-181
- Behrooz Nakhkoob, Mona Mostafa Hella:
A 4.7-Gb/s Reconfigurable CMOS Imaging Optical Receiver Utilizing Adaptive Spectrum Balancing Equalizer. 182-194 - Debashis Banerjee, Barry John Muldrey, Xian Wang, Shreyas Sen, Abhijit Chatterjee:
Self-Learning RF Receiver Systems: Process Aware Real-Time Adaptation to Channel Conditions for Low Power Operation. 195-207 - Mehran Mozaffari Kermani, Vineeta Singh, Reza Azarderakhsh:
Reliable Low-Latency Viterbi Algorithm Architectures Benchmarked on ASIC and FPGA. 208-216 - Abhik Das, Yuan Gao, Tony Tae-Hyoung Kim:
A 220-mV Power-on-Reset Based Self-Starter With 2-nW Quiescent Power for Thermoelectric Energy Harvesting Systems. 217-226 - Armine Karami, Dimitri Galayko, Philippe Basset:
Series-Parallel Charge Pump Conditioning Circuits for Electrostatic Kinetic Energy Harvesting. 227-240
Volume 64-I, Number 2, February 2017
- Soheil Golara, Shervin Moloudi, Asad A. Abidi:
Processes of AM-PM Distortion in Large-Signal Single-FET Amplifiers. 245-260 - Zheng Wang, Payam Heydari:
A Study of Operating Condition and Design Methods to Achieve the Upper Limit of Power Gain in Amplifiers at Near-fmax Frequencies. 261-271 - Ahmed A. Abdelmoaty, Mohammad Al-Shyoukh, Ying-Chih Hsu, Ayman A. Fayed:
A MPPT Circuit With 25 µW Power Consumption and 99.7% Tracking Efficiency for PV Systems. 272-282 - Romesh Kumar Nandwana, Saurabh Saxena, Amr Elshazly, Kartikeya Mayaram, Pavan Kumar Hanumolu:
A 1-to-2048 Fully-Integrated Cascaded Digital Frequency Synthesizer for Low Frequency Reference Clocks Using Scrambling TDC. 283-295 - Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran:
Partial Dynamic Element Matching Technique for Digital-to-Analog Converters Used for Digital Harmonic-Cancelling Sine-Wave Synthesis. 296-309 - Hesham Omran, Abdulaziz Alhoshany, Hamzah Alahmadi, Khaled N. Salama:
A 33fJ/Step SAR Capacitance-to-Digital Converter Using a Chain of Inverter-Based Amplifiers. 310-321 - Dong-Jin Chang, Wan Kim, Min-Jae Seo, Hyeok-Ki Hong, Seung-Tak Ryu:
Normalized-Full-Scale-Referencing Digital-Domain Linearity Calibration for SAR ADC. 322-332 - Sotoudeh Hamedi-Hagh:
Introducing Suspendance Analysis. 333-346 - Essam S. Atalla, Frank Zhang, Poras T. Balsara, Abdellatif Bellaouar, Seydou Ba, Kamran Kiasaleh:
Time-Domain Analysis of Passive Mixer Impedance: A Switched-Capacitor Approach. 347-359 - Khawar Sarfraz, Mansun Chan:
A 1.2V-to-0.4V 3.2GHz-to-14.3MHz Power-Efficient 3-Port Register File in 65-nm CMOS. 360-372 - Lauren Guckert, Earl E. Swartzlander Jr.:
Optimized Memristor-Based Multipliers. 373-385 - Manish Kumar Jaiswal, Hayden Kwok-Hay So:
Area-Efficient Architecture for Dual-Mode Double Precision Floating Point Division. 386-398 - Pramod Kumar Meher, Xin Lou:
Low-Latency, Low-Area, and Scalable Systolic-Like Modular Multipliers for GF(2m) Based on Irreducible All-One Polynomials. 399-408 - Elisardo Antelo, Paolo Montuschi, Alberto Nannarelli:
Improved 64-bit Radix-16 Booth Multiplier Based on Partial Product Array Height Reduction. 409-418 - Ju-Hong Lee, Jiun-Shian Du:
Lattice Structure Realization for The Design of 2-D Digital Allpass Filters With General Causality. 419-431 - Federico Pepe, Pietro Andreani:
A General Theory of Phase Noise in Transconductor-Based Harmonic Oscillators. 432-445 - Yu-Cheng Tsai, Chiao-En Chen, Chia-Hsiang Yang:
A Flexible Geometric Mean Decomposition Processor for MIMO Communication Systems. 446-456 - Huang-Chang Lee, Mao-Ruei Li, Jyun-Kai Hu, Po-Chiao Chou, Yeong-Luh Ueng:
Optimization Techniques for the Efficient Implementation of High-Rate Layered QC-LDPC Decoders. 457-470 - Ali Asghar Razavi Haeri, Mohammadreza Ghaderi Karkani, Mohammad Sharifkhani, Mahmoud Kamarei, Ali Fotowat-Ahmady:
Analysis and Design of Power Harvesting Circuits for Ultra-Low Power Applications. 471-479 - Lenon Schmitz, Denizar Cruz Martins, Roberto Francisco Coelho:
Generalized High Step-Up DC-DC Boost-Based Converter With Gain Cell. 480-493 - Giuseppina Monti, Wenquan Che, Qinghua Wang, Alessandra Costanzo, Marco Dionigi, Franco Mastri, Mauro Mongiardo, Renzo Perfetti, Luciano Tarricone, Yumei Chang:
Wireless Power Transfer With Three-Ports Networks: Optimal Analytical Solutions. 494-503
Volume 64-I, Number 3, March 2017
- Jia Zhou, Tong Ge, Joseph S. Chang:
Printed Electronics: Effects of Bending and a Self-Compensation Means. 505-515 - Brandon Rumberg, David W. Graham, Mir Mohammad Navidi:
A Regulated Charge Pump for Tunneling Floating-Gate Transistors. 516-527 - Zhicong Luo, Ming-Dou Ker, Wan-Hsueh Cheng, Ting-Yang Yen:
Regulated Charge Pump With New Clocking Scheme for Smoothing the Charging Current in Low Voltage CMOS Process. 528-536 - Liao Wu, Xuan-Dien Do, Sang-Gug Lee, Dong Sam Ha:
A Self-Powered and Optimal SSHI Circuit Integrated With an Active Rectifier for Piezoelectric Energy Harvesting. 537-549 - Sami Kurtti, Jan Nissinen, Juha Kostamovaara:
A Wide Dynamic Range CMOS Laser Radar Receiver With a Time-Domain Walk Error Compensation Scheme. 550-561 - Jin-Yi Lin, Chih-Cheng Hsieh:
A 0.3 V 10-bit SAR ADC With First 2-bit Guess in 90-nm CMOS. 562-572 - Paolo Stefano Crovetti:
All-Digital High Resolution D/A Conversion by Dyadic Digital Pulse Modulation. 573-584 - Mohammad Saeed Sarafraz, Mohammad Saleh Tavazoei:
Passive Realization of Fractional-Order Impedances by a Fractional Element and RLC Components: Conditions and Procedure. 585-595 - Fang Su, Yongpan Liu, Yiqun Wang, Huazhong Yang:
A Ferroelectric Nonvolatile Processor with 46 $\mu $ s System-Level Wake-up Time and 14 $\mu $ s Sleep Time for Energy Harvesting Applications. 596-607 - Chun-Yi Liu, Meng-Siou Sie, Edmund Wen Jen Leong, Yu-Cheng Yao, Chih-Wei Jen, Wei-Chang Liu, Chih-Feng Wu, Shyh-Jye Jou:
Dual-Mode All-Digital Baseband Receiver With a Feed-Forward and Shared-Memory Architecture for Dual-Standard Over 60 GHz NLOS Channel. 608-618 - Wenbing Zhang, Yang Tang, Yurong Liu, Jürgen Kurths:
Event-Triggering Containment Control for a Class of Multi-Agent Networks With Fixed and Switching Topologies. 619-629 - Lei Yang, Bin Wu, Xiaobin Zhang, Keyue Ma Smedley, Guann-Pyng Li:
Dynamic Modeling and Analysis of Constant On Time Variable Frequency One-Cycle Control for Switched-Capacitor Converters. 630-641 - Liang Wu, Hiu Fai Leung, Alvin Li, Howard C. Luong:
A 4-Element 60-GHz CMOS Phased-Array Receiver With Beamforming Calibration. 642-652 - Yipeng Wang, Duona Luo, Quan Pan, Liwen Jing, Zhixin Li, C. Patrick Yue:
A 60-GHz 4-Gb/s Fully Integrated NRZ-to-QPSK Fiber-Wireless Modulator. 653-663 - Hyosup Won, Joon-Yeong Lee, Taehun Yoon, Kwangseok Han, Sangeun Lee, Jinho Park, Hyeon-Min Bae:
A 28-Gb/s Receiver With Self-contained Adaptive Equalization and Sampling Point Control Using Stochastic Sigma-Tracking Eye-Opening Monitor. 664-674 - Marcelo de Souza, André Augusto Mariano, Thierry Taris:
Reconfigurable Inductorless Wideband CMOS LNA for Wireless Communications. 675-685 - Anthony Goavec, Mykhailo Zarudniev, Remy Vauche, Frédéric Hameau, Jean Gaubert, Eric Mercier:
An Efficient Method of Power Spectral Density Estimation for On-Chip IR-UWB Transmitter Self-Calibration. 686-695 - Daniel Markert, Xin Yu, Holger Heimpel, Georg Fischer:
An All-Digital, Single-Bit RF Transmitter for Massive MIMO. 696-704 - Mohammad Alhawari, Baker Mohammad, Hani H. Saleh, Mohammed Ismail:
An Efficient Polarity Detection Technique for Thermoelectric Harvester in L-based Converters. 705-716 - Lin Cheng, Wing-Hung Ki, Fan Yang, Philip K. T. Mok, Xiaocheng Jing:
Predicting Subharmonic Oscillation of Voltage-Mode Switching Converters Using a Circuit-Oriented Geometrical Approach. 717-730 - Xiu Yin Zhang, Zhi-Xia Du, Quan Xue:
High-Efficiency Broadband Rectifier With Wide Ranges of Input Power and Output Load Based on Branch-Line Coupler. 731-739 - Xiao Liu, Aaron M. Cramer, Fei Pan:
Generalized Average Method for Time-Invariant Modeling of Inverters. 740-751
Volume 64-I, Number 4, April 2017
- Federico Butti, Massimo Piotto, Paolo Bruschi:
A Chopper Instrumentation Amplifier With Input Resistance Boosting by Means of Synchronous Dynamic Element Matching. 753-764 - Jonghoon Park, Changhyun Lee, Changkun Park:
A Quad-Band CMOS Linear Power Amplifier for EDGE Applications Using an Anti-Phase Method to Enhance its Linearity. 765-776 - Bradford L. Hunter, Wallace E. Matthews:
A ± 3 ppm/°C Single-Trim Switched Capacitor Bandgap Reference for Battery Monitoring Applications. 777-786 - Peter Luong, Carlos Christoffersen, Conrado Rossi-Aicardi, Carlos Dualibe:
Nanopower, Sub-1 V, CMOS Voltage References With Digitally-Trimmable Temperature Coefficients. 787-798 - Kuan Chuang Koay, Pak Kwong Chan:
A Low Energy-Noise 65nm CMOS Switched-Capacitor Resistive-Bridge Sensor Interface. 799-810 - Yen-Hsiang Tseng, Che-Wei Yeh, Shen-Iuan Liu:
A 2.25-2.7 GHz Area-Efficient Subharmonically Injection-Locked Fractional-N Frequency Synthesizer With a Fast-Converging Correlation Loop. 811-822 - Yong-Hun Kim, Taeho Lee, Hyun-Kyu Jeon, Dongil Lee, Lee-Sup Kim:
An Input Data and Power Noise Inducing Clock Jitter Tolerant Reference-Less Digital CDR for LCD Intra-Panel Interface. 823-835 - Mina Shahmohammadi, Masoud Babaie, Robert Bogdan Staszewski:
Tuning Range Extension of a Transformer-Based Oscillator Through Common-Mode Colpitts Resonance. 836-846 - Hao Cai, You Wang, Lirida Alves de Barros Naviner, Weisheng Zhao:
Robust Ultra-Low Power Non-Volatile Logic-in-Memory Circuits in FD-SOI Technology. 847-857 - Keng-Hao Yang, Hsiang-Jen Tsai, Chia-Yin Li, Paul Jendra, Meng-Fan Chang, Tien-Fu Chen:
eTag: Tag-Comparison in Memory to Achieve Direct Data Access based on eDRAM to Improve Energy Efficiency of DRAM Cache. 858-868 - Luiz Alberto Pasini Melek, Anselmo Luis da Silva, Márcio Cherem Schneider, Carlos Galup-Montoro:
Analysis and Design of the Classical CMOS Schmitt Trigger in Subthreshold Operation. 869-878 - Vladimir Trujillo-Olaya, Jaime Velasco-Medina:
Half-Matrix Normal Basis Multiplier Over GF(pm). 879-891 - Baozhou Zhu, Yuanwu Lei, Yuanxi Peng, Tingting He:
Low Latency and Low Error Floating-Point Sine/Cosine Function Based TCORDIC Algorithm. 892-905 - Khoa Le, Fakhreddine Ghaffari, David Declercq, Bane Vasic:
Efficient Hardware Implementation of Probabilistic Gradient Descent Bit-Flipping. 906-917 - Shuichi Ohno, M. Rizwan Tariq:
Optimization of Noise Shaping Filter for Quantizer With Error Feedback. 918-930 - Giovanni De Luca, Pascal Bolcato, Remi Larcheveque, Joost Rommes, Wil H. A. Schilders:
Fast and Accurate Time-Domain Simulations of Integer-N PLLs. 931-944 - Yanling Wei, Jianbin Qiu, Peng Shi, Mohammed Chadli:
Fixed-Order Piecewise-Affine Output Feedback Controller for Fuzzy-Affine-Model-Based Nonlinear Systems With Time-Varying Delay. 945-958 - Wun-Jian Su, Shen-Iuan Liu:
A 5 Gb/s Voltage-Mode Transmitter Using Adaptive Time-Based De-Emphasis. 959-968 - Xican Chen, Yiyu Shen, Zhicheng Wang, Woogeun Rhee, Zhihua Wang:
A 17 mW 3-to-5 GHz Duty-Cycled Vital Sign Detection Radar Transceiver With Frequency Hopping and Time-Domain Oversampling. 969-980 - Gilbert Matig-a, Mehmet R. Yuce, Jean-Michel Redoute:
Design of a CML Transceiver With Self-Immunity to EMI in 0.18-µm CMOS. 981-991 - Amin Khalili Moghaddam, Joon Huang Chuah, Harikrishnan Ramiah, Jalil Ahmadian, Pui-In Mak, Rui Paulo Martins:
A 73.9%-Efficiency CMOS Rectifier Using a Lower DC Feeding (LDCF) Self-Body-Biasing Technique for Far-Field RF Energy-Harvesting Systems. 992-1002 - Shang-Hsien Yang, Tsung-Hsun Tsai, Hsin Chen, Chao-Chang Chiu, Ke-Horng Chen, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai:
High Accuracy Knee Voltage Detection for Primary-Side Control in Flyback Battery Charger. 1003-1012
Volume 64-I, Number 5, May 2017
- Pedro M. Julian, Lisandro Lovisolo:
Guest Editorial Special Section on the 2016 IEEE Latin American Symposium on Circuits and Systems (LASCAS 2016). 1017-1018 - Benjamín T. Reyes, Raul M. Sanchez, Ariel L. Pola, Mario R. Hueda:
Design and Experimental Evaluation of a Time-Interleaved ADC Calibration Algorithm for Application in High-Speed Communication Systems. 1019-1030 - Piotr Patronik, Stanislaw J. Piestrak:
Hardware/Software Approach to Designing Low-Power RNS-Enhanced Arithmetic Units. 1031-1039 - Ettore Napoli, Gerardo Castellano, Davide De Caro, Darjn Esposito, Nicola Petra, Antonio Giuseppe Maria Strollo:
Single Bit Filtering Circuit Implemented in a System for the Generation of Colored Noise. 1040-1050 - Gordana Jovanovic-Dolecek, Ricardo Garcia Baez, Massimiliano Laddomada:
Design of Efficient Multiplierless Modified Cosine-Based Comb Decimation Filters: Analysis and Implementation. 1051-1063 - Felipe Tuyama De Faria Barbosa, Duarte Lopes de Oliveira, Tiago S. Curtinhas, Lester de Abreu Faria, Jocemar Francisco De Souza Luciano:
Implementation of Locally-Clocked XBM State Machines on FPGAs Using Synchronous CAD Tools. 1064-1074 - Ugur Sonmez, Fabio Sebastiano, Kofi A. A. Makinwa:
Analysis and Design of VCO-Based Phase-Domain ΣΔ Modulators. 1075-1084 - Chan-Hsiang Weng, Yung-Yu Lin, Tsung-Hsien Lin:
A 1-V 5-MHz Bandwidth 68.3-dB SNDR Continuous-Time Delta-Sigma Modulator With a Feedback-Assisted Quantizer. 1085-1093 - Yao-Hong Liu, Johan H. C. van den Heuvel, Takashi Kuramochi, Benjamin Busze, Paul Mateman, Vamshi Krishna Chillara, Bindi Wang, Robert Bogdan Staszewski, Kathleen Philips:
An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS. 1094-1105 - Chih-Min Chang, Jieh-Tsorng Wu:
A 95-dBA DR Digital Audio Class-D Amplifier Using a Calibrated Digital-to-Pulse Converter. 1106-1117 - Pydi Ganga Bahubalindruni, Vítor Grade Tavares, Rodrigo Martins, Elvira Fortunato, Pedro Barquinha:
A Low-Power Analog Adder and Driver Using a-IGZO TFTs. 1118-1125 - Mustafa Ozen, Mark P. van der Heijden, Mustafa Acar, Rik Jos, Christian Fager:
A Generalized Combiner Synthesis Technique for Class-E Outphasing Transmitters. 1126-1139 - Manh Duy Luong, Ryo Ishikawa, Yoichiro Takayama, Kazuhiko Honjo:
Microwave Characteristics of an Independently Biased 3-Stack InGaP/GaAs HBT Configuration. 1140-1151 - Ettore Lorenzo Firrao, Anne-Johan Annema, Frank E. van Vliet, Bram Nauta:
Hardware Implementation Overhead of Switchable Matching Networks. 1152-1163 - Esmaeel Maghsoudloo, Masoud Rezaei, Mohamad Sawan, Benoit Gosselin:
A High-Speed and Ultra Low-Power Subthreshold Signal Level Shifter. 1164-1172 - Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon:
Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure. 1173-1186 - Davide De Caro, Ettore Napoli, Darjn Esposito, Gerardo Castellano, Nicola Petra, Antonio G. M. Strollo:
Minimizing Coefficients Wordlength for Piecewise-Polynomial Hardware Function Evaluation With Exact or Faithful Rounding. 1187-1200 - Mauro Mangia, Fabio Pareschi, Valerio Cambareri, Riccardo Rovatti, Gianluca Setti:
Rakeness-Based Design of Low-Complexity Compressed Sensing. 1201-1213 - Chien-Cheng Tseng, Su-Ling Lee:
Fractional Hilbert Transform Sampling Method and Its Filter Bank Reconstruction. 1214-1224 - Antonio Buonomo, Alessandro Lo Schiavo:
A Study of Injection Locking in Dual-Band CMOS Frequency Dividers. 1225-1234 - Rongrong Qian, Zhisheng Duan, Yuan Qi:
Stability of Power Control in Multiple Coexisting Wireless Networks: ℒ2 Small-Gain Perspective. 1235-1246 - Hong Zhang, Shrirang Abhyankar, Emil M. Constantinescu, Mihai Anitescu:
Discrete Adjoint Sensitivity Analysis of Hybrid Dynamical Systems With Switching. 1247-1259 - Alexis Lopez-Riera, Francisco del Águìla López, Pere Palà-Schönwälder, Jordi Bonet-Dalmau, M. Rosa Giralt-Mas, F. Xavier Moncunill-Geniz:
Joint Symbol and Chip Synchronization for a Burst-Mode-Communication Superregenerative MSK Receiver. 1260-1269 - Krishna T. Settaluri, Christopher Lalau-Keraly, Eli Yablonovitch, Vladimir Stojanovic:
First Principles Optimization of Opto-Electronic Communication Links. 1270-1283
Volume 64-I, Number 6, June 2017
- Yo-Sheng Lin, Van Kien Nguyen:
94-GHz CMOS Power Amplifiers Using Miniature Dual Y-Shaped Combiner With RL Load. 1285-1298 - Zhiqiang Huang, Howard Cam Luong:
Design and Analysis of Millimeter-Wave Digitally Controlled Oscillators With C-2C Exponentially Scaling Switched-Capacitor Ladder. 1299-1307 - Hou-Ming Chen, Chang-Chi Lee, Shih-Han Jheng, Wei-Chih Chen, Bo-Yi Lee:
A Sub-1 ppm/°C Precision Bandgap Reference With Adjusted-Temperature-Curvature Compensation. 1308-1317