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ORCIDIEEE Journal of Solid-State Circuits, Volume 59
Volume 59, Number 1, January 2024
- Dennis Sylvester
:
New Associate Editor. 3 - Mike Shuo-Wei Chen, Visvesh S. Sathe, Massimo Alioto, Jae-Sun Seo, Hidehiro Shiga:
Guest Editorial Introduction to the Special Section on the 2023 IEEE International Solid-State Circuits Conference (ISSCC). 4-7 - Bo Zhang, Anand Vasani, Ashutosh Sinha, Alireza Nilchi, Haitao Tong, Lakshmi P. Rao, Karapet Khanoyan, Hamid Hatamkhani, Xiaochen Yang, Xin Meng, Alexander Wong, Jun Kim, Ping Jing, Yehui Sun, Ali Nazemi, Dean Liu, Anthony Brewster, Jun Cao, Afshin Momtaz:
A 112-Gb/s Serial Link Transceiver With Three-Tap FFE and 18-Tap DFE Receiver for up to 43-dB Insertion Loss Channel in 7-nm FinFET Technology. 8-18 - Bingyi Ye, Guangdong Wu, Weixin Gai, Kai Sheng, Yandong He:
A Five-Tap Delay-Line-Based Feed-Forward-Equalizer for 200-Gb/s Wireline Receiver in 28-nm CMOS. 19-28 - Heejin Yang, Ji-Hwan Seol, Rohit Rothe, Zichen Fan, Qirui Zhang, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester:
A 1.5-μW Fully-Integrated Keyword Spotting SoC in 28-nm CMOS With Skip-RNN and Fast-Settling Analog Frontend for Adaptive Frame Skipping. 29-39 - Qiaochu Zhang, Hsiang-Chun Cheng, Shiyu Su, Mike Shuo-Wei Chen:
Fractional-N Digital MDLL With Injection-Error Scrambling and Calibration. 40-51 - Ashwin Sanjay Lele, Muya Chang, Samuel D. Spetalnick, Brian Crafton, Shota Konno, Zishen Wan, Ashwin Bhat, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury:
A Heterogeneous RRAM In-Memory and SRAM Near-Memory SoC for Fused Frame and Event-Based Target Identification and Tracking. 52-64 - Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Jongjun Park, Hoi-Jun Yoo:
MetaVRain: A Mobile Neural 3-D Rendering Processor With Bundle-Frame-Familiarity-Based NeRF Acceleration and Hybrid DNN Computing. 65-78 - Raghavan Kumar, Avinash L. Varna, Carlos Tokunaga, Sachin Taneja, Vivek De, Sanu K. Mathew:
A 100-Gbps Fault-Injection Attack-Resistant AES-256 Engine With 99.1%-99.99% Error Coverage in Intel 4 CMOS. 79-89 - Fengbin Tu, Zihan Wu, Yiqi Wang, Weiwei Wu, Leibo Liu, Yang Hu, Shaojun Wei, Shouyi Yin:
MulTCIM: Digital Computing-in-Memory-Based Multimodal Transformer Accelerator With Attention-Token-Bit Hybrid Sparsity. 90-101 - Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Juhyoung Lee, Sangyeob Kim, Donghyeon Han, Hoi-Jun Yoo:
DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell. 102-115 - Hung-Hsi Hsu, Tai-Hao Wen, Wei-Hsing Huang, Win-San Khwa, Yun-Chen Lo, Chuan-Jia Jhang, Yu-Hsiang Chin, Yu-Chiao Chen, Chung-Chuan Lo, Ren-Shuo Liu, Kea-Tiong Tang, Chih-Cheng Hsieh, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang:
A Nonvolatile AI-Edge Processor With SLC-MLC Hybrid ReRAM Compute-in-Memory Macro Using Current-Voltage-Hybrid Readout Scheme. 116-127 - Francesco Conti, Gianna Paulin, Angelo Garofalo, Davide Rossi, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Luca Benini:
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2-8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing. 128-142 - Seunghyun Moon, Han-Gyeol Mun, Hyunwoo Son, Jae-Yoon Sim:
Multipurpose Deep-Learning Accelerator for Arbitrary Quantization With Reduction of Storage, Logic, and Latency Waste. 143-156 - Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Jiwon Choi, Hoi-Jun Yoo:
C-DNN: An Energy-Efficient Complementary Deep-Neural-Network Processor With Heterogeneous CNN/SNN Core Architecture. 157-172 - Jooyoung Bae, Wonsik Oh, Jahyun Koo, Chengshuo Yu, Bongjin Kim:
CTLE-Ising: A Continuous-Time Latch-Based Ising Machine Featuring One-Shot Fully Parallel Spin Updates and Equalization of Spin States. 173-183 - Jahoon Jin, Soo-Min Lee, Kyunghwan Min, Sodam Ju, Jihoon Lim, Jisu Yook, Jihoon Lee, Hyunsu Chae, Kwonwoo Kang, Yunji Hong, Yeongcheol Jeong, Sungsik Park, Sang-Ho Kim, Jongwoo Lee, Joonsuk Kim, Sung-Ung Kwak:
A 4-nm 16-Gb/s/pin Single-Ended PAM-4 Parallel Transceiver With Switching-Jitter Compensation and Transmitter Optimization. 184-195 - Ping-Chun Wu, Jian-Wei Su, Li-Yang Hong, Jin-Sheng Ren, Chih-Han Chien, Ho-Yu Chen, Chao-En Ke, Hsu-Ming Hsiao, Sih-Han Li, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang:
A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced AI Edge Chips. 196-207 - Qiqiao Wu, Yue Cao, Qing Luo, Haijun Jiang, Zhongze Han, Yongkang Han, Chunmeng Dou, Hangbing Lv, Qi Liu, Jianguo Yang, Ming Liu:
A 9-Mb HZO-Based Embedded FeRAM With 10-Cycle Endurance and 5/7-ns Read/Write Using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier. 208-218 - De-Qi You, Yen-Cheng Chiu, Win-San Khwa, Chung-Yuan Li, Fang-Ling Hsieh, Yu-An Chien, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang:
An 8b-Precision 8-Mb STT-MRAM Near-Memory-Compute Macro Using Weight-Feature and Input-Sparsity Aware Schemes for Energy-Efficient Edge AI Devices. 219-230 - Kwanyeob Chae, Jaegeun Song, Yoonjae Choi, Jiyeon Park, Billy Koo, Jihun Oh, Shinyoung Yi, Won Lee, Dongha Kim, Kyeongkeun Kang, Eunsu Kim, Juyoung Kim, Sanghune Park, Sungcheol Park, Mijung Noh, Hyo-Gyuem Rhew, Jongshin Shin:
A 4-nm 1.15 TB/s HBM3 Interface With Resistor-Tuned Offset Calibration and In Situ Margin Detection. 231-242 - Lili Chen, Andreia Cathelin, Ehsan Afshari:
A High-Efficiency High-Power 170-176-GHz Frequency Stabilized Quadrature Radiator. 243-252 - Ziyi Lin, Haikun Jia, Ruichang Ma, Wei Deng, Zhihua Wang, Baoyong Chi:
A Low-Phase-Noise VCO With Common-Mode Resonance Expansion and Intrinsic Differential 2nd-Harmonic Output Based on a Single Three-Coil Transformer. 253-267 - Shanthi Pavan, Saravana Manivannan, Nishanth Basavaraj:
Analysis and Design of Wideband Filtering ADCs Using Continuous-Time Pipelining. 268-281 - Xiaoyu Guo, Hongge Li, Yuhao Chen:
A 3.58 nJ/Node Dual Cross Correlation Analog-Front-End Circuit With ADC for Mutual Capacitive Panel. 282-293 - Agata Iesurum, Davide Manente, Fabio Padovan, Matteo Bassi, Andrea Bevilacqua:
Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs. 294-306 - Seyed Mojtaba Sadati Faramarzi, Bin Luo, Jef Poortmans, Jan Genoe, Kris Myny:
Thin-Film Transistor-Based Sensor Interface Circuits Enabling Distributed Local In-Module Solar Cell Temperature Monitoring. 307-315
Volume 59, Number 2, February 2024
- Dennis Sylvester:
New Associate Editor. 319 - Christian Elgaard, Mustafa Özen, Eric Westesson, Ahmed Mahmoud, Florent Torres, Shakila Bint Reyaz, Therese Forsberg, Rehman Akbar, Hans Hagberg, Henrik Sjöland:
Efficient Wideband mmW Transceiver Front End for 5G Base Stations in 22-nm FD-SOI CMOS. 321-336 - Milad Moosavifar, Jaeho Im, David D. Wentzloff:
An Interference-Resilient Bit-Level Duty-Cycled ULP Receiver Leveraging a Dual-Chirp Modulation. 337-348 - Xi Fu, Dongwon You, Yun Wang, Xiaolin Wang, Ashbir Aviat Fadila, Chenxin Liu, Sena Kato, Chun Wang, Zheng Li, Jian Pang, Atsushi Shirane, Kenichi Okada:
A Low-Power Radiation-Hardened Ka-Band CMOS Phased-Array Receiver for Small Satellite Constellation. 349-363 - Tianxiang Qu, Peizhuo Wang, Liangbo Lei, Zhiliang Hong, Jiawei Xu:
A 136-GΩ Input-Impedance Active Electrode for Non-Contact Biopotential Signals Monitoring. 364-374 - Liang Gao, Chi Hou Chan:
A 144-Element Beam-Steerable Source Array With 9.1-dBm Radiated Power and 30.8-dBm Lensless EIPR at 675 GHz. 375-387 - Tao Wang, Jieyang Li, Di Hua, Liangbo Lei, Peng Cao, Peng Xu, Jiawei Xu, Zhiliang Hong:
A Fully Integrated Digital Polar Transmitter With Single-Ended Doherty PA and DLL-Based Three-Segment Hybrid DTC in 28 nm CMOS. 388-399 - Guansheng Lv, Wenhua Chen, Long Chen, Fadhel M. Ghannouchi, Zhenghe Feng:
A 4.9-7.1-GHz High-Efficiency Post-Matching GaN Front-End Module for Wi-Fi 7 Application. 400-413 - Jongho Yoo, Songcheol Hong:
Highly Efficient Differential Frequency Doubler With Output Resistance Boosting Feedback. 414-423 - Juyeop Kim, Yongwoo Jo, Hangi Park, Taeho Seong, Younghyun Lim, Jaehyouk Choi:
A 12.8-15.0-GHz Low-Jitter Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancellation. 424-434 - Heyi Li, Kaixuan Du, Yuanxin Bao, Yanchi Dong, Jiayoon Ru, Han Xiao, Hao Zhang, Zhixuan Wang, Yi Zhong, Linxiao Shen, Le Ye, Ru Huang:
A 0.39-mm2 Stacked Standard-CMOS Humidity Sensor Using a Charge-Redistribution Correlated Level Shifting Floating Inverter Amplifier and a VCO-Based Zoom CDC. 435-448 - Li Wang, Zhao Zhang, Can Wang, Rehan Azmat, Weimin Shi, C. Patrick Yue:
A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM-4 Receiver With a Jitter Compensation CDR. 449-463 - Haihua Li, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak:
A 12-/13.56-MHz Crystal Oscillator With Binary-Search-Assisted Two-Step Injection Achieving 5.0-nJ Startup Energy and 45.8-μs Startup Time. 464-475 - Yannick M. Hopf, Djalma Simões dos Santos, Boudewine W. Ossenkoppele, Mehdi Soozande, Emile Noothout, Zu-Yao Chang, Chao Chen, Hendrik J. Vos, Johan G. Bosch, Martin D. Verweij, Nico de Jong, Michiel A. P. Pertijs:
A Pitch-Matched High-Frame-Rate Ultrasound Imaging ASIC for Catheter-Based 3-D Probes. 476-491 - Chia-Chi Kuo, Rihito Kuroda:
A 134×132 4-Tap CMOS Indirect Time-of-Flight Range Imager Using In-Pixel Memory Array With 10 Kfps High-Speed Mode and High Precision Mode. 492-501 - Xiaoliang Li, Vincent P. J. Chung, Metin G. Guney, Tamal Mukherjee, Gary K. Fedder, Jeyanandh Paramesh:
A 46.6 μg/√Hz Single-Chip Accelerometer Exploiting a DTC-Assisted Chopper Amplifier. 502-515 - Jonas Pelgrims, Kris Myny, Wim Dehaene:
An Ultrasonic Driver Array in Metal-Oxide Thin-Film Technology Using a Hybrid TFT-Si DLL Locking Architecture. 516-527 - Kyeongwon Jeong, Sohmyung Ha, Minkyu Je:
A 15.4-ENOB, Fourth-Order Truncation-Error-Shaping NS-SAR-Nested ΔΣ Modulator With Boosted Input Impedance and Range for Biosignal Acquisition. 528-539 - Chi-Wa U, Man-Kay Law, Rui Paulo Martins, Chi-Seng Lam:
Sub-μW Auto-Calibration Bandgap Voltage Reference With 1σ Inaccuracy of ± 0.12% Within - 40°C to 120°C. 540-550 - Hyunjin Kim, ChangHun Park, Inho Park, Taehyeong Park, Seungwoo Park, Chulwoo Kim:
A Four-Phase Time-Based Switched-Capacitor LDO With 13-ns Settling Time at 0.5-V Input for Energy-Efficient Computing in SoC Applications. 551-562 - Arindam Mishra, Wei Zhu, Bernhard Wicht, Valentijn De Smedt:
A Dual-Inductor Ladder Buck Converter for Li-Ion Battery-Operated Sub-Volt SoCs. 563-573 - Fu-Bin Yang, Dao-Han Yao, Po-Hung Chen:
A Quad-Mode Structure-Reconfigurable Regulating Rectifier With Shared-Inductor DC-DC Energy Recycling in a Wireless Power Receiver. 574-582 - Xin Ming, Jian-Jun Kuang, Xin-Ce Gong, Jie Zhang, Zhuo Wang, Bo Zhang:
An NMOS LDO With TM-MOS and Dynamic Clamp Technique Handling Up To Sub-10-μs Short-Period Load Transient. 583-594 - Junjie Wang, Teng Zhang, Shuang Liu, Yihe Liu, Yuancong Wu, Shaogang Hu, Tupei Chen, Yang Liu, Yuchao Yang, Ru Huang:
Design and Implementation of a Hybrid, ADC/DAC-Free, Input-Sparsity-Aware, Precision Reconfigurable RRAM Processing-in-Memory Chip. 595-604 - Jieyu Li, Weifeng He, Bo Zhang, Guanghui He, Jing Jin, Jun Yang, Mingoo Seok:
TICA: Timing Slack Inference and Clock Frequency Adaption Technique for a Deeply Pipelined Near-Threshold-Voltage Bitcoin Mining Core. 605-615 - Chuxiong Lin, Weifeng He, Yanan Sun, Lin Shao, Bo Zhang, Jun Yang, Mingoo Seok:
A Metastability Risk Prediction and Mitigation Technique for Clock-Domain Crossing With Single-Stage Synchronizer in Near-Threshold-Voltage Multivoltage/ Frequency-Domain Network-on-Chip. 616-625 - Fei Tan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak:
A 0.05-mm2 2.91-nJ/Decision Keyword-Spotting (KWS) Chip Featuring an Always-Retention 5T-SRAM in 28-nm CMOS. 626-635 - Sheng-Yu Peng, I-Chun Liu, Yi-Heng Wu, Ting-Ju Lin, Chun-Jui Chen, Xiu-Zhu Li, Yong-Qi Cheng, Pin-Han Lin, Kuo-Hsuan Hung, Yu Tsao:
An SRAM-Based Reconfigurable Cognitive Computation Matrix for Sensor Edge Applications. 636-648 - Dennis Sylvester:
New Associate Editor. 320
Volume 59, Number 3, March 2024
- Yan Lu, Shaolan Li:
Guest Editorial 2023 Custom Integrated Circuits Conference. 651-652 - Eunseok Lee, Muhammad Ibrahim Wasiq Khan, Xibi Chen, Utsav Banerjee, Nathan M. Monroe, Rabia Tugce Yazicigil, Ruonan Han, Anantha P. Chandrakasan:
A 1.54-mm2, 264-GHz Wake-Up Receiver With Integrated Cryptographic Authentication for Ultra-Miniaturized Platforms. 653-667 - Jiacong Ke, Zetian Lin, Guangyin Feng, Yanjie Wang:
A 52-73-GHz LNA With Tri-Coupled Transformer for Gm Boosting and Enhanced Noise Canceling. 668-676 - Zonglin Ye, Xinlin Geng, Yao Xiao, Qian Xie, Zheng Wang:
A Sub-50-fsrms Jitter Fractional-N CPPLL Based on a Dual-DTC-Assisted Time-Amplifying Phase-Frequency Detector With Cascadable DTC Nonlinearity Compensation Algorithm. 677-689 - Cooper S. Levy, Zhe Xuan, Jahnavi Sharma, Duanni Huang, Ranjeet Kumar, Chaoxuan Ma, Guan-Lin Su, Songtao Liu, Jinyong Kim, Xinru Wu, Tolga Acikalin, Haisheng Rong, Ganesh Balamurugan, James E. Jaussi:
8-λ × 50 Gbps/λ Heterogeneously Integrated Si-Ph DWDM Transmitter. 690-701 - Xiangdong Feng, Yuxuan Luo, Tianyi Cai, Yangfan Xuan, Yunshan Zhang, Yili Shen, Changgui Yang, Qijing Xiao, Sijun Du, Bo Zhao:
A 72-Channel Resistive-and-Capacitive Sensor-Interface Chip With Noise-Orthogonalizing and Pad-Sharing Techniques. 702-715 - Antonio Aprile, Michele Folz, Daniele Gardino, Piero Malcovati, Edoardo Bonizzoni:
An Area-Efficient Smart Temperature Sensor Based on a Fully Current Processing Error-Feedback Noise-Shaping SAR ADC in 180-nm CMOS. 716-727 - Liqun Feng, Woogeun Rhee, Zhihua Wang:
A DTC-Free Fractional-N BBPLL With FIR-Embedded Injection-Locked-Oscillator-Based Phase-Domain Lowpass Filter. 728-739 - Kaoru Yamashita, Benjamin P. Hershberg, Kentaro Yoshioka, Hiroki Ishikuro:
A 4.6-400 K Functional Ringamp-Based 250 MS/s 12 b Pipelined ADC With PVT-Robust Unity-Gain-Frequency-Aware Bias Calibration. 740-752 - ZiXuan Xu, Kai Xing, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan:
An ELDC-Free 4th-Order CT SDM Facilitated by 2nd-Order NS CT-SAR and AC-Coupled Negative-R. 753-764 - Jongho Kim, Gyuchan Cho, Jintae Kim:
A 7 GHz ERBW 1.1 GS/s 6-bit PVT Tolerant Asynchronous Charge-Injection SAR With Only 8.5 fF Input Capacitance in 28 nm CMOS. 765-773 - James Lin, Long Pham, Ran Tao, A. Gutmann, Shanglin Guo, Adam Cywar, Adam Spirer, Johan Mansson, Khiem Nguyen:
A Low-Power, Wide-Bandwidth, Three-Axis MEMS Accelerometer ASIC Using Beyond-Resonant-Frequency Sensing. 774-783 - Hsing-Yen Tsai, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
A GaN-on-Si Gate Driver With Self-Pumped Drive Enhance and Short-Period Negative Voltage Techniques for Reduction of 14.7× Tailing Power Loss and 37% Reverse Conduction Loss. 784-793 - Caiyu Tong, Zihao Fan, Yuan Gao:
A Li-Ion Battery Input Highly Integrated LED Driver With 96.8% Peak Efficiency and Dual-Color Mixing Capability. 794-803 - Jianqiang Jiang, Junyao Tang, Lei Zhao, Chenchang Zhan, Cheng Huang:
A 63% Efficiency 1.29-W Single-Link Multiple-Output (SLiMO) Isolated DC-DC Converter Using FPC Micro-Transformer With Local Voltage and Global Power Regulations. 804-816 - Minju Park, Kyeongho Eom, Han-Sol Lee, Seung-Beom Ku, Hyung-Min Lee:
A 9-V-Tolerant Stacked-Switched-Capacitor Stimulation System With Level-Adaptive Switch Control and Rapid Stimulus-Synchronized Charge Balancing for Implantable Devices. 817-829 - Junsoo Kim, Seunghee Han, Geonwoo Ko, Ji-Hoon Kim, Changha Lee, Taewoo Kim, Chan-Hyun Youn, Joo-Young Kim:
EPU: An Energy-Efficient Explainable AI Accelerator With Sparsity-Free Computation and Heat Map Compression/Pruning. 830-841 - Jiahao Song, Xiyuan Tang, Haoyang Luo, Haoyi Zhang, Xin Qiao, Zixuan Sun, Xiangxing Yang, Zihan Wu, Yuan Wang, Runsheng Wang, Ru Huang:
A 4-bit Calibration-Free Computing-In-Memory Macro With 3T1C Current-Programed Dynamic-Cascode Multi-Level-Cell eDRAM. 842-854 - Sadhana Shanmuga Sundaram, Yugandhar Khodke, Yidong Li, Sung-Joon Jang, Sang-Seol Lee, Mingu Kang:
FreFlex: A High-Performance Processor for Convolution and Attention Computations via Sparsity-Adaptive Dynamic Frequency Boosting. 855-866 - Cai Li, Haochang Zhi, Kaiyue Yang, Junyi Qian, Zhihao Yan, Lixuan Zhu, Chao Chen, Xi Wang, Weiwei Shan:
A 0.61-μW Fully Integrated Keyword-Spotting ASIC With Real-Point Serial FFT-Based MFCC and Temporal Depthwise Separable CNN. 867-877 - Lorenzo Piotto, Guglielmo De Filippi, Gianluca Brozzetti, Daniele Dal Maistro, Simone Erba, Andrea Mazzanti:
A 14-32 GHz SiGe-BiCMOS Gilbert-Cell Frequency Doubler With Self-Adjusted Reduced Duty-Cycle Performance Enhancement. 878-888 - Carl D'heer, Patrick Reynaert:
A Fully Integrated 135-GHz Direct-Digital 16-QAM Wireless and Dielectric Waveguide Link in 28-nm CMOS. 889-907 - Daniel Widmann, Tobias Tannert, Xuan-Quang Du, Thomas Veigel, Markus Grözing, Manfred Berroth:
A Time-Interleaved Digital-to-Analog Converter up to 118 GS/s With Integrated Analog Multiplexer in 28-nm FD-SOI CMOS Technology. 908-922 - Wei Song, Xiliang Liu, Heng Huang, Yusong Wu, Zijian Tang, Jintao Wang, Fengjun Ma, Jingfeng Zhou, Milin Zhang:
A Frequency-Division Transceiver for Long-Range Neural Signal Recording From Multiple Subjects. 923-934 - Piotr Zbigniew Wieczorek, Krzysztof Starecki, Krzysztof Golofit, Maciej Radtke, Marcin Pilarz:
A Thin Elastic NFC Forum Type 1 Compatible RFID Tag. 935-946 - Kathleen Feng, Taeyoung Kong, Kalhan Koul, Jackson Melchert, Alex Carsello, Qiaoyi Liu, Gedeon Nyengele, Maxwell Strange, Keyi Zhang, Ankita Nayak, Jeff Setter, James Thomas, Kavya Sreedhar, Po-Han Chen, Nikhil Bhagdikar, Zachary Myers, Brandon D'Agostino, Pranil Joshi, Stephen Richardson, Christopher Torng, Mark Horowitz, Priyanka Raina:
Amber: A 16-nm System-on-Chip With a Coarse- Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra. 947-959 - Chuan-Tung Lin, Dewei Wang, Bo Zhang, Gregory K. Chen, Phil C. Knag, Ram Kumar Krishnamurthy, Mingoo Seok:
DIMCA: An Area-Efficient Digital In-Memory Computing Macro Featuring Approximate Arithmetic Hardware in 28 nm. 960-971
Volume 59, Number 4, April 2024
- Mototsugu Hamada, Ron Kapusta:
Introduction to the Special Issue on the 2023 Symposium on VLSI Circuits. 975-977 - Chun Wang, Ibrahim Abdo, Chenxin Liu, Carrel da Gomez, Jill C. Mayeda, Hans Herdian, Wenqian Wang, Xi Fu, Dongwon You, Abanob Shehata, Sunghwan Park, Yun Wang, Jian Pang, Hiroyuki Sakai, Atsushi Shirane, Kenichi Okada:
A Sub-THz Full-Duplex Phased-Array Transceiver With Self-Interference Cancellation and LO Feedthrough Suppression. 978-992 - Yuncheng Zhang, Zheng Sun, Bangan Liu, Junjun Qiu, Dingxin Xu, Yi Zhang, Xi Fu, Dongwon You, Hongye Huang, Waleed Madany, Ashbir Aviat Fadila, Zezheng Liu, Wenqian Wang, Yuang Xiong, Atsushi Shirane, Kenichi Okada:
A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Hybrid FIR Filter. 993-1005 - Jiamin Li, Yilong Dong, Longyang Lin, Joanne Si Ying Tan, Fong Jia Yi, Jerald Yoo:
Concurrent Body-Coupled Powering and Communication ICs With a Single Electrode. 1006-1016 - Hyeonho Han, Byungchoul Park, Jaesuk Sung, Heonjin Choi, Youngcheol Chae:
A Highly Digital 143.2-dB DR Sub-1° Phase Error Impedance Monitoring IC With Pulsewidth Modulation Frontend. 1017-1025 - Gabriele Atzeni, Can Livanelioglu, Sina Arjmandpour, Taekwang Jang:
An Impedance-Boosted Transformer-First Discrete-Time Analog Front-End Achieving 0.34 NEF and 389-MΩ Input Impedance. 1026-1037 - Joydeep Basu, Luigi Fassio, Karim Ali, Massimo Alioto:
Picowatt-Power Super-Cutoff Analog Building Blocks and 78-pW Battery-Less Wake-Up Receiver for Light-Harvested Near-Always-On Operation. 1038-1049 - Seunghwa Shin, Gyeong-Gu Kang, Gyu-Wan Lim, Hyun-Sik Kim:
A Display Source-Driver IC Featuring Multistage-Cascaded 10-Bit DAC and True-DC-Interpolative Super-OTA Buffer. 1050-1066 - Tuur Van Daele, Filip Tavernier:
Monolithic 230-VRMS-to-12-VDC AC-DC Converter at 9 mW/mm2 Enabled by a 31-325-VDC Input Range Capacitive Multi-Ratio DC-DC Converter. 1067-1077 - Xiongjie Zhang, Qiaobo Ma, Yang Jiang, Anyang Zhao, Man-Kay Law, Rui Paulo Martins, Pui-In Mak:
An Outphase-Interleaved Switched-Capacitor Hybrid Buck Converter With Relieved Capacitor Inrush Current and COUT-Free Operations. 1078-1092 - Yuhan Hou, Yi Zhu, Xing Ji, Andrew G. Richardson, Xilin Liu:
A Wireless Sensor-Brain Interface System for Tracking and Guiding Animal Behaviors Through Closed-Loop Neuromodulation in Water Mazes. 1093-1109 - Jungho Lee, Joseph G. Letner, Jongyup Lim, Gabriele Atzeni, Jiawei Liao, Abhilasha Kamboj, Bhavika Mani, Seokhyeon Jeong, Yejoong Kim, Yi Sun, Beomseo Koo, Julianna M. Richie, Elena Della Valle, Paras R. Patel, Dennis Sylvester, Hun-Seok Kim, Taekwang Jang, Jamie Phillips, Cynthia A. Chestek, James D. Weiland, David T. Blaauw:
A Sub-mm3 Wireless Neural Stimulator IC for Visual Cortical Prosthesis With Optical Power Harvesting and 7.5-kb/s Data Telemetry. 1110-1122 - Moon Hyung Jang, Maddy Hays, Wei-Han Yu, Changuk Lee, Pietro Caragiulo, Athanasios T. Ramkaj, Pingyu Wang, A. J. Phillips, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore:
A 1024-Channel 268-nW/Pixel 36×36 μm2/Channel Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces. 1123-1136 - Takafumi Takatsuka, Jun Ogi, Yasuji Ikeda, Kazuki Hizu, Yutaka Inaoka, Shunsuke Sakama, Iori Watanabe, Tatsuya Ishikawa, Shohei Shimada, Junki Suzuki, Hidenori Maeda, Kenji Toshima, Yusuke Nonaka, Akifumi Yamamura, Hideki Ozawa, Fumihiko Koga, Yusuke Oike:
A 3.36-μm-Pitch SPAD Photon-Counting Image Sensor Using a Clustered Multi-Cycle Clocked Recharging Technique With an Intermediate Most-Significant-Bit Readout. 1137-1145 - Yoshinori Nishi, John W. Poulton, Walker J. Turner, Xi Chen, Sanquan Song, Brian Zimmer, Stephen G. Tell, Nikola Nedovic, John M. Wilson, William J. Dally, C. Thomas Gray:
A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS. 1146-1157 - Rishabh Mittal, Hajime Shibata, Sharvil Patil, Erik Krommenhoek, Prawal Shrestha, Gabriele Manganaro, Anantha P. Chandrakasan, Hae-Seung Lee:
A 6.4-GS/s 1-GHz BW Continuous-Time Pipelined ADC With Time-Interleaved Sub-ADC-DAC Achieving 61.7-dB SNDR in 16-nm FinFET. 1158-1170 - Hsiang-Wen Chen, Seungjong Lee, Michael P. Flynn:
An Anti-Aliasing-Filter-Assisted 3rd-Order VCO-Based CTDSM With NS-SAR Quantizer. 1171-1183 - Sundeep Javvaji, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Bert Oude-Essink, Koen Beijens, Kofi A. A. Makinwa, Lucien J. Breems:
A 120-MHz BW, 122-dBFS SFDR CTΔΣ ADC With a Multi-Path Multi-Frequency Chopping Scheme. 1184-1193 - Martijn Timmermans, Kyle van Oosterhout, Marco Fattori, Pieter Harpe, Yao-Hong Liu, Eugenio Cantatore:
A 1.8-65 fJ/Conv.-Step 64-dB SNDR Continuous- Time Level Crossing ADC Exploiting Dynamic Self-Biasing Comparators. 1194-1203 - Yoontae Jung, Sein Oh, Sohmyung Ha, Minkyu Je:
A 187-dB FoMS Power-Efficient Second-Order Highpass ΔΣ Capacitance-to-Digital Converter. 1204-1215 - Jeongkyun Kim, Byungho Yook, Youngo Lee, Taemin Choi, Kyuwon Choi, Chanho Lee, Juchang Lee, Hyeongcheol Kim, Seok Yun, Changhoon Do, Minwoo Kwak, Mijoung Kim, Yunrong Li, Hoyoung Tang, Jaeyoung Kim, Inhak Lee, Dongwook Seo, Sangyeop Baeck:
A 4.13-GHz UHS Pseudo Two-Port SRAM With BL Charge Time Reduction and Flying Word-Line for HPC Applications in 4-nm FinFET Technology. 1216-1224 - Yumito Aoyagi, Koji Nii, Makoto Yabuuchi, Tomotaka Tanaka, Yuichiro Ishii, Yoshiaki Osada, Takaaki Nakazato, Isabel Wang, Yu-Hao Hsu, Hong-Chen Cheng, Hung-Jen Liao, Tsung-Yung Jonathan Chang:
A 3-nm FinFET 27.6-Mbit/mm2 Single-Port 6T SRAM Enabling 0.48-1.2 V Wide Operating Range With Far-End Pre-Charge and Weak-Bit Tracking. 1225-1234 - Wei Tang, Sung-Gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Rani Kale, Mark Flanigan, Allen Chan, Thungoc Tran, Sergey Y. Shumarayev, Zhengya Zhang:
Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration. 1235-1245 - Xichen Li, Yi-Hsiang Huang, Fucheng Yin, Jacques Christophe Rudell:
A 2.4-GHz Full-Duplex Transceiver With Broadband, Linearity-Enhanced, and Long-Delay Spread Self-Interference Cancellation. 1246-1260 - Jonghyuck Choi, Yoonjae Choi, Jincheol Sim, Youngwook Kwon, Seungwoo Park, Seongcheol Kim, Changmin Sim, Chulwoo Kim:
A Single-Ended NRZ Receiver With Gain-Enhanced Active-Inductive CTLE and Reference-Selection DFE for Memory Interfaces. 1261-1270 - Murali Krishna Rajendran, Priya Venugopal, Gajendranath Chowdary:
An Incremental Step Sensing MPPT Based SI-SIDO Energy Harvester With >99% Peak MPPT Efficiency for an Input Power Range of 30 μW to 33 mW. 1271-1282 - Takahiro Shimoi, Ken Matsubara, Tomoya Saito, Tomoya Ogawa, Yasuhiko Taito, Yoshinobu Kaneda, Masayuki Izuna, Koichi Takeda, Hidenori Mitani, Takashi Ito, Takashi Kono:
A 22-nm 32-Mb Embedded STT-MRAM Macro Achieving 5.9-ns Random Read Access and 7.4-MB/s Write Throughput at up to 150 °C. 1283-1292 - Xinling Yue, Sijun Du:
Corrections to "A Synchronized Switch Harvesting Rectifier With Reusable Storage Capacitors for Piezoelectric Energy Harvesting". 1293
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