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ORCIDPeng Chen 0022
Person information
- affiliation: University College Dublin, School of Electrical and Electronic Engineering, Ireland
- affiliation (former): Delft University of Technology, The Netherlands
Other persons with the same name
- Peng Chen — disambiguation page
- Peng Chen 0001
![[0000-0002-5810-8159]](https://dblp1.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-5810-8159")
— Anhui University, Institute of Health Sciences, Hefei, China (and 2 more) - Peng Chen 0002 — Mie University, Faculty of Bioresources, Tsu, Japan (and 1 more)
- Peng Chen 0003 — Central South University, Changsha
- Peng Chen 0004 — University of Science and Technology of China
- Peng Chen 0005 — East China Normal University
- Peng Chen 0006 — Florida State University (and 1 more)
- Peng Chen 0007 — Xihua University, School of Computer and Software Engineering, Chengdu, China (and 1 more)
- Peng Chen 0008 — Zhejiang University, College of Information and Engineering, Hangzhou, China
- Peng Chen 0009 — Beijing University of Posts and Telecommunications
- Peng Chen 0010 — Kyushu Institute of Technology
- Peng Chen 0011 — China Three Gorges University
- Peng Chen 0012 — University of North Texas
- Peng Chen 0013 — North China University of Water Conservancy and Hydroelectric Power
- Peng Chen 0014 — Peking University, Shenzhen, China
- Peng Chen 0015 — Indiana University, Bloomington, USA
- Peng Chen 0016 — ETH Zurich, Switzerland
- Peng Chen 0017 — University of Electronic Science and Technology of China, School of Aeronautics and Astronautics, Chengdu, China
- Peng Chen 0018 — Southeast University, School of Information Science and Engineering, Nanjing, China (and 1 more)
- Peng Chen 0019 — State Oceanic Administration, Hangzhou, China
- Peng Chen 0020 — Northwestern Polytechnical University, School of Marine Science and Technology, Xi'an, China
- Peng Chen 0021 — Beihang University, School of Transportation Science and Engineering, Beijing, China
- Peng Chen 0023 — Second Institute of Oceanography, State Key Laboratory of Satellite Ocean Environment Dynamics, Hangzhou, China (and 1 more)
- Peng Chen 0024 — University of Texas at Austin, Institute for Computational Engineering and Sciences, Austin, TX, USA
- Peng Chen 0025 — Tongji University, College of Surveying and Geo-Informatics, Shanghai, China
- Peng Chen 0026 — Dalian Maritime University, Navigation College, Dalian, China (and 1 more)
- Peng Chen 0027 — National University of Singapore, Singapore (and 1 more)
- Peng Chen 0028 — China Telecom, Technology Innovation Center, Beijing, China
- Peng Chen 0029 — Microsoft Research and AI Group, Beijing, China
- Peng Chen 0030 — Northeastern University, College of Information Science and Engineering, Shenyang, China
- Peng Chen 0031 — University of Science and Technology Beijing, School of Automation and Electrical Engineering, China
- Peng Chen 0032 — Shanghai Maritime University, Department of Computer Science and Technology, China
- Peng Chen 0033 — Jilin University, Second Hospital, Changchun, China
- Peng Chen 0034 — ByteDance AI Lab, Beijing, China (and 1 more)
- Peng Chen 0035 — National Institute of Advanced Industrial Science and Technology, Japan, RIKEN Center for Computational Science, Tokyo, Japan (and 1 more)
- Peng Chen 0036 — Dalian Maritime University of China, Navigation College, Key Laboratory of Transport Industry of Intelligent Water Transportation, China
- Peng Chen 0037 — University of Adelaide, School of Computer Science, SA, Australia (and 2 more)
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2020 – today
- 2023
[j10]Zhong Gao, Jingchu He, Martin Fritz, Jiang Gong, Yiyu Shen, Zhirui Zong, Peng Chen, Gerd Spalink, Ben Eitel, Morteza S. Alavi, Robert Bogdan Staszewski, Masoud Babaie:
A Low-Spur Fractional-N PLL Based on a Time-Mode Arithmetic Unit. IEEE J. Solid State Circuits 58(6): 1552-1571 (2023)- [j9]Xi Meng, Haoran Li, Peng Chen, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Analysis and Design of a 15.2-to-18.2-GHz Inverse-Class-F VCO With a Balanced Dual-Core Topology Suppressing the Flicker Noise Upconversion. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 5110-5123 (2023) - 2022
- [j8]Peng Chen, Xi Meng, Jun Yin, Pui-In Mak, Rui Paulo Martins, Robert Bogdan Staszewski:
A 529-μW Fractional-N All-Digital PLL Using TDC Gain Auto-Calibration and an Inverse-Class-F DCO in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 51-63 (2022) - [j7]Peng Chen, Jun Yin, Feifei Zhang, Pui-In Mak, Rui Paulo Martins, Robert Bogdan Staszewski:
Mismatch Analysis of DTCs With an Improved BIST-TDC in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 196-206 (2022) - [c6]Zhong Gao, Jingchu He, Martin Fritz, Jiang Gong, Yiyu Shen, Zhirui Zong, Peng Chen, Gerd Spalink, Ben Eitel, Ken Yamamoto, Robert Bogdan Staszewski, Morteza S. Alavi, Masoud Babaie:
A 2.6-to-4.1GHz Fractional-N Digital PLL Based on a Time-Mode Arithmetic Unit Achieving -249.4dB FoM and -59dBc Fractional Spurs. ISSCC 2022: 380-382 - 2021
- [j6]Suoping Hu, Jianglin Du, Peng Chen, Hieu Minh Nguyen, Philip Quinlan, Teerachot Siriburanon, Robert Bogdan Staszewski:
A Type-II Phase-Tracking Receiver. IEEE J. Solid State Circuits 56(2): 427-439 (2021) - [j5]Feifei Zhang, Peng Chen, Jeffrey S. Walling, Anding Zhu, Robert Bogdan Staszewski:
An Active-Under-Coil RFDAC With Analog Linear Interpolation in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 68(5): 1855-1868 (2021) - [j4]Suoping Hu, Peng Chen, Philip Quinlan, Robert Bogdan Staszewski:
A 0.7-V Sub-mW Type-II Phase-Tracking Bluetooth Low Energy Receiver in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 68(6): 2317-2328 (2021) - [c5]Peng Chen, Feifei Zhang, Suoping Hu, Robert Bogdan Staszewski:
A Feedforward and Feedback Constant-Slope Digital-to-Time Converter in 28nm CMOS Achieving ≤ 0.12% INL/Range over >100mV Supply Range. VLSI Circuits 2021: 1-2
2010 – 2019
- 2019
- [j3]Zhirui Zong, Peng Chen, Robert Bogdan Staszewski:
A Low-Noise Fractional- ${N}$ Digital Frequency Synthesizer With Implicit Frequency Tripling for mm-Wave Applications. IEEE J. Solid State Circuits 54(3): 755-767 (2019) - [j2]Peng Chen, Feifei Zhang, Zhirui Zong, Suoping Hu, Teerachot Siriburanon, Robert Bogdan Staszewski:
A 31-µW, 148-fs Step, 9-bit Capacitor-DAC-Based Constant-Slope Digital-to-Time Converter in 28-nm CMOS. IEEE J. Solid State Circuits 54(11): 3075-3085 (2019) - 2018
- [j1]Peng Chen, Xiongchuan Huang, Yue Chen, Lianbo Wu, Robert Bogdan Staszewski:
An On-Chip Self-Characterization of a Digital-to-Time Converter by Embedding it in a First-Order ΔΣ Loop. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 3734-3744 (2018) - 2017
- [c4]Peng Chen, Feifei Zhang, Zhirui Zong, Hao Zheng, Teerachot Siriburanon, Robert Bogdan Staszewski:
A 15-μW, 103-fs step, 5-bit capacitor-DAC-based constant-slope digital-to-time converter in 28nm CMOS. A-SSCC 2017: 93-96 - 2016
- [c3]Peng Chen, Robert Bogdan Staszewski:
Exponential extended flash time-to-digital converter. EBCCSP 2016: 1-4 - 2015
- [c2]Peng Chen, Xiongchuan Huang, Yao-Hong Liu, Ming Ding, Cui Zhou, Ao Ba, Kathleen Philips, Harmke de Groot, Robert Bogdan Staszewski:
Design and built-in characterization of digital-to-time converters for ultra-low power ADPLLs. ESSCIRC 2015: 283-286 - [c1]Peng Chen, Xiongchuan Huang, Robert Bogdan Staszewski:
Fractional spur suppression in all-digital phase-locked loops. ISCAS 2015: 2565-2568
Coauthor Index
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