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ORCIDVLSI Circuits 2021: Kyoto, Japan
- 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021. IEEE 2021, ISBN 978-4-86348-780-2
- Hyeongseok Seo
, Gihwan Cho, Jungwoo Kim, Jun-Han Bae, Seong-Jin Kim, Jung-Hoon Chun, Jaehyuk Choi:
A CMOS LiDAR Sensor with Pre-Post Weighted-Histogramming for Sunlight Immunity Over 105 klx and SPAD-based Infinite Interference Canceling. 1-2 - Prachi Agarwal, Viveka Konandur Rajanna, Toh Wei Da, Benjamin C. K. Tee, Massimo Alioto:
Fully-Digital Self-Calibrating Decoder with Sub-µW, 1.6fJ/convstep and 0.0075mm2 per Receptor for Scaling to Human-Like Tactile Sensing Density. 1-2 - Taeyoung Chung, Sooa Kim, Jehyung Yoon, Heeseok Han, Kyung Soo Park, Hokyu Lee, Ho-Young Yoon, Sun-Kyu Lee, Jongyoon Lim, Yongjin Kwon, Jungbong Lee, Sung-Ung Kwak:
A 10A/μs Fast Transient AOT Voltage Regulator on DDR5 DIMM with Dithered Pseudo-Constant Switching Frequency Achieving -6dB Harmonic Suppression. 1-2 - Bing-Chen Wu, Tsung-Te Liu:
A Fully Integrated Switched-Capacitor Voltage Regulator with Multi-Rate Successive Approximation Achieving 190 ps Transient FoM and 83.7% Conversion Efficiency. 1-2 - Takafumi Fukushima:
Chiplet-Based Advanced Packaging Technology from 3D/TSV to FOWLP/FHE. 1-2 - Lai Wei, Zihao Zheng, Nereo Markulic, Jorge Lagos, Ewout Martens, Yan Zhu, Chi-Hang Chan, Jan Craninckx, Rui Paulo Martins:
An Auxiliary-Channel-Sharing Background Distortion and Gain Calibration Achieving >8dB SFDR Improvement over 4th Nyquist Zone in 1GS/s ADC. 1-2 - Jishen Zhang, Haiwen Xu, Gong Zhang, Yue Chen, Haibo Wang, Kian Hua Tan, Satrio Wicaksono, Chao Wang, Chen Sun, Qiwen Kong, Charles Ci Wen Lim, Soon-Fatt Yoon, Xiao Gong:
First InGaAs/InAlAs Single-Photon Avalanche Diodes (SPADs) Heterogeneously Integrated with Si Photonics on SOI Platform for 1550 nm Detection. 1-2 - Koen Goetschalckx, Marian Verhelst:
DepFiN: A 12nm, 3.8TOPs depth-first CNN processor for high res. image processing. 1-2 - Insung Joe, Yunki Lee, Hye Yeon Park, Jong Uk Kim, Dongyeon Kang, Taehoon Kim, Minkwan Kim, Kwangmin Lee, Minsung Heo, Inho Ro, Jinhyung Kim, Inyong Park, Seokjin Kwon, Kisang Yoon, Dami Park, Changkyu Lee, Eunyoung Jo, Minhwan Jeon, Chanho Park, Kyung Rae Byun, Chong Kwang Chang, JaeSung Hur, Kijoong Yoon, Taeksoo Jeon, Jaehak Lee, Jungho Park, Bumsuk Kim, JungChak Ahn, Hyunchul Kim, Chang-Rok Moon, Hyoung-Sub Kim:
Development of Advanced Inter-Color-Filter Grid on Sub-Micron-Pixel CMOS Image Sensor for Mobile Cameras with High Sensitivity and High Resolution. 1-2 - Jianglin Du, Teerachot Siriburanon, Xi Chen, Yizhe Hu, Vivek Govindaraj, Anding Zhu, Robert Bogdan Staszewski:
A 24-31 GHz Reference Oversampling ADPLL Achieving FoMjitter-N of -269.3 dB. 1-2 - Kyung-Sik Choi, Jinho Ko, Sang-Gug Lee:
A Single-Supply Single-Core Inverse Class-D Digital Power Amplifier with Enhanced Power Back-Off Efficiency Adopting Output Power Scaling Technique. 1-2 - Kiseo Kang, ByungJun Kim, Gahyun Choi, Sun-Kyung Lee, Jisoo Choi, Jaeho Lee, Seokhyeong Kang, Moonjoo Lee, Ho-Jin Song, Yonuk Chong, Jae-Yoon Sim:
A 5.5mW/Channel 2-to-7 GHz Frequency Synthesizable Qubit-Controlling Cryogenic Pulse Modulator for Scalable Quantum Computers. 1-2 - Sanjeev Tannirkulam Chandrasekaran, Sumukh Prashant Bhanushali, Stefano Pietri, Arindam Sanyal:
OTA-free 1-1 MASH ADC using Fully Passive Noise Shaping SAR & VCO ADC. 1-2 - Sung Justin Kim, Dongkwun Kim, Ayushparth Sharma, Mingoo Seok:
EQZ-LDO: A Near-Zero EDP Overhead, >10M-Attack-Resilient, Secure Digital LDO featuring Attack-Detection and Detection-Driven Protection for a Correlation-Power-Analysis-Resilient IoT Device. 1-2 - Hyuntak Jeon, Injun Choi, Young-Han Kim, Se-Un Shin, Minkyu Je:
A SiPM Readout IC Embedded in a Boost Converter for Mobile Dosimeters. 1-2 - Massimo Giordano, Kartik Prabhu, Kalhan Koul, Robert M. Radway, Albert Gural, Rohan Doshi, Zainab F. Khan, John W. Kustin, Timothy Liu, Gregorio B. Lopes, Victor Turbiner, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Guénolé Lallement, Boris Murmann, Subhasish Mitra, Priyanka Raina:
CHIMERA: A 0.92 TOPS, 2.2 TOPS/W Edge AI Accelerator with 2 MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference. 1-2 - Hassan Sepehrian, Stephen Alie, Paul Madeira, Davide Tonietto:
106 Gb/s PAM-4 Transmitter With 2.1 Vppd Swing in 7nm FinFET Process. 1-2 - Nachiket V. Desai, Harish K. Krishnamurthy, William J. Lambert, Jingshu Yu, Han Wui Then, Nicolas Butzen, Sheldon Weng, Christopher Schaef, N. Nidhi, Marko Radosavljevic, Johann Rode, Justin Sandford, Kaladhar Radhakrishnan, Krishnan Ravichandran, Bernhard Sell, James W. Tschanz, Vivek De:
A 32A 5V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN NMOS Power Transistors. 1-2 - Arun Manickam, Kirsten A. Johnson, Rituraj Singh, Nicholas Wood, Edmond Ku, Andrea Cuppoletti, Mark McDermott, Arjang Hassibi:
Multiplex PCR CMOS Biochip for Detection of Upper Respiratory Pathogens including SARS-CoV-2. 1-2 - Jorge Lagos, Nereo Markulic, Benjamin P. Hershberg, Davide Dermit, Mithlesh Shrivas, Ewout Martens, Jan Craninckx:
A 10.0 ENOB, 6.2 fJ/conv.-step, 500 MS/s Ringamp-Based Pipelined-SAR ADC with Background Calibration and Dynamic Reference Regulation in 16nm CMOS. 1-2 - Hyunsik Jeong, SeongHwan Cho:
An Energy-Efficient Voltage Step-up System for 3D NAND Flash using Charge-Compensating Regulator. 1-2 - Nobuhiko Nishiyama, Tomohiro Amemiya:
On-Silicon Photonic Integrated Circuit toward On-chip Interconnection and Distributed Computing. 1-2 - Min-Woong Seo, Myunglae Chu, Hyun-Yong Jung, Suksan Kim, Jiyoun Song, Junan Lee, Sung-Yong Kim, Jongyeon Lee, Sung-Jae Byun, Daehee Bae, Minkyung Kim, Gwi-Deok Lee, Heesung Shim, Changyong Um, Changhwa Kim, In-Gyu Baek, Doowon Kwon, Hongki Kim, Hyuksoon Choi, Jonghyun Go, JungChak Ahn, Jaekyu Lee, Changrok Moon, Kyupil Lee, Hyoung-Sub Kim:
A 2.6 e-rms Low-Random-Noise, 116.2 mW Low-Power 2-Mp Global Shutter CMOS Image Sensor with Pixel-Level ADC and In-Pixel Memory. 1-2 - Longyang Lin, Karim Ali Ahmed, Praveenakumar Shivappa Salamani, Massimo Alioto:
Battery-Less IoT Sensor Node with PLL-Less WiFi Backscattering Communications in a 2.5-μW Peak Power Envelope. 1-2 - I-Hsiang Wang, Ting Tsai, Rong-Cun Pan, Po-Yu Hong, M. T. Kuo, I. H. Chen, Thomas George, H. C. Lin, Pei-Wen Li:
Reconfigurable Germanium Quantum-Dot Arrays for CMOS Integratable Quantum Electronic Devices. 1-2 - Roger Luis Brito Zamparette, Kofi A. A. Makinwa:
A ±2A/15A Current Sensor with 1.4 μA Supply Current and ±0.35%/0.6% Gain Error From -40 to 85°C using an Analog Temperature-Compensation Scheme. 1-2 - Riduan Khaddam-Aljameh, Milos Stanisavljevic, Jordi Fornt Mas, Geethan Karunaratne, Matthias Braendli, Femg Liu, Abhairaj Singh, Silvia M. Müller, Urs Egger, Anastasios Petropoulos, Theodore Antonakopoulos, Kevin Brew, Samuel Choi, Injo Ok, Fee Li Lie, Nicole Saulnier, Victor Chan, Ishtiaq Ahsan, Vijay Narayanan, S. R. Nandakumar, Manuel Le Gallo, Pier Andrea Francese, Abu Sebastian, Evangelos Eleftheriou:
HERMES Core - A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing. 1-2 - Rémi Dekimpe, Maxime Schramme, Martin Lefebvre, Adrian Kneip, Roghayeh Saeidi, Mathieu Xhonneux, Ludovic Moreau, Marco Gonzalez, Thibault Pirson, David Bol:
SleepRider: a 5.5μW/MHz Cortex-M4 MCU in 28nm FD-SOI with ULP SRAM, Biomedical AFE and Fully-Integrated Power, Clock and Back-Bias Management. 1-2 - Sujin Park, Hyungil Chae, SeongHwan Cho:
A 3.68aFrms Resolution 183dB FoMs 4th-order Continuous-Time Bandpass ∆Σ Capacitance-to-Digital Converter in 0.18µm CMOS. 1-2 - Sangyeop Baeck, Inhak Lee, Hoyoung Tang, Dongwook Seo, Jaeseung Choi, Taejoong Song, Jongwook Kye:
5nm Low Power SRAM Featuring Dual-Rail Architecture with Voltage-Tracking Assist Circuit for 5G mobile application. 1-2 - Ji-Seon Paek, Wan Kim, Seunghoon Kang, Jongwoo Lee, Seungchul Pyo, Yongki Cho, Daeseok Jang, Youngsik Hur:
A 5G New Radio SAW-less RF Transmitter with a 100MHz Envelope Tracking HPUE n77 Power Amplifier Module. 1-2 - Haibo Wang, Yue Chen, Jishen Zhang, Gong Zhang, Yi-Chiau Huang, Xiao Gong:
First Demonstration of Waveguide-Coupled Ge0.92Sn0.08/Ge Multiple-Quantum-Well Photodetector on the SOI Platform for 2-μm Wavelength Optoelectronic Integrated Circuit. 1-2 - Naoki Sekine, Kasidit Toprasertpong, Shinichi Takagi, Mitsuru Takenaka:
Bandgap-tunable III-V-OI Photonics Platform with Quantum Well Intermixing for Versatile Active-passive Integration of Chip-scale Photonic Integrated Circuits. 1-2 - Rohit Rothe, Minchang Cho, Kyojin Choo, Seokhyeon Jeong, Dennis Sylvester, David T. Blaauw:
A 192 nW 0.02 Hz High Pass Corner Acoustic Analog Front-End with Automatic Saturation Detection and Recovery. 1-2 - Charles Augustine, A. Afzal, U. Misgar, Abdullah A. Owahid, A. Raman, K. Subramanian, Feroze Merchant, James W. Tschanz, Muhammad M. Khellah:
All-Digital Closed-Loop Unified Retention/Wake-Up Clamp in a 10nm 4-Core x86 IP. 1-2 - Li Wang, Zhao Zhang, C. Patrick Yue:
A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM4 Receiver with a -8-dB JTRAN 40-MHz 0.2-UIPP JTOL Clock and Data Recovery. 1-2 - Junkang Zhu, Wei Tang, Ching-En Lee, Haolei Ye, Eric McCreath, Zhengya Zhang:
VOTA: A 2.45TFLOPS/W Heterogeneous Multi-Core Visual Object Tracking Accelerator Based on Correlation Filters. 1-2 - Zule Xu, Masaru Osada, Tetsuya Iizuka:
A 3.3-GHz 4.6-mW Fractional-N Type-II Hybrid Switched-Capacitor Sampling PLL Using CDAC-Embedded Digital Integral Path with -80-dBc Reference Spur. 1-2 - Mark Wade, Daniel Jeong, Byungchae Kim, Mason Zhang, Woorham Bae, Chong Zhang, Pavan Bhargava, Derek Van Orden, Shahab Ardalan, Chandarasekaran Ramamurthy, Erik Anderson, Austin Katzin, Haiwei Lu, Sidney Buchbinder, Behrooz Beheshtian, Anatoly Khilo, Michael Rust, Chen Li, Forrest Sedgwick, John Michael Fini, Roy Meade, Vladimir Stojanovic, Chen Sun:
Monolithic Microring-based WDM Optical I/O for Heterogeneous Computing. 1-2 - Rundao Lu, Michael P. Flynn:
A 300MHz-BW 38mW 37dB/40dB SNDR/DR Frequency-Interleaving Continuous-Time Bandpass Delta-Sigma ADC in 28nm CMOS. 1-2 - Hyunjin Shin, Myeonghee Oh, Jaeseung Choi, Taejoong Song, Jongwook Kye:
A 28nm Embedded Flash Memory with 100MHz Read Operation and 7.42Mb/mm2 at 0.85V featuring for Automotive Application. 1-2 - Mike Davies:
Lessons from Loihi: Progress in Neuromorphic Computing. 1-2 - Seunghwan Hong, Chang-Hyun Bae, Yoo-Chang Sung, Jaewoong Kim, Junsub Yoon, Sangwoo Kim, Jin-Hyeok Baek, Cheongryong Cho, Useung Shin, Sang-Kyeom Kim, Hwan-Chul Jung, Ho-Jun Chang, Jang-Hoo Kim, Jeongsik Hwang, Hyunki Kim, Ki-Won Lee, Dongmin Kim, Han-Ki Jeong, Myung-O. Kim, Kyomin Sohn, Jeong-Don Ihm, Changsik Yoo, Sang Joon Hwang:
A Reflection and Crosstalk Canceling Continuous-Time Linear Equalizer for High-Speed DDR SDRAM. 1-2 - Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim:
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm. 1-2 - Adelson Chua, Michael I. Jordan, Rikky Muller:
A 1.5nJ/cls Unsupervised Online Learning Classifier for Seizure Detection. 1-2 - Ken Namura, Johannes Maximilian Kühn, Tohru Adachi, H. Imachi, H. Kaneko, T. Kato, Go Watanabe, Naoto Tanaka, S. Kashihara, Hiroshi Miyashita, Y. Tomonaga, Ryosuke Okuta, Takuya Akiba, Brian Vogel, S. Kitajo, F. Osawa, K. Takahashi, Y. Takatsukasa, K. Mizumaru, T. Yamauchi, J. Ono, A. Takahashi, Tanvir Ahmed, Y. Doi, K. Hiraki, J. Makino:
MN-Core - A Highly Efficient and Scalable Approach to Deep Learning. 1-2 - Iuliana P. Radu, Roy Li, Anton Potocnik, Tsvetan Ivanov, Danny Wan, Stefan Kubicek, Nard I. Dumoulin Stuyck, Jeroen Verjauw, Julien Jussot, Yann Canvel, Clement Godfrin, Massimo Mongillo, Rohith Acharya, Asser Elsayed, Mohamed Shehata, Xiaoyu Piao, Antoine Pacco, Laurent Souriau, Sebastien Couet, B. T. Chan, Jan Craninckx, Bertrand Parvais, Alexander Grill, Subramanian Narasimhamoorthy, Steven Van Winckel, Steven Brebels, Fahd A. Mohiyaddin, George Simion, Bogdan Govoreanu:
Solid state qubits: how learning from CMOS fabrication can speed-up progress in Quantum Computing. 1-2 - Mark Papermaster, Stephen Kosonocky, Gabriel H. Loh, Samuel Naffziger:
A New Era of Tailored Computing. 1-2 - Petar Jokic, Erfan Azarkhish, Régis Cattenoz, Engin Türetken, Luca Benini, Stéphane Emery:
A Sub-mW Dual-Engine ML Inference System-on-Chip for Complete End-to-End Face-Analysis at the Edge. 1-2 - Shihui Yin, Bo Zhang, Minkyu Kim, Jyotishman Saikia, Soonwan Kwon, Sungmeen Myung, Hyunsoo Kim, Sang Joon Kim, Mingoo Seok, Jae-sun Seo:
PIMCA: A 3.4-Mb Programmable In-Memory Computing Accelerator in 28nm for On-Chip DNN Inference. 1-2 - Chinwuba D. Ezekwe, Saikrishna Ganta, Xinyu Xing, Anton Grad, Thomas Mayer, Andrea Visconti, Francesco Diazzi, Man-Chia Chen, Danielle Morton, Luca Valli, Robert Wolf, Ashkan Eghtesadi, Tobias Wolfer, Michael Pietzko, Alexander Grathwohl, Thomas Northemann, Richard Schoenleber, Ruslan Khalilyulin, Ishita Mukhopadhyay, Alexandru Negut, Artjom Kosov, Andreas Christian Serafin, Jan Hayek, Lin Sun:
A direct-digitization open-loop gyroscope frontend with +/-8000°/s full-scale range and noise floor of 0.0047°/s/√Hz. 1-2 - Wooseok Byun, Minkyu Je, Ji-Hoon Kim:
A 2144.2-bits/min/mW 5-Heterogeneous PE-based Domain-Specific Reconfigurable Array Processor for 8-Ch Wearable Brain-Computer Interface SoC. 1-2 - Soon-Jae Kweon, Joonho Gil, Chulhyun Park, Sein Oh, Yoontae Jung, Injun Choi, Song-I Cheon, Hung Phan Dang, Ja-Hyuck Koo, Geunhoe Kim, Sohmyung Ha, Minkyu Je:
An 8MHz 31.25kS/s Impedance-Monitoring IC Based on IF-Sampling Architecture with a Band-Pass Delta-Sigma ADC. 1-2 - Cheng-Ze Shao, Yu-Te Liao:
A 650 pW, -71 dB PSRR, 205°C Temperature Range Hybrid Voltage Reference with Curvature-Based Temperature Compensation and SBFL Techniques. 1-2 - Yongtae Lee, Byeonghwa Cho, Changuk Lee, Jongbaeg Kim, Youngcheol Chae:
A 47.5nJ Resistor-to-Digital Converter for Detecting BTEX with 0.06ppb-Resolution. 1-2 - Hongseok Shin, Doojin Jang, Gyeong-Gu Kang, Jinuk Kim, Chul Kim, Sohmyung Ha, Minkyu Je:
A 96.6%-Efficiency Continuous-Input-Current Hybrid Dual-Path Buck-Boost Converter with Single-Mode Operation and Non-Stopping Output Current Delivery. 1-2 - Jiaju Ma, Dexue Zhang, Omar A. Elgendy, Saleh Masoodian:
A Photon-Counting 4Mpixel Stacked BSI Quanta Image Sensor with 0.3e- Read Noise and 100dB Single-Exposure Dynamic Range. 1-2 - Panagiotis G. Zarkos, Sidney Buchbinder, Christos G. Adamopoulos, Sarika Madhvapathy, Olivia Hsu, Jake Whinnery, Pavan Bhargava, Vladimir Stojanovic:
Fully Integrated Electronic-Photonic Ultrasound Receiver Array for Endoscopic Imaging Applications in a Zero-Change 45nm CMOS-SOI Process. 1-2 - Guanrong Hou, Behzad Razavi:
A 56-Gb/s 8-mW PAM4 CDR/DMUX with High Jitter Tolerance. 1-2 - Satoshi Matsuoka:
Fugaku and A64FX: the First Exascale Supercomputer and its Innovative Arm CPU. 1-3 - Yutaka Tabuchi, Shuhei Tamate, Shinichi Yorozu:
Superconducting quantum computer: a hint for building architectures. 1-2 - Nicky Lu, Chun Shiah, Juang-Ying Chueh, Bor-Doou Rong, Wei-Jr Huang, Ho-Yin Chen, Cheng-Nan Chang, Chia-Wei Chang, Tzung-Shen Chen:
Enhanced Core Circuits for scaling DRAM: 0.7V VCC with Long Retention 138ms at 125°C and Random Row/Column Access Times Accelerated by 1.5ns. 1-2 - Yu Zhao, Behzad Razavi:
A 19-GHz PLL with 20.3-fs Jitter. 1-2 - Yang Wang, Yubin Qin, Dazheng Deng, Jingchuan Wei, Tianbao Chen, Xinhan Lin, Leibo Liu, Shaojun Wei, Shouyi Yin:
A 28nm 276.55TFLOPS/W Sparse Deep-Neural-Network Training Processor with Implicit Redundancy Speculation and Batch Normalization Reformulation. 1-2 - Geert Van der Plas, Eric Beyne:
Design and Technology Solutions for 3D Integrated High Performance Systems. 1-2 - Hossein Razavi, Behzad Razavi:
A 0.4-6 GHz Receiver for LTE and WiFi. 1-2 - Mohamed Megahed, Yusang Chun, Zhiping Wang, Tejasvi Anand:
A 27 Gb/s 5.39 pJ/bit 8-ary Modulated Wireline Transceiver Using Pulse Width and Amplitude Modulation Achieving 9.5 dB SNR Improvement over PAM-8. 1-2 - Nard I. Dumoulin Stuyck, Roy Li, Clement Godfrin, Asser Elsayed, Stefan Kubicek, Julien Jussot, B. T. Chan, Fahd A. Mohiyaddin, Mohamed Shehata, George Simion, Yann Canvel, Ludovic Goux, Heyns Heyns, Bogdan Govoreanu, Iuliana P. Radu:
Uniform Spin Qubit Devices with Tunable Coupling in an All-Silicon 300 mm Integrated Process. 1-2 - Miaolin Zhang, Lian Zhang, Jeong Hoan Park, Chne-Wuen Tsai, Kian Ann Ng, Longyang Lin, Yilong Dong, Jiamin Li, Tao Tang, Han Wu, Liuhao Wu, Jerald Yoo:
A One-Shot Learning, Online-Tuning, Closed-Loop Epilepsy Management SoC with 0.97μJ/Classification and 97.8% Vector-Based Sensitivity. 1-2 - Michihiro Ide, Atsushi Shirane, Kiyoshi Yanagisawa, Dongwon You, Jian Pang, Kenichi Okada:
A 28-GHz Phased-Array Relay Transceiver for 5G Network Using Vector-Summing Backscatter with 24-GHz Wireless Power and LO Transfer. 1-2 - Hyunsoo Song, Sungjin Oh, Juan Salinas, Sung-Yun Park, Euisik Yoon:
A 5.1ms Low-Latency Face Detection Imager with In-Memory Charge-Domain Computing of Machine-Learning Classifiers. 1-2 - Minglei Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A 20GS/s 8b Time-Interleaved Time-Domain ADC with Input-Independent Background Timing Skew Calibration. 1-2 - Shaun Chou, Gu-Huan Li, Shawn Chen, Jun-Hao Chang, Wan-Hsueh Cheng, Shao-Ding Wu, Philex Fan, Chia-En Huang, Yu-Der Chih, Yih Wang, Jonathan Chang:
A 16Kb Antifuse One-Time-Programmable Memory in 5nm High-K Metal-Gate Fin-FET CMOS Featuring Bootstrap High Voltage Scheme, Read Endpoint Detection and Pseudo-Differential Sensing. 1-2 - Ying-Yu Hsu, Po-Chun Kuo, Chih-Lun Chuang, Po-Hao Chang, Hung-Hao Shen, Chen-Feng Chiang:
A 7nm 0.46pJ/bit 20Gbps with BER 1E-25 Die-to-Die Link Using Minimum Intrinsic Auto Alignment and Noise-Immunity Encode. 1-2 - Hao Qiu, Makoto Takamiya:
A 6.78 MHz Wireless Power Transfer System for Simultaneous Charging of Multiple Receivers with Maximum Efficiency using Adaptive Magnetic Field Distributor IC. 1-2 - Huajun Zhang, Marco Berkhout, Kofi A. A. Makinwa, Qinwen Fan:
A -121.5 dB THD Class-D Audio Amplifier with 49 dB Suppression of LC Filter Nonlinearity and Robust to +/-30% LC Filter Spread. 1-2 - Hirofumi Sumi, Hironari Takehara, Jun Ohta, Masatoshi Ishikawa:
Advanced Multi-NIR Spectral Image Sensor with Optimized Vision Sensing System and Its Impact on Innovative Applications. 1-2 - Jinseok Lee, Hossein Valavi, Yinqi Tang, Naveen Verma:
Fully Row/Column-Parallel In-memory Computing SRAM Macro employing Capacitor-based Mixed-signal Computation with 5-b Inputs. 1-2 - Baibhab Chatterjee, K. Gaurav Kumar, Mayukh Nath, Shulan Xiao, Nirmoy Modak, Debayan Das, Jayant Krishna, Shreyas Sen:
A 1.15μW 5.54mm3 Implant with a Bidirectional Neural Sensor and Stimulator SoC utilizing Bi-Phasic Quasi-static Brain Communication achieving 6kbps-10Mbps Uplink with Compressive Sensing and RO-PUF based Collision Avoidance. 1-2 - Khondker Zakir Ahmed, Nachiket V. Desai, Harish K. Krishnamurthy, Sheldon Weng, Xiaosen Liu, Krishnan Ravichandran, James W. Tschanz, Vivek De:
A Dual-Input, Digital Hybrid Buck-LDO System Featuring Fast Load Transient Response, Zero-Wire Current Handover & Input PDN Resonance Reduction. 1-2 - Chihiro Matsui, Kasidit Toprasertpong, Shinichi Takagi, Ken Takeuchi:
Energy-Efficient Reliable HZO FeFET Computation-in-Memory with Local Multiply & Global Accumulate Array for Source-Follower & Charge-Sharing Voltage Sensing. 1-2 - Shota Iizuka, Kimihiko Kato, Atsushi Yagishita, Hidehiro Asai, Tetsuya Ueda, Hiroshi Oka, Junichi Hattori, Tsutomu Ikegami, Koichi Fukuda, Takahiro Mori:
Buried nanomagnet realizing high-speed/low-variability silicon spin qubits: implementable in error-correctable large-scale quantum computers. 1-2 - Sangjin Kim, Juhyoung Lee, Dongseok Im, Hoi-Jun Yoo:
PNNPU: A 11.9 TOPS/W High-speed 3D Point Cloud-based Neural Network Processor with Block-based Point Processing for Regular DRAM Access. 1-2 - Hieu Minh Nguyen, Jeffrey S. Walling, Anding Zhu, Robert Bogdan Staszewski:
A Ka-band Switched-Capacitor RFDAC Using Edge-Combining in 22nm FD-SOI. 1-2 - Peng Chen, Feifei Zhang, Suoping Hu, Robert Bogdan Staszewski:
A Feedforward and Feedback Constant-Slope Digital-to-Time Converter in 28nm CMOS Achieving ≤ 0.12% INL/Range over >100mV Supply Range. 1-2 - Junjie Mu, Yuqi Su, Bongjin Kim:
A 20x28 Spins Hybrid In-Memory Annealing Computer Featuring Voltage-Mode Analog Spin Operator for Solving Combinatorial Optimization Problems. 1-2 - Hemanth Prabhu, Liang Liu, Farhana Sheikh, Ove Edfors:
A 1070 pJ/b 169 Mb/s Quad-core Digital Baseband SoC for Distributed and Cooperative Massive MIMO in 28 nm FD-SOI. 1-2 - Hossein Razavi, Behzad Razavi:
A 27-73 GHz Injection-Locked Frequency Divider. 1-2 - Jongyup Lim, Jungho Lee, Eunseong Moon, Michael Barrow, Gabriele Atzeni, Joseph G. Letner, Joseph T. Costello, Samuel R. Nason, Paras R. Patel, Parag G. Patil, Hun-Seok Kim, Cynthia A. Chestek, Jamie Phillips, David T. Blaauw, Dennis Sylvester, Taekwang Jang:
A Light Tolerant Neural Recording IC for Near-Infrared-Powered Free Floating Motes. 1-2 - Zipeng Chen, Wei Deng, Haikun Jia, Pingda Guan, Taikun Ma, Shiyan Sun, Xiangrong Huang, Guopei Chen, Ruichang Ma, Shengnan Dong, Luqiang Duan, Zhihua Wang, Baoyong Chi:
A 122-168GHz Radar/Communication Fusion-Mode Transceiver with 30GHz Chirp Bandwidth, 13dBm Psat, and 8.3dBm OP1dB in 28nm CMOS. 1-2 - Chetan Deshpande, Ritesh Garg, Gajanan Jedhe, Gaurang Narvekar, Sushil Kumar:
A 5nm Fin-FET 2G-search/s 512-entry x 220-bit TCAM with Single Cycle Entry Update Capability for Data Center ASICs. 1-2 - Fabio Disegni, A. Ventre, A. Molgora, Paolo Cappelletti, R. Badalamenti, P. Ferreira, G. Castagna, Andreia Cathelin, Anna Gandolfo, Andrea Redaelli, D. Manfrè, Alfonso Maurelli, C. Torti, F. Piazza, M. Carfì, Franck Arnaud, M. Perroni, M. Caruso, S. Pezzini, Roberto Annunziata, G. Piazza, Olivier Weber, M. Peri:
16MB High Density Embedded PCM macrocell for automotive-grade microcontroller in 28nm FD-SOI, featuring extension to 24MB for Over-The-Air software update. 1-2 - Chi Fung Poon, Wenfeng Zhang, Junho Cho, Shaojun Ma, Yipeng Wang, Ying Cao, Asma Laraba, Eugene Ho, Winson Lin, Zhaoyin Daniel Wu, Kee Hian Tan, Parag Upadhyaya, Yohan Frans:
A 1.24pJ/b 112Gb/s (870Gbps/mm) Transceiver for In-package Links in 7nm FinFET. 1-2 - Ji-Hun Lee, Hyun-Sik Kim:
An 8Ω 5.5W, 0.006% THD+N, 2×VBAT-Swing Switched-Mode Audio Amplifier with Fully-Differential Linear Buck-Boost Topology Achieving Total Efficiency of 87%. 1-2 - Tsung-Che Lu, Chin-Ming Fu, Chia-Chun Liao, Yu-Tso Lin, Chih-Hsien Chang, Kenny Hsieh:
A Cost-Effective On-Chip Power Impedance Measurement (PIM) System in 7nm FinFET for HPC Applications. 1-2 - Shiva Kiran, Ajay Balankutty, Yutao Liu, Rajeev Dokania, Hariprasath Venkataraman, Priya Wali, Stephen Kim, Yoel Krupnik, Ariel Cohen, Frank O'Mahony:
A 56GHz Receiver Analog Front End for 224Gb/s PAM-4 SerDes in 10nm CMOS. 1-2 - Eun Sub Shim, Kyungho Lee, Junghyung Pyo, Wooseok Choi, Jungbin Yun, Taesub Jung, Kyungduck Lee, Seyoung Kim, Chanhee Lee, Seungki Baek, Hyuncheol Kim, Sungsoo Choi, Junseok Yang, Kyoungmok Son, Jongwon Choi, Howoo Park, Bumsuk Kim, JungChak Ahn, Duckhyun Chang:
All-Directional Dual Pixel Auto Focus Technology in CMOS Image Sensors. 1-2 - Ruilin Zhang, Xingyu Wang, Luying Wang, Xinpeng Chen, Fan Yang, Kunyang Liu, Hirofumi Shinohara:
A 0.186-pJ per Bit Latch-Based True Random Number Generator with Mismatch Compensation and Random Noise Enhancement. 1-2 - Joo-Mi Cho, Hyo-Jin Park, Sung-Wan Hong:
A 0.93-μW Single-Stage Rail-to-Rail Class AB Buffer Amplifier Improving DC gain and Slew-Rate with Different-Ratio Current-Mirrors and Positive-Feedback Loops. 1-2 - Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, Jinsu Lee, Hoi-Jun Yoo:
A 13.7 TFLOPS/W Floating-point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory. 1-2 - Jae-Young Ko, Yeunhee Huh, Min-Woo Ko, Gyeong-Gu Kang, Gyu-Hyeong Cho, Hyun-Sik Kim:
A 4.5V-Input 0.3-to-1.7V-Output Step-Down Always-Dual-Path DC-DC Converter Achieving 91.5%-Efficiency with 250mΩ-DCR Inductor for Low-Voltage SoCs. 1-2 - Daisuke Saito, Toshiyuki Kobayashi, Hiroki Koga, Nicolo Ronchi, Kaustuv Banerjee, Yusuke Shuto, Jun Okuno, Kenta Konishi, Luca Di Piazza, Arindam Mallik, Jan Van Houdt, Masanori Tsukamoto, Kazunobu Ohkuri, Taku Umebayashi, Takayuki Ezaki:
Analog In-memory Computing in FeFET-based 1T1R Array for Edge AI Applications. 1-2 - Do-Yeon Yoon, Sonal Pinto, SungWon Chung, Paul Merolla, Thong-Wei Koh, Dongjin Seo:
A 1024-Channel Simultaneous Recording Neural SoC with Stimulation and Real-Time Spike Detection. 1-2 - Shiwei Wang, Marco Ballini, Xiaolin Yang, Chutham Sawigun, Jan-Willem Weijers, Dwaipayan Biswas, Carolina Mora Lopez:
A 77-dB DR 16-Ch 2nd-order Δ-ΔΣ Neural Recording Chip with 0.0077mm2/Ch. 1-2 - Sujin Park, Ji-Hwan Seol, Li Xu, Dennis Sylvester, David T. Blaauw:
A 43nW 32kHz Pulsed Injection TCXO with 4.2ppm Accuracy Using ∆Σ Modulated Load Capacitance. 1-2 - Jahnavi Sharma, Hao Li, Zhe Xuan, Ranjeet Kumar, Chun-Ming Hsu, Meer Sakib, Peicheng Liao, Haisheng Rong, James E. Jaussi, Ganesh Balamurugan:
Silicon Photonic Micro-Ring Modulator-based 4 x 112 Gb/s O-band WDM Transmitter with Ring Photocurrent-based Thermal Control in 28nm CMOS. 1-2 - C. J. Wu, S. T. Hsiao, J. Y. Wang, W. H. Lin, C. W. Chang, T. L. Shao, C. H. Tung, Doug C. H. Yu:
Ultra High Power Cooling Solution for 3D-ICs. 1-2 - Gyeong-Gu Kang, Seok-Tae Koh, Woojin Jang, Jiho Lee, Seongjoo Lee, Ohjo Kwon, Keumdong Jung, Hyun-Sik Kim:
A 12-Bit Mobile OLED/μLED Display Driver IC with Cascaded Loading-Free Capacitive Interpolation DAC and 6.24V/μs-Slew-Rate Buffer Amplifier. 1-2 - Alessandro Novello, Gabriele Atzeni, Giorgio Cristiano, Mathieu Coustans, Taekwang Jang:
A 2.3GHz Fully Integrated DC-DC Converter based on Electromagnetically Coupled Class-D LC Oscillators achieving 78.1% Efficiency in 22nm FDSOI CMOS. 1-2 - Ruiqi Guo, Hao Li, Ruhui Liu, Zhixiao Zhang, Limei Tang, Hao Sun, Leibo Liu, Meng-Fan Chang, Shaojun Wei, Shouyi Yin:
A 6.54-to-26.03 TOPS/W Computing-In-Memory RNN Processor using Input Similarity Optimization and Attention-based Context-breaking with Output Speculation. 1-2 - Cheng Han Wu, Steven Brems, Didit Yudistira, Daire Cott, A. Milenin, Kevin Vandersmissen, A. Maestre, A. Centeno, Joris Van Campenhout, Cedric Huyghebaert, Marianna Pantouvaki:
Graphene electro-absorption modulators integrated at wafer-scale in a CMOS fab. 1-2 - Jian Pang, Zheng Li, Xueting Luo, Joshua Alvin, Kiyoshi Yanagisawa, Yi Zhang, Zixin Chen, Zhongliang Huang, Xiaofan Gu, Weichu Chen, Yun Wang, Dongwon You, Zheng Sun, Yuncheng Zhang, Hongye Huang, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada:
A Fast-Beam-Switching 28-GHz Phased-Array Transceiver Supporting Cross-Polarization Leakage Self-Cancellation. 1-2 - Thomas William Brown, Georgios C. Dogiamis, Yi-Shin Yeh, Diego Correas-Serrano, Triveni S. Rane, Surej Ravikumar, Jessica C. Chou, Vijaya B. Neeli, Jose Mauricio Marulanda, Neelam Prabhu Gaunkar, Cho-Ying Lu, Iwen Huang, Ram Sadhwani, Hyung-Jin Lee, Hariprasad Chandrakumar, Jeffery W. Bates, Zinia Tuli, Qiang Yu, Mario Weiss, Jag Rangaswamy, Carlos F. Nieva, Dimitri Frolov, Telesphor Kamgaing, Ye Seul Nam, Henning Braunisch, Said Rami:
A 50 Gbps 134 GHz 16 QAM 3 m Dielectric Waveguide Transceiver System Implemented in 22nm CMOS. 1-2 - Dai Li, Yan He, Akhil Reddy Pakala, Kaiyuan Yang:
MePLER: A 20.6-pJ Side-Channel-Aware In-Memory CDT Sampler. 1-2 - Phan Dang Hung, Yechan Park, Soon-Jae Kweon, Taeju Lee, Hyuntak Jeon, Seok-Tae Koh, Incheol Cho, Jun-Bo Yoon, Inkyu Park, Chul Kim, Sohmyung Ha, Minkyu Je:
A Self-Powered Wireless Gas Sensor Node Based on Photovoltaic Energy Harvesting. 1-2 - Juhyoung Lee, Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Donghyeon Han, Jinsu Lee, Hoi-Jun Yoo:
OmniDRL: A 29.3 TFLOPS/W Deep Reinforcement Learning Processor with Dualmode Weight Compression and On-chip Sparse Weight Transposer. 1-2 - Keonhee Cho, Heekyung Choi, In Jun Jung, Ji Sang Oh, Tae Woo Oh, Ki-Ryong Kim, Giseok Kim, Taemin Choi, Changsoo Sim, Taejoong Song, Seong-Ook Jung:
SRAM Write- and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased with Technology Scaling. 1-2 - Wei Deng, Zipeng Chen, Haikun Jia, Shiyan Sun, Guopei Chen, Zhihua Wang, Baoyong Chi:
A 11.1-to-14.2 GHz Self-adapted Two-point Modulation Dual-path Type-II Digital PLL Concurrently Achieving 124.7-MHz/μs Chirp Rate and 2.27-GHz Bandwidth. 1-2 - Yongjae Park, Ji-Hyoung Cha, Su-Hyun Han, Jee-Ho Park, Seong-Jin Kim:
A 3.8-μW/Ch, 15-GΩ Total Input Impedance Chopper Stabilized Amplifier with Dual Positive Feedback Loops and Auto-calibration Scheme. 1-2 - Ernest So, Pyungwoo Yeon, E. J. Chichilnisky, Amin Arbabian:
An RF-Ultrasound Relay for Powering Deep Implants Across Air-Tissue Interfaces with a Multi-Output Regulating Rectifier and Ultrasound Beamforming. 1-2 - Zhiping Wang, Mohamed Megahed, Yusang Chun, Tejasvi Anand:
A Machine Learning Inspired Transceiver with ISI-Resilient Data Encoding: Hybrid-Ternary Coding + 2-Tap FFE + CTLE + Feature Extraction and Classification for 44.7dB Channel Loss in 7.3pJ/bit. 1-2 - Ewout Martens, Davide Dermit, Mithlesh Shrivas, Shun Nagata, Jan Craninckx:
A Compact 8-bit, 8 GS/s 8×TI SAR ADC in 16nm with 45dB SNDR and 5 GHz ERBW. 1-2 - Fukashi Morishita, Norihito Kato, Satoshi Okubo, Takao Toi, Mitsuru Hiraki, Sugako Otani, Hideaki Abe, Yuji Shinohara, Hiroyuki Kondo:
A CMOS Image Sensor and an AI Accelerator for Realizing Edge-Computing-Based Surveillance Camera Systems. 1-2 - Suhwan Kim, Harish Krishnamurthy, Sally Amin, Sheldon Weng, Jin Feng, Huong Do, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De:
A 1S Direct-Battery-Attach Integrated Buck Voltage Regulator with 5-Stack Thin-Gate 22nm FinFET CMOS Featuring Active Voltage Balancing and Cascaded Self-Turn-ON Drivers. 1-2 - Sung-Gun Cho, Wei Tang, Chester Liu, Zhengya Zhang:
PETRA: A 22nm 6.97TFLOPS/W AIB-Enabled Configurable Matrix and Convolution Accelerator Integrated with an Intel Stratix 10 FPGA. 1-2 - Ji-Seon Paek, Dongsu Kim, Jae-Yeol Han, Young-Hwan Choo, Jongwoo Lee:
Efficient RF-PA Two-Chip Supply Modulator Architecture for 4G LTE and 5G NR Dual-Connectivity RF Front-End. 1-2 - Sangwoo Lee, Sungsik Park, Yunhong Kim, Youngcheol Chae:
A 0.6V 86.5dB-DR 40kHz-BW Inverter-Based Continuous-Time Delta-Sigma Modulator with PVT-Robust Body-Biasing Technique. 1-2
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