default search action
ISCAS 2002: Scottsdale, Arizona, USA - Volume 4
- Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002. IEEE 2002, ISBN 0-7803-7448-7
- Peyman Arian, Tapio Saramäki, Sanjit K. Mitra:
A systematic technique for optimizing multiple branch FIR filters for sampling rate conversion. 1-4 - Djordje Babic, Jussi Vesma, Tapio Saramäki, Markku Renfors:
Implementation of the transposed Farrow structure. 5-8 - Bojan Vrcelj, P. P. Vaidyanathan:
Fractional biorthogonal partners and application in signal interpolation. 9-12 - P. M. Yiu, S. C. Chan:
Multiplier-less implementation of linear phase cosine modulated filter banks with composite channel number. 13-16 - David B. H. Tay:
Lifting based integer wavelet transform with binary coefficients. 17-20 - T. Gawa, Kenji Taniguchi:
A 50% duty-cycle correction circuit for PLL output. 21-24 - Roland Strandberg, Pietro Andreani, Lars Sundström:
Bandwidth considerations for a CALLUM transmitter architecture. 25-28 - Te-Hsin Huang, Ertan Zencir, Numan Sadi Dogan, Andrea Arvas:
A 22-mW 435-MHz differential CMOS high-gain LNA for subsampling receivers. 29-32 - Ertan Zencir, Numan Sadi Dogan, Ercument Arvas:
A 10-mW 435-MHz differential CMOS LNA for low-IF receivers in space applications. 33-36 - Nicola Massari, Lorenzo Gonzo, Massimo Gottardi, Andrea Simoni:
A monolithic low power pulsed optical encoder. 37-40 - Ingo Hehemann, Werner Brockherde, Arndt Buißmann, Holger Hofmann, Armin Kemna, Rainer Kokozinski, Hartmut Richter, Bedrich J. Hosticka:
A new detector architecture for optical pickup units in DVD systems. 41-44 - Guangbin Zhang, Jin Liu:
A robust edge detector for motion detection. 45-48 - Hwang-Cherng Chow, Yung-Kuo Ho:
New pixel-shared design and split-path readout of CMOS image sensor circuits. 49-52 - Amine Bermak:
A CMOS imager with PFM/PWM based analog-to-digital converter. 53-56 - Albert H. Titus, Anand Gopalan:
A differential summing amplifier for analog VLSI systems. 57-60 - Jouni Riihimäki, Erno Salminen, Kimmo Kuusilinna, Timo Hämäläinen:
Parameter optimization tool for enhancing on-chip network performance. 61-64 - Mikael Kerttu, Per Lindgren, Mitchell A. Thornton, Rolf Drechsler:
Switching activity estimation of finite state machines for low power synthesis. 65-68 - Jacqueline E. Rice, Jon C. Muzio:
Antisymmetries in the realization of Boolean functions. 69-72 - Jaewon Seo, Taewhan Kim:
Memory exploration utilizing scheduling effects in high-level synthesis. 73-76 - J. A. López, Ginés Doménech, R. Ruiz, Tom J. Kazmierski:
Automated high level synthesis of hardware building blocks present in ART-based neural networks, from VHDL-AMS descriptions. 77-80 - Chi Ta Wu, TingTing Hwang:
Instruction buffering for nested loops in low power design. 81-84 - Gaetano Palumbo, Francesco Pappalardo, S. Sannella:
Evaluation on power reduction applying gated clock approaches. 85-88 - Matthias Müller, Andreas Wortmann, Sven Simon, S. Wolter, Steffen Buch, Marek Wróblewski, Josef A. Nossek:
Low power register file architecture for application specific DSPs. 89-92 - Nan-Ying Shen, Oscal T.-C. Chen:
Low-power multipliers by minimizing switching activities of partial products. 93-96 - G. Sinevriotis, Thanos Stouraitis:
A novel list-scheduling algorithm for the low-energy program execution. 97-100 - Seyed Reza Abdollahi, Sayfe Kiaei, Bertan Bakkaloglu, Seid Mehdi Fakhraie, R. Anvari, Seyed Ehsan Abdollahi:
An all-digital programmable digitally-controlled-oscillator (DCO) for digital wireless applications. 101-104 - Jouko Vankka, Jonne Lindeberg, Kari Halonen:
FIR filters for compensating D/A converter frequency response distortion. 105-108 - Ediz Çetin, Izzet Kale, Richard C. S. Morling:
Correction of transmitter gain and phase errors at the receiver. 109-112 - Min-Yi Wang, Robin R.-B. Sheen, Oscal T.-C. Chen, R. Y. J. Tsen:
A dual-band RF front-end for WCDMA and GPS applications. 113-116 - Jussi Ryynänen, Kalle Kivekäs, Jarkko Jussila, Aarno Pärssinen, Kari Halonen:
RF gain control in direct conversion receivers. 117-120 - Jui-Cheng Yen, Jiun-In Guo:
Design of a new signal security system. 121-124 - Venkatesh Krishnan, Wasfy B. Mikhael:
A novel adaptive algorithm applied to a class of redundant representation vector quantizers for waveform and model based coding. 125-128 - Taro Miura, Yoshikazu Fujishiro:
Spectrum management of pulse transmission by high-cut filter line. 129-132 - Keng-Khai Ong, Wei-Hsin Chang, Yi-Chen Tseng, Yew-San Lee, Chen-Yi Lee:
A high throughput context-based adaptive arithmetic codec for JPEG2000. 133-136 - Man Guo, M. Omair Ahmad, M. N. S. Swamy, Chunyan Wang:
An adaptive Viterbi algorithm based on strongly connected trellis decoding. 137-140 - R. Venkatesh Babu, K. R. Ramakrishnan:
Content-based video retrieval using motion descriptors extracted from compressed domain. 141-144 - Feng Jing, Mingjing Li, HongJiang Zhang, Bo Zhang:
Region-based relevance feedback in image retrieval. 145-148 - Tianming Liu, Hong-Jiang Zhang, Feihu Qi:
A novel video key frame extraction algorithm. 149-152 - Gamal Fahmy, Sethuraman Panchanathan:
A lifting based system for optimal compression and classification in the JPEG2000 framework. 153-156 - Wen-Nung Lie, Wen-Hung Peng, Cheng-Hung Chuang:
Efficient content-based CT brain image retrieval by using region shape features. 157-160 - Dávid Bálya, Csaba Rekeczky, Tamás Roska:
A realistic mammalian retinal model implemented on complex cell CNN universal machine. 161-164 - Paolo Arena, Holk Cruse, Luigi Fortuna, Mattia Frasca, Luca Patané:
A cellular nonlinear approach to decentralized locomotion control of the stick insect. 165-168 - S. Purushothaman, Christofer Toumazou, Julius Georgiou:
Towards fast solid state DNA sequencing. 169-172 - Daryl R. Kipke, David S. Pellinen, Rio J. Vetter:
Advanced neural implants using thin-film polymers. 173-176 - Ronald Tetzlaff, D. Weiss:
Cellular neural networks for the anticipation of epileptic seizures. 177-180 - Radu M. Secareanu, Bill Peterson, D. Hartman:
A low-voltage low-noise digital buffer system. 181-184 - Fernando Mendoza-Hernandez, Mónico Linares Aranda, Víctor H. Champac, Alejandro Díaz-Sánchez:
A new technique for noise-tolerant pipelined dynamic digital circuits. 185-188 - Qinwei Xu, Pinaki Mazumder, Li Ding:
Novel macromodeling for on-chip RC/RLC interconnects. 189-192 - Dinesh Pamunuwa, Li-Rong Zheng, Hannu Tenhunen:
Optimising bandwidth over deep sub-micron interconnect. 193-196 - Masud H. Chowdhury, Yehea I. Ismail, Chandramouli V. Kashyap, Byron Krauter:
Performance analysis of deep sub micron VLSI circuits in the presence of self and mutual inductance. 197-200 - Ming-Hsiu Lai, Ming-Feng Yu, Sau-Gee Chen:
An efficient modified Phong shading algorithm & its low-complexity realization. 201-204 - Fan Xu, Guichang Zhong, D. D. Richard III, Alan N. Willson Jr.:
A ring-processor based blind beamformer design for use in wireless sensor networks. 205-208 - Shin-Hong Ou, Chi-Sheng Lin, Bin-Da Liu:
A scalable sorting architecture based on maskable WTA/MAX circuit. 209-212 - Meng-Da Yang, An-Yeu Wu:
A new pipelined adaptive DFE architecture with improved convergence rate. 213-216 - Chi-Sheng Lin, Bin-Da Liu:
Design of a pipelined and expandable sorting architecture with simple control scheme. 217-220 - Kong-Pang Pun, Chiu-sing Choy, Cheong-Fat Chan, José E. Franca:
A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators. 221-224 - Maurits Ortmanns, Lourans Samid, Yiannos Manoli, Friedel Gerfers:
Multirate cascaded continuous time Sigma-Delta modulators. 225-228 - Hassan Aboushady, Marie-Minerve Louërat:
Systematic approach for discrete-time to continuous-time transformation of Sigma-Delta modulators. 229-232 - Friedel Gerfers, Kian Min Soh, Maurits Ortmanns, Yiannos Manoli:
Figure of merit based design strategy for low-power continuous-time Sigma-Delta modulators. 233-236 - Martin Vogels, Kenneth Francken, Ewout Martens, Georges G. E. Gielen:
Efficient time-domain simulation of continuous-time Delta-Sigma A/D converters using analytical integration. 237-240 - Drazen Jurisic, George S. Moschytz, Neven Mijat:
Low-sensitivity active-RC high- and band-pass second-order Sallen & Key allpole filters. 241-244 - Yigang He, Jinguang Jiang, Yichuang Sun:
CMOS R-MOSFET-C fourth-order Bessel filter with accurate group delay. 245-248 - A. Hassan, K. Sharaf, H. El-Ghitani, H. F. Ragaie:
A new low power transconductor for Gm-C filters. 249-252 - J. Lee, Khaled Hayatleh, F. J. Lidgey, J. Drew:
Tuneable linear transconductance cell for Gm-C filter applications. 253-256 - Saeid Mehrmanesh, Seyed Mojtaba Atarodi:
A high dynamic range CMOS variable gain filter for ADSL. 257-260 - Julian A. Bragg, Edgar A. Brown, Paul E. Hasler, Stephen P. DeWeerth:
A silicon model of an adapting motoneuron. 261-264 - Kee-Chee Tiew, J. Cusey, Randall L. Geiger:
A curvature compensation technique for bandgap voltage references using adaptive reference temperature. 265-268 - Anthony Chan Carusone, David A. Johns:
Analog filter adaptation using a dithered linear search algorithm. 269-272 - N. Prasad, Huseyin Dinc, Aydin I. Karsilayan:
An adaptive analog video line driver with impedance matching based on peak detection. 273-276 - Xiaohong Sun, Kenneth R. Laker:
Tonal behavior analysis of an adaptive second-order sigma-delta modulator. 277-280 - Paolo Arena, Claudia Bonomo, Luigi Fortuna, Mattia Frasca:
Electro-active polymers as CNN actuators for locomotion control. 281-284 - Salvatore Baglio, Salvatore Castorina, Luigi Fortuna, Nicolò Savalli:
Development of autonomous, mobile micro-electro-mechanical devices. 285-288 - David W. Fogliatti:
Interconnected resonant gyros for improved performance. 289-292 - Juan A. Acebrón, Adi R. Bulsara, W.-J. Rappel:
Noise-mediated cooperative behavior in a system of coupled DC SQUIDs. 293-296 - Luigi G. Occhipinti, Luigi Fortuna:
Organic molecules and composites with applications in micro and nanoelectronic systems. 297-300 - Joseph D. Neff, Brian K. Meadows, Edgar A. Brown, Stephen P. DeWeerth, Paul E. Hasler:
A CMOS coupled nonlinear oscillator array. 301-304 - Mandana Amiri, Andreas G. Veneris, Ivor Ting:
Design rewiring for power minimization [logic design]. 305-308 - Payam Heydari:
Energy dissipation modeling of lossy transmission lines driven by CMOS inverters. 309-312 - Athanasios Kakarountas, Kyriakos Papadomanolakis, Spiridon Nikolaidis, Dimitrios Soudris, Constantinos E. Goutis:
Confronting violations of the TSCG(T) in low-power design. 313-316 - Omar Wing, Tan Jun, Jinmei Lai, Junyan Ren, Qianling Zhang:
Iterative solution of ODE-PDE-AE systems for RF circuit simulation. 317-320 - Yoonseo Choi, Taewhan Kim:
An efficient low-power binding algorithm in high-level synthesis. 321-324 - Shailesh Ramamurthy, Sanjeev Madhavankutty, V. Meena, Rajesh Gupta:
JPEG-2000 on an advanced architecture, multiple execution unit DSP. 325-328 - Hong-Hui Chen, Chung-Jr Lian, Te-Hao Chang, Liang-Gee Chen:
Analysis of EBCOT decoding algorithm and its VLSI implementation for JPEG 2000. 329-332 - Takahiko Masuzaki, Hiroshi Tsutsui, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura:
JPEG2000 adaptive rate control for embedded systems. 333-336 - Chunjiang J. Duanmu, M. Omair Ahmad, M. N. S. Swamy, Ali M. Shatnawi:
A vector based fast block motion estimation algorithm for implementation on SIMD architectures. 337-340 - Shao-Yi Chien, Yu-Wen Huang, Liang-Gee Chen:
A hardware accelerator for video segmentation using programmable morphology PE array. 341-344 - Tanes Tanitteerapan, Shinsaku Mori:
Simplified input current waveshaping technique by using inductor voltage sensing for power factor correction isolated Sepic rectifier. 345-348 - Mario Ponce, Arturo J. Martínez, Javier Correa, Jaime Arau:
Evaluation of an improved input current shaper used as power factor corrector in electronic ballast. 349-352 - Bor-Ren Lin, Tsung-Liang Hung:
A single-phase three-level boost type rectifier. 353-356 - Rafael Ramos, Domingo Biel, Francesc Guinjoan, Enric Fossas:
Design considerations in sliding-mode controlled parallel-connected inverters. 357-360 - Tadashi Suetsugu, Marian K. Kazimierczuk:
Voltage-clamped class E amplifier with a Zener diode across the switch. 361-364 - Xiaojuan Hu, Linda DeBrunner, Victor E. DeBrunner:
An efficient design for FIR filters with variable precision. 365-368 - Sungwook Kim, Gerald E. Sobelman:
Efficient digit-serial FIR filters with skew-tolerant domino. 369-372 - Tughrul Arslan, Ahmet T. Erdogan:
Low power implementation of high throughput FIR filters. 373-376 - Kimmo Lasanen, Elvi Räisänen-Ruotsalainen, Juha Kostamovaara:
A 1-V, self adjusting, 5-MHz CMOS RC-oscillator. 377-380 - Y. Cheng, Krzysztof Czuba, G. Kompa:
K-band phase locked hair-pin oscillator. 381-384 - Honghao Ji, R. W. Newcomb:
A structurally stable realization for Jacobi elliptic functions. 385-388 - Lixin Yang, Yijun Zhou, Jiren Yuan:
A non-feedback multiphase clock generator. 389-392 - Nathen Barton, Dicle Özis, Terri S. Fiez, Kartikeya Mayaram:
Analysis of jitter in ring oscillators due to deterministic noise. 393-396 - Fikret Dülger, Edgar Sánchez-Sinencio:
Design trade-offs of a symmetric linearized CMOS LC VCO. 397-400 - Robin R.-B. Sheen, Oscal T.-C. Chen, Zheng-Dao Lee:
A high-performance CMOS multiphase voltage-controlled oscillator for communication systems. 401-404 - M. Nakamura, Toshimasa Matsuoka, Kenji Taniguchi:
CMOS phase-shift VCO for short-range wireless communication. 405-408 - N. Seshan, J. Rajagopalan, Kartikeya Mayaram:
Design of low power 2.4 GHz CMOS LC oscillators with low phase-noise and large tuning range. 409-412 - Günter Ritzberger, Josef Böck, Herbert Knapp, Ludwig Treitinger, Arpad L. Scholtz:
38 GHz low-power static frequency divider in SiGe bipolar technology. 413-416 - David B. H. Tay, Saman S. Abeysekera:
Design of variable Laguerre filters. 417-420 - Chien-Cheng Tseng:
Design of variable fractional delay FIR filter using differentiator bank. 421-424 - Khaled Benkrid, Danny Crookes, Abdsamad Benkrid:
Design and implementation of a novel algorithm for general purpose median filtering on FPGAs. 425-428 - Jean-Jacques Fuchs, Bernard Delyon:
Min-max interpolators and Lagrange interpolation formula. 429-432 - Richard C. S. Morling, Izzet Kale:
Dynamic range of allpass filter structures. 433-436 - Sangwook Kim, E. Greeneich:
Body effect compensated switch for low voltage switched-capacitor circuits. 437-440 - Seng-Pan U., Rui Paulo Martins, José E. Franca:
Design and analysis of low timing-skew clock generation for time-interleaved sampled-data systems. 441-444 - Omid Oliaei:
Noise analysis of correlated double sampling SC-integrators. 445-448 - Jozef Adut, José Silva-Martínez:
A high-Q, switched-capacitor filter with reduced capacitance spread using a randomized nonuniform sampling technique. 449-452 - Apisak Worapishet, R. Sitdhikorn, John B. Hughes:
Low-power complex channel filtering using cascoded class AB switched-currents. 453-456 - Daisuke Takafuji, Satoshi Taoka, Toshimasa Watanabe:
Efficient approximation algorithms for the maximum weight matching problem. 457-460 - Shigeyoshi Kawarai:
Exact discretization of differential equations by s-z transform. 461-464 - Alexander Zemliak:
On start point selection for the time-optimal system design algorithm. 465-468 - Arasch Honarbacht, Fritz Boschen, Anton Kummert, N. Harle:
Synchronization of distributed simulations-a Kalman filter approach. 469-472 - Tuomas Valtonen, Tero Nurmi, Jouni Isoaho, Hannu Tenhunen:
Interconnection of autonomous error-tolerant cells. 473-476 - Salvatore Pontarelli, Gian Carlo Cardarilli, A. Leandri, Marco Ottavi, Marco Re, Adelio Salsano:
A self-checking cell logic block for fault tolerant FPGAs. 477-480