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ORCIDISCAS 2005: Kobe, Japan - Volume 1
- International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. IEEE 2005, ISBN 0-7803-8834-8
- Aditya Bansal, Kaushik Roy:
Asymmetric halo CMOSFET to reduce static power dissipation with improved performance. 1-4 - Maurice Meijer, Francesco Pessolano, José Pineda de Gyvez:
Limits to performance spread tuning using adaptive voltage and body biasing. 5-8 - James W. Tschanz, Siva G. Narendra, Ali Keshavarzi, Vivek De:
Adaptive circuit techniques to minimize variation impacts on microprocessor performance and power. 9-12 - Kiyotaka Imai, Yasushi Yamagata, Sadaaki Masuoka, Naohiko Kimuzuka, Yuri Yasuda, Mitsuhiro Togo
, Masahiro Ikeda, Yasutaka Nakashiba:
Device technology for body biasing scheme. 13-16 - Masayuki Miyazaki, Goichi Ono, Takayuki Kawahara:
Optimum threshold-voltage tuning for low-power, high-performance microprocessor. 17-20 - Ruchir Puri, David S. Kung, Leon Stok:
Minimizing power with flexible voltage islands. 21-24 - Yasuyuki Hatakawa, Shingo Yoshizawa, Yoshikazu Miyanaga:
Robust VLSI architecture for system-on-chip design and its implementation in Viterbi decoder. 25-28 - Mahmoud Elassal, Ashok Kumar, Magdy A. Bayoumi:
A systematic framework for high throughput MAP decoder VLSI architectures. 29-32 - Saman S. Abeysekera, Charoensak Charayaphan:
System on chip FPGA design of an FM demodulator using a Kalman band-pass sigma-delta architecture. 33-36 - Sujan Pandey, Heiko Zimmer, Manfred Glesner, Max Mühlhäuser:
High level hardware/software communication estimation in shared memory architecture. 37-40 - Yutian Zhao, Ahmet T. Erdogan, Tughrul Arslan:
A novel low-power reconfigurable FFT processor. 41-44 - Bradley R. Quinton, Steven J. E. Wilton:
Concentrator access networks for programmable logic cores on SoCs. 45-48 - Maria-Gabriella Di Benedetto, Guerino Giancola:
A collision-based model for multi user interference in impulse radio UWB networks. 49-52 - Luca Reggiani, Gian Mario Maggio:
On the acquisition time for serial and parallel code search in UWB impulse radio. 53-56 - Chun Yi Lee, Christofer Toumazou:
Ultra-low power UWB for real time biomedical wireless sensing. 57-60 - Won Namgoong, Lei Feng:
Digitizing of UWB signals based on frequency channelization. 61-64 - Sang-Min Kim, Jun Tang, Keshab K. Parhi:
Quasi-cyclic low-density parity-check coded multi-band-OFDM UWB systems. 65-68 - Yajuan He, Chip-Hong Chang, Jiangmin Gu, Hossam A. H. Fahmy:
A novel covalent redundant binary Booth encoder. 69-72 - Niichi Itoh, Yasumasa Tsukamoto, Takeshi Shibagaki, Koji Nii, Hidehiro Takata, Hiroshi Makino:
A 32×24-bit multiplier-accumulator with advanced rectangular styled Wallace-tree structure. 73-76 - Jin-Fu Li, Jiunn-Der Yu, Yu-Jen Huang:
A design methodology for hybrid carry-lookahead/carry-select adders with reconfigurability. 77-80 - Min-An Song, Lan-Da Van, Chih-Chyau Yang, Shih-Chieh Chiu, Sy-Yen Kuo:
A framework for the design of error-aware power-efficient fixed-width Booth multipliers. 81-84 - Chip-Hong Chang, Ravi Kumar Satzoda, Swaminathan Sekar:
A novel multiplexer based truncated array multiplier. 85-88 - James E. Stine, Michael J. Schulte:
A combined two's complement and floating-point comparator. 89-92 - Yici Cai, Yibo Wang, Xianlong Hong:
A global interconnect optimization algorithm under accurate delay model using solution space smoothing. 93-96 - Yiqian Zhang, Xianlong Hong, Yici Cai:
An efficient algorithm for buffered routing tree construction under fixed buffer locations with accurate delay models. 97-100 - Xinjie Wei, Yici Cai, Xianlong Hong:
Zero skew clock routing with tree topology construction using simulated annealing method. 101-104 - Hao Yu, Lei He:
A sparsified vector potential equivalent circuit model for massively coupled interconnects. 105-108 - Shanq-Jang Ruan, Edwin Naroska, Uwe Schwiegelshohn:
An efficient algorithm for simultaneous wire permutation, inversion, and spacing. 109-112 - Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng:
Power-optimal simultaneous buffer insertion/sizing and uniform wire sizing for single long wires. 113-116 - Alberto Saiz-Vela, Pedro Lluís Miribel-Català, Manel Puig-Vidal, Josep Samitier:
An electron mobility independent pulse skipping regulator for a programmable CMOS charge pump. 117-120 - Chiara Boffino, Alessandro Cabrini, Osama Khouri, Guido Torelli:
High-efficiency control structure for CMOS flash memory charge pumps. 121-124 - Mark Hooper, Matt Kucic, Paul E. Hasler:
Integration of high voltage charge-pumps in a submicron standard CMOS process for programming analog floating-gate circuits. 125-128 - Heng-Ming Hsu, Tai-Hsing Lee:
Optimum quiescent point of integrated power CMOS transistor for wireless portable applications. 129-132 - Mohammad R. Hoque, T. Ahmad, Todd R. McNutt, H. Alan Mantooth, Mohammad M. Mojarradi:
Design technique of an on-chip, high-voltage charge pump in SOI. 133-136 - Eugenio Culurciello, Philippe O. Pouliquen, Andreas G. Andreou, Kim Strohbehn, Steven E. Jaskulek:
A monolithic isolation amplifier in silicon-on-insulator CMOS. 137-140 - Raimon Casanova, Junajo Lacort, Ángel Dieguez, Anna Arbat, Manel Puig, Josep Samitier, Marc Nierlich, Oliver Steinmetz, Oliver Scholz:
A specific integrated controller for nanomicroscopy and cellular manipulation. 141-144 - Chris Clarke, John Taylor, Robert Rieger, Nick Donaldson:
A distributed neural signal sensor system. 145-148 - Jierong Cheng, Say Wei Foo, Shankar M. Krishnan:
Automatic detection of region of interest and center point of left ventricle using watershed segmentation. 149-151 - Chin-Teng Lin, Yu-Chieh Chen, Ruei-Cheng Wu, Sheng-Fu Liang, Teng-Yi Huang:
Assessment of driver's driving performance and alertness using EEG-based fuzzy neural networks. 152-155 - Sheng-Fu Liang, Chin-Teng Lin, Ruei-Cheng Wu, Teng-Yi Huang, Wen-Hung Chao:
Classification of driver's cognitive responses from EEG analysis. 156-159 - Takehiro Ito, Xiao Zhou, Takao Nishizeki:
Partitioning graphs of supply and demand. 160-163 - Krishnaiyan Thulasiraman, Ying Xiao, Guoliang Xue:
Advances in QoS path(s) selection problem. 164-167 - Tomiyuki Fukunaga, Qi-Wei Ge, Mitsuru Nakata:
On generating elementary T-invariants of Petri nets by linear programming. 168-171 - Daisuke Takafuji, Toshimasa Watanabe:
Hierarchical extraction of a spanning planar subgraph maintaining clockwise directedness of cycles. 172-175 - Hiroshi Tamura, Futoshi Tasaki, Masakazu Sengoku, Shoji Shinoda:
Scheduling problems for a class of parallel distributed systems. 176-179 - Satoshi Tayu, Patrik Hurtig, Yoshiyasu Horikawa, Shuichi Ueno:
On the three-dimensional channel routing. 180-183 - Brian P. Ginsburg, Anantha P. Chandrakasan:
An energy-efficient charge recycling approach for a SAR converter with capacitive DAC. 184-187 - Harri Lampinen, Pauli Perälä, Olli Vainio:
Novel successive-approximation algorithms. 188-191 - Takeshi Yoshida, Miho Akagi, Mamoru Sasaki, Atsushi Iwata:
A 1V supply successive approximation ADC with rail-to-rail input voltage range. 192-195 - David Marche, Yves Gagnon, Yvon Savaria:
. A new switch compensation technique for inverted R-2R ladder DACs. 196-199 - Hamid Movahedian, Mehrdad Sharif Bakhtiar:
A new offset cancellation technique for folding ADC. 200-203 - Tomás Lahoz, Enrique Barajas, José Luis González:
Characterization and noise analysis of a 12-bit current steering digital-to-analog converter. 204-207 - Belén Calvo, Maria Teresa Sanz, Santiago Celma:
High linear digitally programmable gain amplifier. 208-211 - Chih-Yun Liu, Yi-Jan Emery Chen, Deuk Hyoun Heo:
Impact of bias schemes on Doherty power amplifiers. 212-215 - Mikko Loikkanen, Juha Kostamovaara:
High current CMOS operational amplifier. 216-219 - Yasutaka Haga, Hashem Zare-Hoseini, Laurence Berkovi, Izzet Kale:
Design of a 0.8 Volt fully differential CMOS OTA using the bulk-driven technique. 220-223 - Tong Ge, Meng Tong Tan, Joseph Sylvester Chang:
Design and analysis of a micropower low-voltage bang-bang control class D amplifier. 224-227 - Christian Falconi, Giuliano Guarino, Arnaldo D'Amico:
Op amp tuning for high accuracy deep sub-micron CMOS analog circuits [voltage regulator example]. 228-231 - Jeffrey Harrison:
Formal synthesis of circuits using linear matrix inequalities. 232-235 - Antônio Carlos M. de Queiroz:
Multiple resonance networks with incomplete energy transfer and operating with zero-state response. 236-239 - Kai-Sheng Lu, Xiao-Yu Feng, Guo-Zhang Gao:
The separability, reducibility and controllability of RLCM networks over F(z). 240-243 - David G. Haigh, Paul M. Radmore:
Symbolic passive-RC circuit synthesis by admittance matrix expansion. 244-247 - David G. Haigh:
Symbolic active-RC circuit synthesis by admittance matrix expansion. 248-251 - Rogelio Palomera-Garcia:
Generation of equivalent circuits by FTFN relocation. 252-255 - Mitsuji Muneyasu, Osamu Hisayasu, Kensaku Fujii, Takao Hinamoto:
An active noise control system based on simultaneous equations method without auxiliary filters. 256-259 - Yegui Xiao, Liying Ma, Khashayar Khorasani, Akira Ikuta, Li Xu:
A filtered-X RLS based narrowband active noise control system in the presence of frequency mismatch. 260-263 - Muhammad Tahir Akhtar, Masahide Abe, Masayuki Kawamata:
A method for online secondary path modeling in active noise control systems. 264-267 - Say Wei Foo, T. N. Senthilkumar, C. Averty:
Active noise cancellation headset. 268-271 - Naoto Sasaoka, Keisuke Sumi, Yoshio Itoh, Kensaku Fujii:
A new noise reduction system based on ALE and noise reconstruction filter. 272-275 - Woon S. Gan, Sen M. Kuo, Jin Wei Feng:
Adaptive noise equalizer with equal-loudness compensation. 276-279 - Xiang Li, Hildegard Meyer-Ortmanns, Xiaofan Wang:
Chaotic and periodic spreading dynamics in discrete small-world networks. 280-283 - Zhengping Fan, Guanrong Chen:
Pinning control of scale-free complex networks. 284-287 - Chunguang Li, Jin-Qing Fang:
On-off intermittency in small-world networks of chaotic maps. 288-291 - Chai Wah Wu:
Agreement and consensus problems in groups of autonomous agents with linear dynamics. 292-295 - Maide Bucolo, Francesca Conti, Luigi Fortuna, Mattia Frasca:
3D dynamical networks to emulate complex neural phenomena. 296-299 - Jinhu Lu, Henry Leung:
Synchronization: a fundamental phenomenon in complex dynamical networks. 300-303 - Debing Liu, Yuwen He, Shipeng Li, Qingming Huang, Wen Gao:
Linear transform based motion compensated prediction for luminance intensity changes. 304-307 - Changsung Kim, C.-C. Jay Kuo:
A feature-based approach to fast H.264 intra/inter mode decision. 308-311 - Hongtao Yu, Zhiping Lin, Feng Pan:
An improved rate control algorithm for H.264. 312-315 - Cixun Zhang, Jian Lou, Lu Yu, Jie Dong, Wai-kuen Cham:
The technique of pre-scaled integer transform. 316-319 - Panos Nasiopoulos, Lino Coria-Mendoza, Hassan Mansour, Adarsh Golikeri:
An improved error concealment algorithm for intra-frames in H.264/AVC. 320-323 - Thomas Wedi, Stefan Wittmann:
Quantization offsets for video coding. 324-327 - Meng-Guang Tsai, Kuen-Suey Hou, Hen-Wai Tsao:
Iterative tri-stage decoding for turbo codes in partial response channels. 328-331 - Matthieu Arzel, Cyril Lahuec, Fabrice Seguin, David Gnaedig, Michel Jézéquel:
. Analog slice turbo decoding. 332-335 - Stephen Bates, Gary Block:
A memory-based architecture for FPGA implementations of low-density parity-check convolutional decoders. 336-339 - Qingsheng Hu, Zhigong Wang, Jun Zhang, Jie Xiao:
Low complexity parallel Chien search architecture for RS decoder. 340-343 - Matthias Kamuf, John B. Anderson, Viktor Öwall:
Area and power efficient trellis computational blocks in 0.13µm CMOS. 344-347 - Rajendra S. Katti, Xiaoyu Ruan:
S-code: new distance-3 MDS array codes. 348-351 - A. Prasad Vinod, Edmund Ming-Kit Lai:
Design of low complexity high-speed pulse-shaping IIR filters for mobile communication receivers. 352-355 - Chua-Chin Wang, Ching-Li Lee, Li-Ping Lin, Yih-Long Tseng:
Wideband 70dB CMOS digital variable gain amplifier design for DVB-T receiver's AGC. 356-359 - Yumi Takizawa, Cindy Bernadeth Tjitrosoewarno, Atsushi Fukasawa:
Multi-user receiver using conjugate gradient method for wideband CDMA. 360-363 - Lucian-Vasile Stoica, Sakari Tiuraniemi, Heikki Repo, Ian Oppermann:
An ultra wideband low complexity circuit transceiver architecture for sensor networks. 364-367 - Hua-Chin Lee, Chien-Chih Lin, Chia-Hsin Wu, Shen-Iuan Liu, Chorng-Kuang Wang, Hen-Wai Tsao:
A 15 mW 69 dB 2 Gsamples/s CMOS analog front-end for low-band UWB applications. 368-371 - Ehab Shoukry, Madeleine Mony, David V. Plant:
Design of a fully integrated array of high-voltage digital-to-analog converters. 372-375 - Lin Jia, Jianguo Ma, Kiat Seng Yeo, Manh Anh Do:
A novel methodology for the design of LC tank VCO with low phase noise. 376-379 - Yuan Yao, Yin Shi, Foster F. Dai:
A novel low-power input-independent MOS AC/DC charge pump. 380-383 - Zhiqiang Gao, Jianguo Ma, Yizheng Ye, Mingyan Yu:
Large tuning band range of high frequency filter for wireless applications. 384-387 - Nicola Ghittori, Andrea Vigna, Piero Malcovati, Stefano D'Amico, Andrea Baschirotto:
Behavioral analysis and dimensioning of UMTS transmitters baseband blocks. 388-391 - Ka-Hou Ao Ieong, Chong-Yin Fok, Pui-In Mak, Seng-Pan U., Rui Paulo Martins:
A frequency up-conversion and two-step channel selection embedded CMOS D/A interface. 392-395 - Jiangnan Yan, Yuanjin Zheng, Yong Ping Xu:
A novel DC-offset cancelling circuit for DCR. 396-399 - Chiara Ghidini, J. G. Aranda, Danilo Gerna, K. Kelliher, Christoph Baumhof:
A digitally programmable on-chip RC-oscillator in 0.25µm CMOS logic process. 400-403 - Si-Weng Fok, Phillip Ngai Cheong, Kam-Weng Tam, Rui Paulo Martins:
A novel microstrip bandpass filter design using asymmetric parallel coupled-line. 404-407 - Yongru Gu, Keshab K. Parhi:
Pipelining Tomlinson-Harashima precoders. 408-411 - Sebastián López, Félix Tobajas, A. Villar, V. de Armas, José Francisco López, Roberto Sarmiento:
Low cost efficient architecture for H.264 motion estimation. 412-415 - Javier A. Salcedo, Juin J. Liou, Muhammad Yaqub Afridi, Allen R. Hefner:
Novel electrostatic discharge protection structure for a monolithic gas sensor systems-on-a-chip. 416-419 - Wai-Chi Fang, C. Le, S. Taft:
On-board fault-tolerant SAR processor for spaceborne imaging radar systems. 420-423 - Arash Hooshmand, Saeed Shamshiri, Mohammad Alisafaee, Bijan Alizadeh, Pejman Lotfi-Kamran, Mostafa Naderi, Zainalabedin Navabi:
Binary Taylor diagrams: an efficient implementation of Taylor expansion diagrams. 424-427 - Rodrigo Ferrugem Cardoso, Márcio Eduardo Kreutz, Luigi Carro, Altamiro Amadeu Susin:
Design space exploration on heterogeneous network-on-chip. 428-431 - Yeong-Kang Lai, Chih-Chung Chou, Yu-Chieh Chung:
A simple and cost effective video encoder with memory-reducing CAVLC. 432-435 - Xuequn Li, Haleh Vahedi, Radu Muresan, Stefano Gregori:
An integrated current flattening module for embedded cryptosystems. 436-439 - Nam-Seog Kim, Uk-Rae Cho, Hyun-Geun Byun:
A pseudo-differential CMOS receiver insensitive to input common mode level. 440-443 - Chung-Hsien Hua, Wei Hwang, Chih-Kai Chen:
Noise-tolerant XOR-based conditional keeper for high fan-in dynamic circuits. 444-447 - Francesco Centurelli, G. Lulli, Piero Marietti, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti:
High-speed CMOS-to-ECL pad driver in 0.18µm CMOS. 448-451 - Toshiro Akino, Kei Matsuura, Akiyoshi Yasunaga:
A high-speed domino CMOS full adder driven by a new unified-BiCMOS inverter. 452-455 - Meigen Shen, Li-Rong Zheng, Esa Tjukanoff, Jouni Isoaho, Hannu Tenhunen:
Case study of interconnect analysis for standing wave oscillator design. 456-459 - Johan Lambie, Francesc Moll Echeto, José Luis González, Antonio Rubio:
Asynchronous pulse logic cell for threshold logic and Boolean networks. 460-463 - Volkan Kursun, Gerhard Schrom, Vivek De, Eby G. Friedman, Siva G. Narendra:
Cascode buffer for monolithic voltage conversion operating at high input supply voltages. 464-467