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ISCAS 2009: Taipei, Taiwan
- International Symposium on Circuits and Systems (ISCAS 2009), 24-17 May 2009, Taipei, Taiwan. IEEE 2009, ISBN 978-1-4244-3827-3
- Dongsuk Shin, Jabeom Koo, Won-Joo Yun, Young-Jung Choi, Chulwoo Kim:
A Fast-lock Synchronous Multi-phase Clock Generator based on a Time-to-digital Converter. 1-4 - Ken Ueno, Tetsuya Asai, Yoshihito Amemiya:
Low-power Clock Reference Circuit for Intermittent Operation of Subthreshold LSIs. 5-8 - Sachin Dileep Dasnurkar, Jacob A. Abraham:
Hybrid BiST Solution for Analog to Digital Converters with Low-cost Automatic Test Equipment Compatibility. 9-12 - Jingbo Duan, Degang Chen, Randall L. Geiger:
Cost Effective Signal Generators for ADC BIST. 13-16 - Ricky Yiu-kee Choi, Chi-Ying Tsui:
A Low Energy Two-step Successive Approximation Algorithm for ADC Design. 17-20 - Abbas Shahmoradi, Massoud Masoumi:
A New and Efficient Approach for High-speed and Very Compact Realization of Secure Hash Algorithm. 21-24 - Wen-Ching Lin, Ming-Der Shieh, Chien-Ming Wu:
Flexible GF(2m) Divider Design for Cryptographic Applications. 25-28 - Aijiao Cui, Chip-Hong Chang:
An Improved Publicly Detectable Watermarking Scheme based on Scan Chain Ordering. 29-32 - Dimpesh Patel, Mahdi Shabany, P. Glenn Gulak:
A Low-complexity High-speed QR Decomposition Implementation for MIMO Receivers. 33-36 - Qiuling Zhu, Chun Zhang, Zhongqi Liu, Jingchao Wang, Fule Li, Zhihua Wang:
A Robust Radio Frequency Identification System Enhanced with Spread Spectrum Technique. 37-40 - W. Vincent Kuang, Jim S. Wight:
1-bit Digital Tuning of Continuous-time Filter by the Use of Unstable Sigma-delta Modulation. 41-44 - Drazen Jurisic, Neven Mijat, George S. Moschytz:
Tuning Elliptic Filters with a 'Tuning Biquad'. 45-48 - Markus Robens, Ralf Wunderlich, Stefan Heinen:
Capacitive Crosscoupling Biquad Polyphase Filter. 49-52 - Nitin Krishnapura, Varun Gupta, Nagendra Agrawal:
Compact Lowpass Ladder Filters using Tapped Coils. 53-56 - Eman A. Soliman, Soliman A. Mahmoud:
New CMOS Fully Differential Current Conveyor and its Application in Realizing Sixth Order Complex Filter. 57-60 - David Wolpert, Hiroshi Irie, Roman Sobolewski, Paul Ampadu, Quentin Diduck, Martin Margala:
Ballistic Deflection Transistors and the Emerging Nanoscale Era. 61-64 - SangBum Kim, Yuan Zhang, Byoungil Lee, Marissa Caldwell, H.-S. Philip Wong:
Fabrication and Characterization of Emerging Nanoscale Memory. 65-68 - Mircea R. Stan, Dincer Unluer, Avik W. Ghosh, Frank Tseng:
Graphene Devices, Interconnect and Circuits - Challenges and Opportunities. 69-72 - Shinobu Fujita, Keiko Abe, Kumiko Nomura, Shinichi Yasuda, Tetsufumi Tanamoto:
Perspectives and Issues in 3D-IC from Designers' Point of View. 73-76 - Shidhartha Das, David T. Blaauw:
Adaptive Design for Nanometer Technology. 77-80 - Wu-Sheng Lu, Takao Hinamoto:
Direct Design of Orthogonal Filter Banks and Wavelets. 81-84 - G. M. Shi, L. L. Liang, X. M. Xie:
Design of Nonsubsampled Directional Filter Banks with Arbitrary Number of Channels. 85-88 - Amir Eghbali, Håkan Johansson, Per Löwenborg:
On the Filter Design for a Class of Multimode Transmultiplexers. 89-92
Date: 24-27 May 2009
- Pei-Yu Chen, Lan-Da Van, Hari C. Reddy, Chin-Teng Lin:
A New VLSI 2-D Fourfold-rotational-symmetry Filter Architecture Design. 93-96 - Matthew Marbach, Russell Ondusko, Ravi Prakash Ramachandran, Linda M. Head:
Neural Network Classifiers and Principal Component Analysis for Blind Signal to Noise Ratio Estimation of Speech Signals. 97-100 - Ismail Uysal, John G. Harris:
Biologically Plausible Speech Recognition using Spike-based Phase Locking Cues. 101-104 - Yan Yin, Hui Jiang:
Second Order Cone Programming (SOCP) Relaxations for Large Margin HMMs in Speech Recognition. 105-108 - Theodore Yu, Andrew Schwartz, John G. Harris, Malcolm Slaney, Shih-Chii Liu:
Periodicity Detection and Localization using Spike Timing from the AER EAR. 109-112 - Amin Fazel, Shantanu Chakrabartty:
Non-linear Filtering in Reproducing Kernel Hilbert Spaces for Noise-robust Speaker Verification. 113-116 - Yu Wang, Lap-Pui Chau, Kim-Hui Yap:
Broadcast of Scalable Video over Wireless Networks. 117-120 - Yeong-Luh Ueng, Yu-Lun Wang, Chi-Yu Lin, Jen-Yuan Hsu, Pangan Ting:
Modified Layered Message Passing Decoding with Dynamic Scheduling and Early Termination for QC-LDPC Codes. 121-124 - Chaminda T. E. R. Hewage, Zaheer Ahmad, Stewart Worrall, Safak Dogan, Warnakulasuriya Anil Chandana Fernando, Ahmet M. Kondoz:
Unequal Error Protection for Backward Compatible 3-D Video Transmission over WiMAX. 125-128 - Qirong Ma, Feng Wu, Ming-Ting Sun:
Error Concealment for Spatially Scalable Video Coding using Hallucination. 129-132 - Jun Wang, Yichun Tang, Shen Li, Shunichi Ishiwata, Satoshi Goto:
Side Match Distortion based Adaptive Error Concealment order for 1Seg Video Broadcasting Application. 133-136 - Ji Gu, Hui Guo:
A Segmental Bus-invert Coding Method for Instruction Memory Data Bus Power Efficiency. 137-140 - Md. Sajjad Rahaman, Masud H. Chowdhury:
Crosstalk Avoidance and Error-correction Coding for Coupled RLC Interconnects. 141-144 - Antoine Courtay, Emmanuel Boutillon, Johann Laurent:
A Convolutional Code for On-chip Interconnect Crosstalk Reduction. 145-148 - Luiz Carlos Gouveia, Thomas Jacob Koickal, Alister Hamilton:
A CMOS Implementation of a Spike Event Coding Scheme for Analog Arrays. 149-152 - Yu-Cheng Tseng, Nelson Yen-Chung Chang, Tian-Sheuan Chang:
Low-memory Cost Belief Propagation Architecture for Disparity Estimation. 153-156 - Shantanu Chakrabartty, Nizar Lajnef:
Infrasonic Power-harvesting and Nanowatt Self-powered Sensors. 157-160 - Dinesh C. Verma, Chai Wah Wu, Theodore Brown, Amotz Bar-Noy, Simon Shamoun, Mark S. Nixon:
Application of Halftoning Algorithms to Location Dependent Sensor Placement. 161-164 - Jian Zhao, Sen-Ching S. Cheung:
Optimal Visual Sensor Planning. 165-168 - Homin Kwon, Harish Krishnamoorthi, Visar Berisha, Andreas Spanias:
A Sensor Network for Real-time Acoustic Scene Analysis. 169-172 - Chi-Tsun Cheng, Kia Fallahi, Henry Leung, C. K. Michael Tse:
Cooperative Path Planner for UAVs using ACO ALgorithm with Gaussian Distribution Functions. 173-176 - Tonmoy S. Mukherjee, Mohammad Omer, Jihwan Kim, Kevin T. Kornegay:
Design and Optimization of a 71 Gb/s Injection-locked CDR. 177-180 - Tao Jiang, Patrick Yin Chiang:
Sense Amplifier Power and Delay Characterization for Operation under Low-Vdd and Low-voltage Clock Swing. 181-184 - Won-Young Lee, Lee-Sup Kim:
A Spread Spectrum Clock Generator with Spread Ratio Error Reduction Scheme for DisplayPort Main Link. 185-188 - Francisco Aznar, Wolfgang Gaberl, Horst Zimmermann:
A Highly Sensitive 2.5 Gb/s Transimpedance Amplifier in CMOS Technology. 189-192 - Ying-Ren Chien, Chu-Yun Lin, Hen-Wai Tsao:
Reduction of Loop Delay for Digital Symbol Timing Recovery Systems using Asynchronous Equalization. 193-196 - Zhenqi Chen, Fa Foster Dai:
Effects of LO Phase and Amplitude Imbalances and Phase Noise on M-QAM Transceiver Performance. 197-200 - Dah-Chung Chang, Yen-Heng Lai, Yi-Chia Hsu:
Effect of Common Carrier Frequency Offset at the OFDMA Receiver. 201-204 - Hai-Nam Nguyen, Daniel Ménard, Olivier Sentieys:
Dynamic Precision Scaling for Low Power WCDMA Receiver. 205-208 - Ediz Çetin, Izzet Kale, Richard C. S. Morling:
Design of a Power-aware Digital Image Rejection Receiver. 209-212 - Raveendranatha P. Mahesh, A. Prasad Vinod, B. Y. Tan, Edmund Ming-Kit Lai:
A Tree-structured Non-uniform Filter Bank for Multi-standard Wireless Receivers. 213-216 - Ali Mirvakili, Mohammad Yavari:
A Noise-canceling CMOS LNA Design for the Upper Band of UWB DS-CDMA Receivers. 217-220 - Zhe-Yang Huang, Che-Cheng Huang, Chun-Chieh Chen, Chung-Chih Hung, Chia-Min Chen:
An Inductor-coupling Resonated CMOS Low Noise Amplifier for 3.1-10.6GHz Ultra-wideband System. 221-224 - Akshay Visweswaran, Wouter A. Serdijn:
A Low Power UWB-LNA using Active Dual Loop Negative Feedback in CMOS 0.13µm. 225-228 - Markus Robens, Ralf Wunderlich, Stefan Heinen:
UWB LNAs for Ground Penetrating Radar. 229-232 - Duan Zhao, Wouter A. Serdijn:
A Time-interleaved Sampling Delay Circuit for IR UWB Receivers. 233-236 - Chien-Ying Yu, Jui-Yuan Yu, Chen-Yi Lee:
An eCrystal Oscillator with Self-calibration Capability. 237-240 - Philip Teichmann, Jürgen Fischer, Doris Schmitt-Landsiedel:
A Robust Synchronized 2N2P LC Oscillator with a Shut-down Mode for Adiabatic Logic Circuits. 241-244 - Renfei Liu, Keshab K. Parhi:
Low-power Frequency Selective Filtering. 245-248 - Tze-Yun Sung, Lyu-Ting Ko, Hsi-Chin Hsin:
Low-power and High-SFDR Direct Digital Frequency Synthesizer based on Hybrid CORDIC Algorithm. 249-252 - Erik Hertz, Peter Nilsson:
Parabolic Synthesis Methodology Implemented on the Sine Function. 253-256 - Jader A. De Lima, Wallace A. Pimenta:
A Fully Integrated High-pass Filter for Very Low Frequency Applications. 257-260 - Yogesh Darwhekar, Rakesh Kumar, Debapriya Sahu, Shanthi Pavan, Ashish Lachhwani, T. Krishnaswamy, Subhashish Mukherjee:
A Digitally Assisted Baseband Filter with 9MHz Bandwidth and 0.3 dB IQ Mismatch for a WLAN Receiver Chain. 261-264 - Fabian Henrici, Joachim Becker, Stanis Trendelenburg, Daniel DeDorigo, Maurits Ortmanns, Yiannos Manoli:
A Field Programmable Analog Array using Floating Gates for High Resolution Tuning. 265-268 - Krishna T. Malladi, David V. Anderson:
Analog Implementation of SNR based Gain Adaptation for Denoising. 269-272 - Hsu-Cheng Ou, Mona E. Zaghloul:
Design and Implementation of Parallel-IDT Surface Acoustic Waves (SAW) Low Loss RF Filters. 273-276 - Ya Jun Yu, Dong Shi, Robert Bregovic:
On the Complexity Reduction of Polyphase Linear Phase FIR Filters with Symmetric Coefficient Implementation. 277-280 - Chun Zhu Yang, Yong Ching Lim, Yong Lian:
The Design of Computationally efficient Narrowband and Wideband Sharp FIR Filters. 281-284 - Mauricio F. Quélhas, Antonio Petraglia:
Digital Filter Design Optimization using Partial Cost Functions. 285-288 - Mohammad Ahsan, Tapio Saramäki:
Significant Improvements in Translating the Parks-McClellan Algorithm from its FORTRAN Code to its Corresponding MATLAB Code. 289-292 - Zaka Ullah Sheikh, Håkan Johansson:
Wideband Linear-phase FIR Differentiators Utilizing Multirate and Frequency-response Masking Techniques. 293-296 - Heinz Koeppl, Gianluca Setti:
Analysis and Design of Biological Circuits and Systems. 297-300 - Douglas Densmore, J. Christopher Anderson:
Combinational Logic Design in Synthetic Biology. 301-304 - Giovanni Russo, Mario di Bernardo:
An Algorithm for the Construction of Synthetic Self Synchronizing Biological Circuits. 305-308 - Mario A. Marchisio, Jörg Stelling:
Synthetic Gene Network Computational Design. 309-312 - Takashi Tokuda, Hirofumi Yamada, Kiyotaka Sasagawa, Jun Ohta:
Polarization-analyzing CMOS Image Sensor using Monolithically Embedded Polarizer for Microchemistry Systems. 313-316 - Sam Schauland, Jörg Velten, Anton Kummert, Krzysztof Galkowski:
On the Usability of Practical Stable n-D Systems for Signal Processing Applications. 317-320 - Takao Hinamoto, Osamu Tanaka, Wu-Sheng Lu:
Realization of 3-D Separable-denominator Digital Filters with Very Low l2-Sensitivity. 321-324 - Xiumei Li, Guoan Bi:
Uncertainty Principle of the Second-order LPFT. 325-328 - Arjuna Madanayake, Thushara K. Gunaratne, Leonard T. Bruton:
High-frequency Systolic Broadband Beamforming using Polyphase 3D IIR Frequency-planar Digital Filters with Interleaved A/D Sampling. 329-332 - Xinbo Li, Youyi Wang, Guoan Bi, Yaowu Shi, Xiumei Li:
On the Cross-terms in LPPs. 333-336 - Wei Tang, Eugenio Culurciello:
A Pulse-based Amplifier and Data Converter for Bio-potentials. 337-340 - Kriangkrai Sooksood, Thomas Stieglitz, Maurits Ortmanns:
An Active Approach for Charge Balancing in Functional Electrical Stimulation. 341-344 - Srinjoy Mitra, Rajesh H. Zele, Ralph Etienne-Cummings:
Low-voltage High CMRR OTA for Electrophysiological Measurements. 345-348 - Theodore Yu, Gert Cauwenberghs:
Analog VLSI Neuromorphic Network with Programmable Membrane Channel Kinetics. 349-352 - Xiaowen Liu, Daniel Rairigh, Chao Yang, Andrew J. Mason:
Impedance-to-digital Converter for Sensor Array Microsystems. 353-356 - Koustav Bhattacharya, Venkataraman Mahalingam, Nagarajan Ranganathan:
A VLSI System Architecture for Optical Flow Computation. 357-360 - Tzu-Yu Chen, Gwo-Long Li, Tian-Sheuan Chang:
Memory Analysis for H.264/AVC Scalable Extension Encoder. 361-364 - Pin-Chih Lin, Tzu-Der Chuang, Liang-Gee Chen:
A Branch Selection Multi-symbol High throughput CABAC Decoder Architecture for H.264/AVC. 365-368 - Peng Li, Hua Tang:
Design a Co-processor for Output Probability Calculation in Speech Recognition. 369-372 - Jinook Song, In-Cheol Park:
Novel Pipelined DWT Architecture for Dual-line Scan. 373-376 - Hao-I Yang, Ching-Te Chuang, Wei Hwang:
Impacts of NBTI and PBTI on Power-gated SRAM with High-k Metal-gate Devices. 377-380 - Amlan Ghosh, Richard B. Brown, Rahul M. Rao, Ching-Te Chuang:
A Precise Negative Bias Temperature Instability Sensor using Slew-rate Monitor Circuitry. 381-384 - Wen-Yi Chen, Ming-Dou Ker, Yeh-Ning Jou, Yeh-Jen Huang, Geeng-Lih Lin:
Improvement on ESD Robustness of Lateral DMOS in High-voltage CMOS ICs by Body Current Injection. 385-388 - Chia-Hao Hsu, Gang-Neng Sung, Tuo-Yu Yao, Chun-Ying Juan, Yain-Reu Lin, Chua-Chin Wang:
Low-power 7.2 GHz Complementary All-N-Transistor Logic using 90 nm CMOS Technology. 389-392 - Shunji Nakata, Takahito Kusumoto, Masayuki Miyama, Yoshio Matsuda:
Adiabatic SRAM with a Large Margin of VT Variation by Controlling the Cell-power-line and Word-line Voltage. 393-396 - Tatsuo Nakagawa, Ryosuke Fujiwara, Goichi Ono, Masayuki Miyazaki:
UWB-IR Receiver with Accurate Time-interval-measurement Circuit for Communication/location System. 397-400 - Bo Qin, Hongyi Chen, Xin Wang, Albert Z. Wang, Yinghui Hao, Lee Yang, Bin Zhao:
A Single-chip 33pJ/pulse 5th-derivative Gaussian based IR-UWB Transmitter in 0.13µm CMOS. 401-404 - H. Hedayati, Ali Fotowat-Ahmady:
A Novel Tunable UWB Pulse Design for Narrowband Interference Suppression Implemented in BiCMOS Technology. 405-408 - Maxim Piz, Milos Krstic, Marcus Ehrig, Eckhard Grass:
An OFDM Baseband Receiver for Short-range Communication at 60 GHz. 409-412 - Jian Luo, Andreas Kortke, Wilhelm Keusgen:
Efficient Self-calibration of Frequency-dependent I/Q-Imbalance in Direct-conversion OFDM Transceivers. 413-416 - Edwin C. Becerra-Alvarez, Federico Sandoval-Ibarra, José M. de la Rosa:
Adaptive CMOS LNAs for Beyond-3G RF Receivers - A Multi-standard GSM/WCDMA/BT/WLAN Case Study. 417-420 - Guochi Huang, Seong-Kyun Kim, Byung-Sung Kim:
A Wideband LNA with Active Balun for DVB-T Application. 421-424 - Miguel A. Martins, Luís Bica Oliveira, Jorge R. Fernandes:
Combined LNA and Mixer Circuits for 2.4 GHz ISM Band. 425-428 - Nathan M. Neihart, David J. Allstot, Matt Miller, Pat Rakers:
Twisted Transformers for Low Coupling RF and Mixed Signal Applications. 429-432 - Ka-Fai Un, Pui-In Mak, Rui Paulo Martins:
An Open-loop Octave-phase Local-oscillator Generator with High-precision Correlated Phases for VHF/UHF Mobile-TV Tuners. 433-436 - Yuan-Ching Kuo, Su-Hon Lin, Ming-Hwa Sheu, Jia-You Wu, Peng-Siang Wang:
Efficient VLSI Design of a Reverse RNS Converter for New Flexible 4-Moduli Set (2p+k, 2p+1, 2p-1, 22p+1). 437-440 - Ramya Muralidharan, Chip-Hong Chang:
Fixed and Variable Multi-modulus Squarer Architectures for Triple Moduli base of RNS. 441-444 - Dongdong Chen, Yu Zhang, Daniel Teng, Khan A. Wahid, Moon Ho Lee, Seok-Bum Ko:
A New Decimal Antilogarithmic Converter. 445-448 - Marcus Weis, Andrzej Pfitzner, Dominik Kasprowicz, Rainer Emling, Wojciech Maly, Doris Schmitt-Landsiedel:
Adder Circuits with Transistors using Independently Controlled Gates. 449-452 - Pramod Kumar Meher:
New Approach to LUT Implementation and Accumulation for Memory-based Multiplication. 453-456 - Paul-Peter Sotiriadis, Robert W. Adams:
Continuous-time Signal Processing with Time-variant Delay. 457-460 - Shervin Erfani, Nima Bayan:
A Note of Frequency-domain Characterization of Linear Time-varying Networks. 461-464 - Liming Xiu, Chen-Wei Huang, Ping Gui:
Simulation Study of Time-Average-Frequency based Clock Signal Driving Systems with Embedded Digital-to-Analog Converters. 465-468 - Rui He, Jun Li, Woogeun Rhee, Zhihua Wang:
Transient Analysis of Nonlinear Settling Behavior in Charge-pump Phase-locked Loop Design. 469-472