default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDAPCCAS 2016: Jeju, South Korea
- 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016, Jeju, South Korea, October 25-28, 2016. IEEE 2016, ISBN 978-1-5090-1570-2
- Su-Ling Lee, Chien-Cheng Tseng:
Image enhancement using DCT-based matrix homomorphic filtering method. 1-4 - Kei Ishiyama, Yosuke Sugiura, Tetsuya Shimamura:
Optimized three scores combination for image quality assessment. 5-8 - Truong Phu Truan Ho, Chip-Hong Chang
:
Accelerating residue-to-binary conversion of very high cardinality moduli set for fully homomorphic encryption. 9-12 - Yue Lu, Tom J. Kazmierski:
An ultra-low-power variable-accuracy bit-serial FFT butterfly processing element for IoT sensors. 13-16 - Akitoshi Itai, Yuta Hara:
Lower-norm criterion based background noise estimation for simple observation model. 17-20 - Huei-Shiuan Tang, Cheng-Yen Yang, Chih-Wei Liu, Chia-Cheng Chien:
Binaural-cue-based noise reduction using multirate quasi-ANSI filter bank for hearing aids. 21-24 - Mo Huang, Yan Lu, Seng-Pan U, Rui Paulo Martins:
A digital LDO with transient enhancement and limit cycle oscillation reduction. 25-28 - Y. S. Jiang, Dong Wang, Pak Kwong Chan:
A sub-1V low dropout regulator with improved transient performance for low power digital systems. 29-32 - Yan Lu:
Digitally assisted low dropout regulator design for low duty cycle IoT applications. 33-36 - Jian-He Lin, Wen-Jie Tsou, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Jian-Ru Lin, Lsung-Yen Lsai:
A digital low-dropout-regulator with steady-state load current (SLC) estimator and dynamic gain scaling (DGS) control. 37-40 - Fan Yang, Yasu Lu, Philip K. T. Mok:
A comparative analysis on binary and multiple-unary weighted power stage design for digital LDO. 41-42 - Saad Bin Nasir, Arijit Raychowdhury:
Embedded hybrid LDO topologies for digital load circuits. 43-46 - Young Jae Jang, Seong-Eun Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A low-power LDO circuit with a fast load regulation. 47-49 - Shu-Min Zhang, Xiang Li:
Mobility patterns of human population among university campuses. 50-53 - Haicheng Tu, Yongxiang Xia, Herbert H. C. Iu, Chi K. Tse:
Improving robustness of power systems via optimal link switch-off. 54-56 - Zhenhao Chen, Jiajing Wu, Zibin Zheng:
An effective rewiring strategy for optimizing traffic performance of communication networks. 57-60 - Junwen Zeng, Jiajing Wu, Zhenhao Chen, Zibin Zheng:
Effect of traffic generation patterns on traffic performance of complex networks. 61-64 - Takahiro Chikazawa, Yoko Uwate, Yoshifumi Nishio:
Chaos propagation in coupled chaotic circuits with multi-ring combination. 65-68 - Kosuke Oi, Yoko Uwate, Yoshifumi Nishio:
Synchronization in complex networks by coupled parametrically excited oscillators with parameter mismatch. 69-72 - Kuan Chuang Koay, Pak Kwong Chan:
A 1V low-power CMOS resistance-to-frequency converter using hybrid transconductor for IoT. 73-76 - Akio Shimizu, Yohei Ishikawa, Sumio Fukai:
A high output-swing current mirror with neuron MOSFETs in standard CMOS technology. 77-78 - Sarang Kazeminia, Arefeh Soltani:
Single-stage offset-cancelled latched comparator scheduled by multi-level control on reset switch. 79-82 - Douglas Andersson Hagglund, Girish Aramanekoppa Subbarao, Mohammed Abdulaziz, Markus Törmänen:
Analog integrated audio frequency synthesizer. 83-86 - Chundong Wu, Wang Ling Goh, Wei Mao, Lei Wang, Yat-Hei Lam, Alan Chang, Yong Lian:
A self biased full range current sensor for buck regulator. 87-90 - Soon-Jae Kweon, Sung-Hun Jo, Jeong-Ho Park, Hyung-Joun Yoo:
A CMOS sinusoidal signal generator based on mixed-time processing for electrical bioimpedance spectroscopy supporting beta dispersion range. 91-94 - Sijie Pan, Philip K. T. Mok:
A single on/off reference tracking buck converter using turning point prediction for DVFS application. 95-98 - Lei Wang, Wei Mao, Chundong Wu, Alan Chang, Yong Lian:
A fast transient LDO based on dual loop FVF with high PSRR. 99-102 - Karthik Gopal Jayaraman, Karim Rawy, Tony T. Kim:
A 0.6-V power efficient digital LDO with 99.7% current efficiency utilizing load current aware clock modulation for fast transient response. 103-106 - Menghan Sun, Damith Chinthana Ranasinghe, Said F. Al-Sarawi:
RF energy harvester with peak power conversion efficiency tracking. 107-110 - K. T. Hafeez, Ashudeb Dutta, Shiv Govind Singh, Krishna Kanth Gowri Avalur:
A compact, resource sharing on-chip soft-start technique for automotive DC-DC converters. 111-114 - Ali Akbar Pammu, Kwen-Siong Chong, Ne Kyaw Zwa Lwin, Weng-Geng Ho, Nan Liu, Bah-Hwee Gwee:
Success rate model for fully AES-128 in correlation power analysis. 115-118 - Karim Ali, Fei Li, Sunny Y. H. Lua, Chun-Huat Heng:
Compact spin transfer torque non-volatile flip flop design for power-gating architecture. 119-122 - Shibang Lin, Dejian Liang, Yuan Cao, Xiaofang Pan, Xiaojin Zhao:
A low power and compact physical unclonable function based on the cascode current mirrors. 127-130 - Askhat Zhanbossinov, Kamilya Smagulova, Alex Pappachen James:
CMOS-memristor dendrite threshold circuits. 131-134 - Om. Prakash, Mohit Sharma, Anand Bulusu, A. K. Saxena, S. K. Manhas, Satish Maheshwaram:
Lateral silicon nanowire based standard cell design for higher performance. 135-138 - Chun-Shen Liu, Nae-Chyun Chen, Yu-Cheng Li, Yi-Chang Lu:
An FPGA-based quality filter for de novo sequence assembly pipeline. 139-142 - Shin-Shiang Wang, Yi-Chi Tien, Yin-Tsung Hwang, Jin-Fa Lin, Guo-Zua Wu:
MVDR based adaptive beamformer design and its FPGA implementation for ultrasonic imaging. 143-145 - Tsung-Han Tsai, Kung-Long Zhang:
Implementation of intelligent home appliances based on IoT. 146-148 - Ching-Wen Lin, Chung-Ho Chen:
A processor shield for software-based on-line self-test. 149-152 - Kai Xiang Yang, Ming-Hwa Sheu:
Edge-based moving object tracking algorithm for an embedded system. 153-155 - Chun-Wei Chen, Fang-Kai Hsu, Der-Wei Yang, Jonas Wang, Ming-Der Shieh:
Effective model construction for enhanced prediction in example-based super-resolution. 156-159 - Shin-Chi Lai, Te-Hsuan Hung, Wen Chih Li, Yu-Syuan Jhang, Kuan-Ying Chang, Wen-Ho Juang, Ching-Hsing Luo:
Low-cost prototype design of a portable ECG signal recorder. 160-163 - Gain Kim, Yusuf Leblebici:
Architectural modeling of a multi-tone/single-sideband serial link transceiver for lossy wireline data links. 164-167 - Dominik Rieth, Christoph Heller, Gerd Ascheid:
Fully coherent shaped offset QPSK demodulator architecture with superior hardware efficiency. 168-171 - Eisaku Ogawa, Yosuke Sugiura, Tetsuya Shimamura:
Narrowband interference suppression with symbol interleaving for UWB communication systems. 172-175 - Fei Huang, Jianyi Zhou, Zhiqiang Yu, Binqi Yang, Ji Lan, Weichen Huang:
The research of broadband MIMO millimeter wave transceiver system: Design and test. 176-179 - Gihoon Jung, Kyungrak Choi, Jongsun Park:
A compact multi-mode CORDIC with Global-Shifting-Sum (GSS) method. 180-183 - Hao-Fan Hsu, Chia-Wei Chang, Chih-Peng Fan:
High-efficiency and cost-sharing architecture design of fast algorithm based multiple 4×4 and 8×8 forward transforms for multi-standard video encoder. 184-187 - Sunwoong Kim, Hyuk-Jae Lee:
A design of a cost-effective look-up table for RGB-to-RGBW conversion. 188-191 - Ting-An Chang, Jung-Ping Kuo, Jar-Ferr Yang:
Efficient hole filling and depth enhancement based on texture image and depth map consistency. 192-195 - Sanghun Kim, Chan Young Jang, Young Hwan Kim:
Weighted peak ratio for estimating stereo confidence level using color similarity. 196-197 - Kyungho Kim, Yeongmin Lee, Hyun Sang Park, Chong-Min Kyung:
Depth extraction using adaptive blur channel selection for dual aperture camera. 198-201 - Xiao-Xuan Huang, Chun-Hsien Ho, Yu-Cheng Li, Nae-Chyun Chen, Yi-Chang Lu:
Step shift: A fast image segmentation algorithm and its hardware implementation for next-generation sequencing fluorescence data. 202-205 - Zilong Liu, Dongsheng Liu, Xiangcheng Sun, Xuecheng Zou, Hui Lin:
Implementation of a resource-constrained ECC processor with power analysis countermeasure. 206-209 - Kun-Chih Jimmy Chen, Yen-Po Lin, Kai-Yu Chiang, Yu-Hsien Chen:
Correlation-graph-based temperature sensor allocation for thermal-aware network-on-chip systems. 210-213 - Xing Su, Shinji Kimura:
Optimization of area and power in multi-mode power gating scheme for static memory elements. 214-217 - Seokha Hwang, Youngjoo Lee:
FPGA-based real-time lane detection for advanced driver assistance systems. 218-219 - Daisuke Oku, Masao Yanagisawa, Nozomu Togawa:
Implementation evaluation of scan-based attack against a Trivium cipher circuit. 220-223 - Kiyotaka Yamamura, Ryota Watanabe:
A simple method for finding all characteristic curves of piecewise-linear resistive circuits using an integer programming solver. 224-227 - Kiyotaka Yamamura, Daiki Koyama:
Finding all solutions of piecewise-linear resistive circuits using excel. 228-231 - Kento Endo, Norikazu Takahashi:
A new decentralized discrete-time algorithm for estimating algebraic connectivity of multiagent networks. 232-235 - Viet-Duc Le, Tadashi Tsubone, Naohiko Inaba:
Rigorous analysis of Arnold tongues in a manifold piecewise-linear circuit. 236-239 - Kriangkrai Sooksood:
Wide current range and high compliance-voltage bulk-driven current mirrors: Simple and cascode. 240-242 - Lidan Wang, Chenchang Zhan, Guofeng Li:
An ultra-low power and offset-insensitive CMOS subthreshold voltage reference. 243-246 - Xun Liu, Junmin Jiang, Philip K. T. Mok, Wing-Hung Ki:
Methods for measuring loop-gain function of high-frequency DC-DC converters. 247-249 - R. P. Kartheek, Akash Gupta, Murali Krishna Rajendran, Ashudeb Dutta:
An illumination aware single solar-cell VCO CCO based charge-pump energy harvesting system for SoC integration. 250-253 - Chutham Sawigun, Prajuab Pawarangkoon:
0.6-V, Sub-nW, second-order lowpass filters using flipped voltage followers. 254-257 - Guan-Yi Li, Chun-Yu Lin:
On-chip ESD protection design for radio-frequency power amplifier with large-swing-tolerance consideration. 258-261 - Siti Amalina Enche Ab Rahim, Adel Barakat, Ramesh K. Pokharel:
Design of 5.5GHz LC oscillator using distributed grid of N-well in P-substrate inductor. 262-264 - Wen-Cheng Lai, Jheng-Wei Jhuang, Sheng-Lyang Jang, Guan-Yu Lin, Ching-Wen Hsue:
Wide-band injection-locked frequency doubler. 265-268 - Sanggil Kim, Donggu Im:
A tunable power amplifier employing digitally controlled accumulation-mode varactor array for 2.4-GHz short-range wireless communication. 269-272 - Hung-Wei Yang, Yongyu He, Chih-Wei Jen, Chun-Yi Liu, Shyh-Jye Jou, Xuefeng Yin, Meng Ma, Bingli Jiao:
Interference measurement and analysis of full-duplex wireless system in 60 GHz band. 273-276 - Wei-Yang Chen, Daniel Günther, Chung-An Shen, Gerd Ascheid:
Design and implementation of a low-latency, high-throughput sorted QR decomposition circuit for MIMO communications. 277-280 - Chun-An Chen, Zao-Fu Yang, Chiao-En Chen, Yuan-Hao Huang:
A generalized eigenvalue decomposition processor for multi-user MIMO precoding. 281-284 - Ching-Hao Yang, Pei-Yun Tsai:
Design of a low-complexity O-QPSK transceiver with spatial modulation for internet-of-things applications. 285-288 - Mao-Ruei Li, Ting-Yu Kuan, Huang-Chang Lee, Yeong-Luh Ueng:
An IDD receiver of LDPC coded modulation scheme for flash memory applications. 289-292 - Chao Yang, Chuan Zhang, Shunqing Zhang, Xiaohu You:
Efficient hardware architecture of deterministic MPA decoder for SCMA. 293-296 - Itaru Hida, Masayuki Ikebe, Tetsuya Asai, Masato Motomura:
A 2-clock-cycle Naïve Bayes classifier for dynamic branch prediction in pipelined RISC microprocessors. 297-300 - Shohei Sugino, Kazuhiro Okabe, Nobuyoshi Komuro, Hiroo Sekiya:
Power-flow simulation with visualization function based on IEEE common data format. 301-304 - Xiuqin Wei, Hiroo Sekiya, Tadashi Suetsugu:
New class-E rectifier with low voltage stress. 305-308 - Takuya Shindo, Kenya Jin'no:
Particle swarm optimization for matrix converter of switching pattern design. 309-312 - Masaki Takeuchi, Haruna Matsushita, Yoko Uwate, Yoshifumi Nishio:
Firefly algorithm existing leader fireflies. 313-316 - Oner Hanay, Erkan Bayram, David Bierbuesse, Renato Negra:
Equidistant mixer-based frequency generation for 60 GHz FBMC transmitter topologies. 317-320 - Andrea Bandiziol, Werner Grollitsch, Francesco Brandonisio, Roberto Nonis, Pierpaolo Palestri:
Design of a 8-taps, 10Gbps transmitter for automotive micro-controllers. 321-324 - Jonghoon Kang, Chanho Lee:
Digital clock data recovery circuit fot S/PDIF. 325-326 - Ki-Hyun Pyun, Dae Hyun Kwon, Woo-Young Choi:
A 3.5/7.0/14-Gb/s multi-rate clock and data recovery circuit with a multi-mode rotational binary phase detector. 327-329 - Zaira Zahir, Gaurab Banerjee:
A multi-tap inductor based 2.0-4.1 GHz wideband LC-oscillator. 330-333 - Yung-Hui Chung, Cheng-Hsun Tsai, Hsuan-Chih Yeh:
A 5-b 1-GS/s binary-search ADC in 90nm CMOS. 334-335 - Wei Mao, Yongfu Li, Chun-Huat Heng, Yong Lian:
Dynamic mapping method for static and dynamic performance improvement on current-steering digital-to-analog converter. 336-339 - Zhelu Li, Jianxiong Xi, Lenian He, Kexu Sun:
A front-end circuit with 16-channel 12-bit 100-kSps RC-hybrid SAR ADC for industrial monitoring application. 340-343 - Bum-Hee Choi, Kyung-Sub Son, Jin-Ku Kang:
A low jitter burst-mode clock and data recovery circuit with two symmetric VCO's. 344-347 - Junjie Kong, Stephan Henzler, Doris Schmitt-Landsiedel, Liter Siek:
A 9-bit, 1.08ps resolution two-step time-to-digital converter in 65 nm CMOS for time-mode ADC. 348-351 - Takahiro Yamamoto, Ittetsu Taniguchi, Hiroyuki Tomiyama, Shigeru Yamashita, Yuko Hara-Azumi:
A systematic methodology for design and analysis of approximate array multipliers. 352-354 - Sunghyun Kim, Youngmin Kim:
Energy-efficient hybrid adder design by using inexact lower bits adder. 355-357 - F. F. Zakaria, Naa Latif, Shaiful Jahari Hashim, Phaklen EhKan, Fakhrul Zaman Rokhani:
Cooperative virtual channel router for adaptive hardwired FPGA network-on-chip. 358-361 - Junghoon Oh, Mineo Kaneko:
Mixed error correction scheme and its design optimization for soft-error tolerant datapaths. 362-365 - Hayato Mashiko, Yukihide Kohira:
Yield and power improvement method by post-silicon delay tuning and technology mapping. 366-369 - Hyunggoy Oh, Inhyuk Choi, Sungho Kang:
A new online test and debug methodology for automotive camera image processing system. 370-371 - Kiyotaka Yamamura, Kiyoshi Adachi:
A modified predictor-corrector method for tracing solution curves. 372-375 - Akshay Kumar Maan, Alex Pappachen James:
Voltage controlled memristor threshold logic gates. 376-379 - Nur Syazreen Ahmad, Siti Juliana Abu Bakar:
Phase-controlled system design via mixed H∞ synthesis and nonlinear method. 380-383 - Seiya Kita, Yoko Uwate, Yoshifumi Nishio:
Switching synchronization states of a ring of coupled chaotic circuits with one-direction delay effects. 384-387 - Chao Yang, Chuan Zhang, Shunqing Zhang, Xiaohu You:
Efficient hardware architecture of deterministic MPA decoder for SCMA. 392-395 - Hiromasa Kato, Thi Hong Tran, Yasuhiko Nakashima:
ASIC design of a low-complexity K-best Viterbi decoder for IoT applications. 396-399 - Huyen Thi Pham, Hanho Lee:
Low latency check node unit architecture for nonbinary LDPC decoding. 400-401 - Anlan Yu, Chuan Zhang, Shunqing Zhang, Xiaohu You:
Efficient SOR-based detection and architecture for large-scale MIMO uplink. 402-405 - Junbo Shim, Min-Kyu Kim, Seong-Kwan Hong, Oh-Kyong Kwon:
A low-power single-ended 11-bit SA-ADC with 1 V supply voltage and 2 V input voltage range for CMOS image sensors. 410-413 - Qiwei Huang, Chenchang Zhan, Jinwook Burm:
A low-complexity fast-locking digital PLL with multi-output bang-bang phase detector. 418-420 - Manuel Delgado-Restituto, Manuel Carrasco-Robles, Rafaella Fiorelli, Antonio Jose Ginés Arteaga, Ángel Rodríguez-Vázquez:
A 76nW, 4kS/s 10-bit SAR ADC with offset cancellation for biomedical applications. 421-424 - Seongheon Shin, Soon-Jae Kweon, Jeong-Ho Park, Yong-Chang Choi, Hyung-Joun Yoo:
An efficient, wide range time-to-digital converter using cascaded time-interpolation stages for electrical impedance spectroscopy. 425-428 - Wei-Cheng Li, Wei-Liang Ou, Chih-Peng Fan, Chien-Hsiu Huang, Yi-Shian Shie:
Near-infrared-ray and side-view video based drowsy driver detection system: Whether or not wearing glasses. 429-432 - Shen-Fu Hsiao, Jun-Mao Chan, Ching-Hui Wang:
Hardware design of histograms of oriented gradients based on local binary pattern and binarization. 433-435 - Liu Ke, Jun Wang, Xijun Zhao, Fan Liang:
Fast-Gaussian SIFT and its hardware architecture for keypoint detection. 436-439 - Muhammad Umar Karim Khan, Asim Khan, Chong-Min Kyung:
Depth refinement on sparse-depth images using visual perception cues. 440-443 - Zhi-Hao Chang, Bih Fei Jong, Wei Jing Wong, M. L. Dennis Wong:
Distributed video transcoding on a heterogeneous computing platform. 444-447 - Jieming Ma, Ziqiang Bi, Yu Shi, Ka Lok Man, Xinyu Pan, Jian Wang:
OL-SVR based soft-sensor for real-time estimation of solar irradiance. 448-451 - Fan Yang, Danny Hughes, Nelson Matthys, Ka Lok Man:
The PnP Web Tag: A plug-and-play programming model for connecting IoT devices to the web of things. 452-455 - Jing Chen Wang, Mark Leach, Zhao Wang, Ka Lok Man, Eng Gee Lim:
Rectanna design for energy harvesting. 456-457 - Zhen Yu, Hai-Ning Liang, Charles Fleming, Ka Lok Man:
An exploration of usable authentication mechanisms for virtual reality systems. 458-460 - Tsai-Kan Chien, Lih-Yih Chiou, Chieh-Wen Cheng, Shyh-Shyuan Sheu, Pei-Hua Wang, Ming-Jinn Tsai, Chih-I Wu:
Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture. 461-464