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ORCIDIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 41
Volume 41, Number 1, January 2022
- Shuhan Zhang
, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng:
An Efficient Batch-Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multiobjective Acquisition Ensemble. 1-14 - Jingxiao Ma, Soheil Hashemi, Sherief Reda:
Approximate Logic Synthesis Using Boolean Matrix Factorization. 15-28 - Xiang-Min Yang, Pei-Pei Chen, Hsiao-Yu Chiang, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang:
LOOPLock 2.0: An Enhanced Cyclic Logic Locking Approach. 29-34 - Rana Elnaggar, Kanad Basu, Krishnendu Chakrabarty, Ramesh Karri:
Runtime Malware Detection Using Embedded Trace Buffers. 35-48 - Zhuo Su, Dongyan Wang, Yixiao Yang, Yu Jiang, Wanli Chang, Liming Fang, Wen Li, Jia-Guang Sun:
Code Synthesis for Dataflow-Based Embedded Software Design. 49-61 - Zhishan Guo, Sudharsan Vaidhun, Luca Satinelli, Samsil Arefin, Jun Wang, Kecheng Yang:
Mixed-Criticality Scheduling Upon Permitted Failure Probability and Dynamic Priority. 62-75 - Yawen Wu, Zhenge Jia, Fei Fang, Jingtong Hu:
Cooperative Communication Between Two Transiently Powered Sensor Nodes by Reinforcement Learning. 76-90 - Tai Chang, Jen-Wei Hsieh, Tai-Chieh Chang, Liang-Wei Lai:
EMT: Elegantly Measured Tanner for Key-Value Store on SSD. 91-103 - Mehdi Sadi, Ujjwal Guin:
Test and Yield Loss Reduction of AI and Deep Learning Accelerators. 104-115 - Xinkai Song, Tian Zhi, Zhe Fan, Zhenxing Zhang, Xi Zeng, Wei Li, Xing Hu, Zidong Du, Qi Guo, Yunji Chen:
Cambricon-G: A Polyvalent Energy-Efficient Accelerator for Dynamic Graph Neural Networks. 116-128 - Elena-Diana Sandru, Emilian David, Ingrid Kovacs, Andi Buzo, Corneliu Burileanu, Georg Pelz:
Modeling the Dependency of Analog Circuit Performance Parameters on Manufacturing Process Variations With Applications in Sensitivity Analysis and Yield Prediction. 129-142 - Haocheng Li, Wing-Kai Chow, Gengjie Chen, Bei Yu, Evangeline F. Y. Young:
Pin-Accessible Legalization for Mixed-Cell-Height Circuits. 143-154 - Yibai Meng, Wuxi Li, Yibo Lin, David Z. Pan:
elfPlace: Electrostatics-Based Placement for Large-Scale Heterogeneous FPGAs. 155-168 - Lihua Yang, Zhipeng Tan, Fang Wang, Dan Feng, Hongwei Qin, Shiyun Tu, Jiaxing Qian, Yuting Zhao:
Improving F2FS Performance in Mobile Devices With Adaptive Reserved Space Based on Traceback. 169-182 - Animesh Basak Chowdhury, Benjamin Tan, Siddharth Garg, Ramesh Karri:
Robust Deep Learning for IC Test Problems. 183-195 - Jintao Yu, Muath Abu Lebdeh, Hoang Anh Du Nguyen, Mottaqiallah Taouil, Said Hamdioui:
APmap: An Open-Source Compiler for Automata Processors. 196-200
Volume 41, Number 2, February 2022
- Maryam Shafiee, Sule Ozev:
An In-Field Programmable Adaptive CMOS LNA for Intelligent IoT Sensor Node Applications. 201-210 - Salim Ullah, Semeen Rehman, Muhammad Shafique, Akash Kumar:
High-Performance Accurate and Approximate Multipliers for FPGA-Based Hardware Accelerators. 211-224 - Junick Ahn, Daeyong Kim, Rhan Ha, Hojung Cha:
State-of-Charge Estimation of Supercapacitors in Transiently-Powered Sensor Nodes. 225-237 - Jiawan Wang, Lei Bu, Shaopeng Xing, Xuandong Li:
PDF: Path-Oriented, Derivative-Free Approach for Safety Falsification of Nonlinear and Nondeterministic CPS. 238-251 - Hengli Huang, Xiaohang Wang, Yingtao Jiang, Amit Kumar Singh, Mei Yang, Letian Huang:
Detection of and Countermeasure Against Thermal Covert Channel in Many-Core Systems. 252-265 - Satwik Patnaik, Mohammed Ashraf, Haocheng Li, Johann Knechtel, Ozgur Sinanoglu:
Concerted Wire Lifting: Enabling Secure and Cost-Effective Split Manufacturing. 266-280 - Sanjit Kumar Roy, Rajesh Devaraj, Arnab Sarkar:
Contention Cognizant Scheduling of Task Graphs on Shared Bus-Based Heterogeneous Platforms. 281-293 - Renping Liu, Duo Liu, Xianzhang Chen, Yujuan Tan, Runyu Zhang, Liang Liang:
Self-Adapting Channel Allocation for Multiple Tenants Sharing SSD Devices. 294-305 - Zhaoying Li, Dhananjaya Wijerathne, Xianzhang Chen, Anuj Pathania, Tulika Mitra:
ChordMap: Automated Mapping of Streaming Applications Onto CGRA. 306-319 - Zhe Jiang, Xiaotian Dai, Pan Dong, Ran Wei, Dawei Yang, Neil C. Audsley, Nan Guan:
Toward an Analysable, Scalable, Energy-Efficient I/O Virtualization for Mixed-Criticality Systems. 320-333 - Yufei Ni, Yangdong Deng, Zonghui Li:
Agglomerative Memory and Thread Scheduling for High-Performance Ray-Tracing on GPUs. 334-345 - Weifan Sun, Wei Fan, Mengying Zhao, Weining Song, Xiaojun Cai, Tiantian Liu, Zhiping Jia:
Deep Reinforcement-Learning-Guided Backup for Energy Harvesting Powered Systems. 346-358 - Lingling Lao, Hans van Someren, Imran Ashraf, Carmen G. Almudéver:
Timing and Resource-Aware Mapping of Quantum Circuits to Superconducting Processors. 359-371 - Zheng Qu, Lei Deng, Bangyan Wang, Hengnu Chen, Jilan Lin, Ling Liang, Guoqi Li, Zheng Zhang, Yuan Xie:
Hardware-Enabled Efficient Data Processing With Tensor-Train Decomposition. 372-385 - Darong Huang, Ali Pahlevan, Marina Zapater, David Atienza:
COCKTAIL: Multicore Co-Optimization Framework With Proactive Reliability Management. 386-399
Volume 41, Number 3, March 2022
- Hongyu An, Mohammad Shah Al-Mamun, Marius K. Orlowski, Lingjia Liu, Yang Yi:
Three-Dimensional Neuromorphic Computing System With Two-Layer and Low-Variation Memristive Synapses. 400-409 - Kyungwook Chang, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim:
Design-Aware Partitioning-Based 3-D IC Design Flow With 2-D Commercial Tools. 410-423 - Amin Monfared, Mostafa M. I. Taha, Arash Reyhani-Masoleh:
Secure and Efficient Exponentiation Architectures Using Gaussian Normal Basis. 424-437 - Jim Plusquellic, Donald E. Owen, Tom J. Mannos, Brian Dziki:
Information Leakage Analysis Using a Co-Design-Based Fault Injection Technique on a RISC-V Microprocessor. 438-451 - Huanyu Wang, Henian Li, Fahim Rahman, Mark M. Tehranipoor, Farimah Farahmandi:
SoFI: Security Property-Driven Vulnerability Assessments of ICs Against Fault-Injection Attacks. 452-465 - Xingyu Meng, Shamik Kundu, Arun K. Kanuparthi, Kanad Basu:
RTL-ConTest: Concolic Testing on RTL for Detecting Security Vulnerabilities. 466-477 - Guoqi Xie, Wei Wu, Renfa Li:
Carry-Out Interference Optimization in WCRT Analysis for Global Fixed-Priority Multiprocessor Scheduling. 478-491 - Jie Zhan, Geoff V. Merrett, Alex S. Weddell:
Exploring the Effect of Energy Storage Sizing on Intermittent Computing System Performance. 492-501 - Linwei Niu, Dakai Zhu:
Fixed-Priority Scheduling for Reliable and Energy-Aware (m, k)-Deadlines Enforcement With Standby-Sparing. 502-515 - Junlong Zhou, Kun Cao, Xiumin Zhou, Mingsong Chen, Tongquan Wei, Shiyan Hu:
Throughput-Conscious Energy Allocation and Reliability-Aware Task Assignment for Renewable Powered In-Situ Server Systems. 516-529 - Zhuwei Qin, Fuxun Yu, Zirui Xu, Chenchen Liu, Xiang Chen:
CaptorX: A Class-Adaptive Convolutional Neural Network Reconfiguration Framework. 530-543 - Yina Lv, Liang Shi, Longfei Luo, Changlong Li, Chun Jason Xue, Edwin H.-M. Sha:
Tail Latency Optimization for LDPC-Based High-Density and Low-Cost Flash Memory Devices. 544-557 - Debraj Kundu, Sudip Roy, Sukanta Bhattacharjee, Sohini Saha, Krishnendu Chakrabarty, Partha Pratim Chakrabarti, Bhargab B. Bhattacharya:
Mixing Models as Integer Factorization: A Key to Sample Preparation With Microfluidic Biochips. 558-570 - Mackenzie J. Wibbels, Kenneth S. Stevens:
Causal Path Identification for Timed and Sequential Circuits. 571-582 - Bing Li, Songyun Qu, Ying Wang:
An Automated Quantization Framework for High-Utilization RRAM-Based PIM. 583-596 - Yun Liang, Liqiang Lu, Yicheng Jin, Jiaming Xie, Ruirui Huang, Jiansong Zhang, Wei Lin:
An Efficient Hardware Design for Accelerating Sparse CNNs With NAS-Based Models. 597-613 - Patrick Sittel, Nicolai Fiege, John Wickerson, Peter Zipf:
Optimal and Heuristic Approaches to Modulo Scheduling With Rational Initiation Intervals in Hardware Synthesis. 614-627 - Jianyi Cheng, Lana Josipovic, George A. Constantinides, Paolo Ienne, John Wickerson:
DASS: Combining Dynamic & Static Scheduling in High-Level Synthesis. 628-641 - Chang-Cheng Ko, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang:
Majority Logic Circuit Minimization Using Node Addition and Removal. 642-655 - Byungmin Ahn, Taewhan Kim:
Deeper Weight Pruning Without Accuracy Loss in Deep Neural Networks: Signed-Digit Representation-Based Approach. 656-668 - Ran Chen, Wei Zhong, Haoyu Yang, Hao Geng, Fan Yang, Xuan Zeng, Bei Yu:
Faster Region-Based Hotspot Detection. 669-680 - Zhiqiang Liu, Wenjian Yu, Zhuo Feng:
feGRASS: Fast and Effective Graph Spectral Sparsification for Scalable Power Grid Analysis. 681-694 - Dennis D. Weller, Michael Hefenbrock, Michael Beigl, Mehdi B. Tahoori:
Fast and Efficient High-Sigma Yield Analysis and Optimization Using Kernel Density Estimation on a Bayesian Optimized Failure Rate Model. 695-708 - Wei Zhong, Shuxiang Hu, Yuzhe Ma, Haoyu Yang, Xiuyuan Ma, Bei Yu:
Deep Learning-Driven Simultaneous Layout Decomposition and Mask Optimization. 709-722 - Bin Zhou, Hong Jiang, Qiang Cao, Shenggang Wan, Changsheng Xie:
A-Cache: Asymmetric Buffer Cache for RAID-10 Systems Under a Single-Disk Failure to Significantly Boost Availability. 723-736 - Kuen-Jong Lee, Cheng-Hung Wu, Tsung-Yu Hou:
An Efficient Procedure to Generate Highly Compact Diagnosis Patterns for Transition Faults. 737-749 - Youngkwang Lee, Young-Woo Lee, Sungyoul Seo, Sungho Kang:
Reduced-Pin-Count BOST for Test-Cost Reduction. 750-761 - Mengyun Liu, Xin Li, Krishnendu Chakrabarty, Xinli Gu:
Knowledge Transfer in Board-Level Functional Fault Diagnosis Enabled by Domain Adaptation. 762-775 - Irith Pomeranz:
Efficient Identification of Undetectable Two-Cycle Gate-Exhaustive Faults. 776-783 - Andrew B. Kahng, Jian Kuang, Wen-Hao Liu, Bangqi Xu:
In-Route Pin Access-Driven Placement Refinement for Improved Detailed Routing Convergence. 784-788 - Zhengqi Gao, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li:
Fast Statistical Analysis of Rare Failure Events With Truncated Normal Distribution in High-Dimensional Variation Space. 789-793 - Akira Ito, Rei Ueno, Naofumi Homma:
Efficient Formal Verification of Galois-Field Arithmetic Circuits Using ZDD Representation of Boolean Polynomials. 794-798
Volume 41, Number 4, April 2022
- Khanh N. Dang, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran:
HotCluster: A Thermal-Aware Defect Recovery Method for Through-Silicon-Vias Toward Reliable 3-D ICs Systems. 799-812 - Jun Tao, Handi Yu, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li:
Correlated Rare Failure Analysis via Asymptotic Probability Evaluation. 813-826 - Dongning Ma, Xinqiao Zhang, Ke Huang, Yu Jiang, Wanli Chang, Xun Jiao:
DEVoT: Dynamic Delay Modeling of Functional Units Under Voltage and Temperature Variations. 827-839 - Ilaria Scarabottolo, Giovanni Ansaloni, George A. Constantinides, Laura Pozzi:
A Formal Framework for Maximum Error Estimation in Approximate Logic Synthesis. 840-853 - Abdulrahman Alaql, Saranyu Chattopadhyay, Prabuddha Chakraborty, Tamzidul Hoque, Swarup Bhunia:
LeGO: A Learning-Guided Obfuscation Framework for Hardware IP Protection. 854-867 - Abhijitt Dhavlle, Setareh Rafatirad, Khaled N. Khasawneh, Houman Homayoun, Sai Manoj Pudukotai Dinakarrao:
Imitating Functional Operations for Mitigating Side-Channel Leakage. 868-881 - Zhaoyan Shen, Feng Chen, Gala Yadgar, Zhiping Jia, Zili Shao:
Prism-SSD: A Flexible Storage Interface for SSDs. 882-896 - Justin Morris, Roshan Fernando, Yilun Hao, Mohsen Imani, Baris Aksanli, Tajana Rosing:
Locality-Based Encoder and Model Quantization for Efficient Hyper-Dimensional Computing. 897-907 - Zhifei Wang, Jun Feng, Jiang Xu, Xuanqi Chen, Jiaxu Zhang, Shixi Chen, Yinyi Liu:
HERO: Pbit High-Radix Optical Switch Based on Integrated Silicon Photonics for Data Center. 908-921 - Yuhao Zhang, Zhiping Jia, Hongchao Du, Runzhen Xue, Zhaoyan Shen, Zili Shao:
A Practical Highly Paralleled ReRAM-Based DNN Accelerator by Reusing Weight Pattern Repetitions. 922-935 - Xiaobing Chen, Yuke Wang, Xinfeng Xie, Xing Hu, Abanti Basak, Ling Liang, Mingyu Yan, Lei Deng, Yufei Ding, Zidong Du, Yuan Xie:
Rubik: A Hierarchical Architecture for Efficient Graph Neural Network Training. 936-949 - Muhammad Imran, Taehyun Kwon, Joon-Sung Yang:
ADAPT: A Write Disturbance-Aware Programming Technique for Scaled Phase Change Memory. 950-963 - Jincheng Yu, Zhilin Xu, Shulin Zeng, Chao Yu, Jiantao Qiu, Zhaoyang Shen, Yuanfan Xu, Guohao Dai, Yu Wang, Huazhong Yang:
INCAME: Interruptible CNN Accelerator for Multirobot Exploration. 964-978 - Huimei Cheng, Xi Li, Yichen Gu, Peter A. Beerel:
Converting Flip-Flop to Clock-Gated 3-Phase Latch-Based Designs Using Graph-Based Retiming. 979-992 - Chia-Chih Chi, Jie-Hong R. Jiang:
Logic Synthesis of Binarized Neural Networks for Efficient Circuit Implementation. 993-1005 - Saurabh Dash, Yandong Luo, Anni Lu, Shimeng Yu, Saibal Mukhopadhyay:
Robust Processing-In-Memory With Multibit ReRAM Using Hessian-Driven Mixed-Precision Computation. 1006-1019 - Moritz Scherer, Georg Rutishauser, Lukas Cavigelli, Luca Benini:
CUTIE: Beyond PetaOp/s/W Ternary DNN Inference Acceleration With Better-Than-Binary Energy Efficiency. 1020-1033 - Arman Iranfar, Marina Zapater, David Atienza:
Multiagent Reinforcement Learning for Hyperparameter Optimization of Convolutional Neural Networks. 1034-1047 - Zihao Yuan, Prachi Shukla, Sofiane Chetoui, Sean S. Nemtzow, Sherief Reda, Ayse K. Coskun:
PACT: An Extensible Parallel Thermal Simulator for Emerging Integration and Cooling Technologies. 1048-1061 - Federico Terraneo, Alberto Leva, William Fornaciari, Marina Zapater, David Atienza:
3D-ICE 3.0: Efficient Nonlinear MPSoC Thermal Simulation With Pluggable Heat Sink Models. 1062-1075 - Andrew B. Kahng, Lutong Wang, Bangqi Xu:
TritonRoute-WXL: The Open-Source Router With Integrated DRC Engine. 1076-1089 - Jin-Tai Yan:
Tree-Based Clock Distribution of Multiple-Stage Pipelined Architecture in Rapid Single-Flux-Quantum Circuits. 1090-1102 - Jianli Chen, Ziran Zhu, Longkun Guo, Yu-Wei Tseng, Yao-Wen Chang:
Mixed-Cell-Height Placement With Drain-to-Drain Abutment and Region Constraints. 1103-1115 - Zhe Jiang, Shuai Zhao, Ran Wei, Dawei Yang, Richard Paterson, Nan Guan, Yan Zhuang, Neil C. Audsley:
Bridging the Pragmatic Gaps for Mixed-Criticality Systems in the Automotive Industry. 1116-1129 - Irith Pomeranz:
Static Test Compaction Using Independent Suffixes of a Transparent-Scan Sequence. 1130-1141 - Sangmin Park, Minho Cheong, Donghyun Han, Sungho Kang:
Herringbone-Based TSV Architecture for Clustered Fault Repair and Aging Recovery. 1142-1153 - Sreeja Rajendran, Mary Lourde Regeena:
A Novel Algorithm for Hardware Trojan Detection Through Reverse Engineering. 1154-1166 - Faiq Khalid, Imran Hafeez Abbassi, Semeen Rehman, Awais Mehmood Kamboh, Osman Hasan, Muhammad Shafique:
ForASec: Formal Analysis of Hardware Trojan-Based Security Vulnerabilities in Sequential Circuits. 1167-1180 - Mehran Goli, Rolf Drechsler:
Through the Looking Glass: Automated Design Understanding of SystemC-Based VPs at the ESL. 1181-1185 - Junnan Shan, Mihai T. Lazarescu, Jordi Cortadella, Luciano Lavagno, Mario R. Casu:
Fast Energy-Optimal Multikernel DNN-Like Application Allocation on Multi-FPGA Platforms. 1186-1190 - Theresa Kahale, Dani Tannir:
Memristor Modeling Using the Modified Nodal Analysis Approach. 1191-1195
Volume 41, Number 5, May 2022
- Qi Xu, Wenhao Sun, Song Chen, Yi Kang, Xiaoqing Wen:
Cellular Structure-Based Fault-Tolerance TSV Configuration in 3D-IC. 1196-1208 - Ahmet Faruk Budak, Miguel Gandara, Wei Shi, David Z. Pan, Nan Sun, Bo Liu:
An Efficient Analog Circuit Sizing Method Based on Machine Learning Assisted Global Optimization. 1209-1221 - Zhengqi Gao, Ron Rohrer:
Efficient Non-Monte-Carlo Yield Estimation. 1222-1235 - Ying Wang, Yintao He, Long Cheng, Huawei Li, Xiaowei Li:
A Fast Precision Tuning Solution for Always-On DNN Accelerators. 1236-1248 - Davide Zoni, Luca Cremona, William Fornaciari:
Design of Side-Channel-Resistant Power Monitors. 1249-1263 - Davide Poggi, Thomas Ordas, Alexandre Sarafianos, Philippe Maurine:
Checking Robustness Against EM Side-Channel Attacks Prior to Manufacturing. 1264-1275 - Farzad Niknia, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi:
Aging Effects on Template Attacks Launched on Dual-Rail Protected Chips. 1276-1289 - Yufei Cui, Qiao Li, Tei-Wei Kuo, Chun Jason Xue:
Online Rare Category Identification and Data Diversification for Edge Computing. 1290-1301 - Yi Wang, Jiangfan Huang, Jing Chen, Rui Mao:
PVSensing: A Process-Variation-Aware Space Allocation Strategy for 3D NAND Flash Memory. 1302-1315 - Hui Chen, Peng Chen, Jun Zhou, Luan H. K. Duong, Weichen Liu:
ArSMART: An Improved SMART NoC Design Supporting Arbitrary-Turn Transmission. 1316-1329 - Jeongbin Kim, Yongwoon Song, Kyungseon Cho, Hyukjun Lee, Hongil Yoon, Eui-Young Chung:
STT-MRAM-Based Multicontext FPGA for Multithreading Computing Environment. 1330-1343 - Yunhui Qiu, Wenbo Yin, Lingli Wang:
A High-Performance and Scalable NVMe Controller Featuring Hardware Acceleration. 1344-1357 - Yuke Wang, Boyuan Feng, Gushu Li, Lei Deng, Yuan Xie, Yufei Ding:
STPAcc: Structural TI-Based Pruning for Accelerating Distance-Related Algorithms on CPU-FPGA Platforms. 1358-1370 - Mohammed Abderehman, Jayprakash Patidar, Jay H. Oza, Yom Nigam, T. M. Abdul Khader, Chandan Karfa:
FastSim: A Fast Simulation Framework for High-Level Synthesis. 1371-1385 - Xiaotong Cui, Xing Zhang, Hao Yan, Liang Zhang, Kefei Cheng, Yu Wu, Kaijie Wu:
Toward Building and Optimizing Trustworthy Systems Using Untrusted Components: A Graph-Theoretic Perspective. 1386-1399 - Alexander A. Barkalov, Larysa Titarenko, Kamil Mielcarek:
Reducing LUT Count for Mealy FSMs With Transformation of States. 1400-1411 - Chia-Chun Lin, Ciao-Syun Lin, You-Hsuen Tsai, Yung-Chih Chen, Chun-Yao Wang:
Don't Care Computation and De Morgan Transformation for Threshold Logic Network Optimization. 1412-1422 - Rachel Sterneck, Abhishek Moitra, Priyadarshini Panda:
Noise Sensitivity-Based Energy Efficient and Robust Adversary Detection in Neural Networks. 1423-1435 - Gang Li, Zejian Liu, Fanrong Li, Jian Cheng:
Block Convolution: Toward Memory-Efficient Inference of Large-Scale CNNs on FPGA. 1436-1447 - Tsung-Wei Huang, Dian-Lun Lin, Yibo Lin, Chun-Xun Lin:
Taskflow: A General-Purpose Parallel and Heterogeneous Task Programming System. 1448-1452 - Jinwei Zhang, Sheriff Sadiqbatcha, Michael O'Dea, Hussam Amrouch, Sheldon X.-D. Tan:
Full-Chip Power Density and Thermal Map Characterization for Commercial Microprocessors Under Heat Sink Cooling. 1453-1466 - Ming Yang, Wenjian Yu, Mingye Song, Ning Xu:
Volume Reduction and Fast Generation of the Precharacterization Data for Floating Random Walk-Based Capacitance Extraction. 1467-1480 - Renan Netto, Sheiny Fabre, Tiago Augusto Fontana, Vinicius S. Livramento, Laércio Lima Pilla, Laleh Behjat, José Luís Güntzel:
Algorithm Selection Framework for Legalization Using Deep Convolutional Neural Networks and Transfer Learning. 1481-1494 - Chung-Kuan Cheng, Andrew B. Kahng, Hayoung Kim, Minsoo Kim, Daeyeal Lee, Dongwon Park, Mingyu Woo:
PROBE2.0: A Systematic Framework for Routability Assessment From Technology to Design in Advanced Nodes. 1495-1508 - Behnaz Ranjbar, Ali Hosseinghorban, Mohammad Salehi, Alireza Ejlali, Akash Kumar:
Toward the Design of Fault-Tolerance-Aware and Peak-Power-Aware Multicore Mixed-Criticality Systems. 1509-1522 - Boqian Wang, Zhonghai Lu:
Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture. 1523-1536 - Biresh Kumar Joardar, Aryan Deshwal, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty:
High-Throughput Training of Deep CNNs on ReRAM-Based Heterogeneous Architectures via Optimized Normalization Layers. 1537-1549 - Syuan-Hao Sie, Jye-Luen Lee, Yi-Ren Chen, Zuo-Wei Yeh, Zhaofang Li, Chih-Cheng Lu, Chih-Cheng Hsieh, Meng-Fan Chang, Kea-Tiong Tang:
MARS: Multimacro Architecture SRAM CIM-Based Accelerator With Co-Designed Compressed Neural Networks. 1550-1562 - Jun-Yu Yang, Shi-Yu Huang:
Process-Resilient Fault-Tolerant Delay-Locked Loop Using TMR With Dynamic Timing Correction. 1563-1572 - Alireza Mahzoon, Daniel Große, Rolf Drechsler:
RevSCA-2.0: SCA-Based Formal Verification of Nontrivial Multipliers Using Reverse Engineering and Local Vanishing Removal. 1573-1586 - Irith Pomeranz:
Multicycle Tests With Fault Detection Test Data for Improved Logic Diagnosis. 1587-1591
Volume 41, Number 6, June 2022
- Andres Goens, Timo Nicolai, Jerónimo Castrillón:
mpsym: Improving Design-Space Exploration of Clustered Manycores With Arbitrary Topologies. 1592-1605 - Xiaofan Zhang, Yuan Ma, Jinjun Xiong, Wen-Mei W. Hwu, Volodymyr V. Kindratenko, Deming Chen:
Exploring HW/SW Co-Design for Video Analysis on CPU-FPGA Heterogeneous Systems. 1606-1619 - Lin Cheng, Peitian Pan, Zhongyuan Zhao, Krithik Ranjan, Jack Weber, Bandhav Veluri, Seyed Borna Ehsani, Max Ruttenberg, Dai Cheol Jung, Preslav Ivanov, Dustin Richmond, Michael B. Taylor, Zhiru Zhang, Christopher Batten:
A Tensor Processing Framework for CPU-Manycore Heterogeneous Systems. 1620-1635 - Emanuele Parisi, Francesco Barchi, Andrea Bartolini, Andrea Acquaviva:
Making the Most of Scarce Input Data in Deep Learning-Based Source Code Classification for Heterogeneous Device Mapping. 1636-1648 - Nicola Capodieci, Roberto Cavicchioli, Andrea Marongiu:
A Taxonomy of Modern GPGPU Programming Methods: On the Benefits of a Unified Specification. 1649-1662 - Ismail Emir Yüksel, Behzad Salami, Oguz Ergin, Osman Sabri Unsal, Adrián Cristal Kestelman:
MoRS: An Approximate Fault Modeling Framework for Reduced-Voltage SRAMs. 1663-1673 - Adam Siemieniuk, Lorenzo Chelini, Asif Ali Khan, Jerónimo Castrillón, Andi Drebes, Henk Corporaal, Tobias Grosser, Martin Kong:
OCC: An Automated End-to-End Machine Learning Optimizing Compiler for Computing-In-Memory. 1674-1686 - Gowrish Basavarajappa, Raafat R. Mansour:
An Efficient EM-Based Synthesis Technique for Single-Band and Dual-Band Waveguide Filters. 1687-1692 - Quan Chen:
EI-NK: A Robust Exponential Integrator Method With Singularity Removal and Newton-Raphson Iterations for Transient Nonlinear Circuit Simulation. 1693-1703 - Pritam Bhattacharjee, Prerna Rana, Bidyut K. Bhattacharyya, Alak Majumder:
Clock-Gated Variable Frequency Signaling to Alleviate Power Supply Noise in a Packaged IC. 1704-1715 - Dominik Sisejkovic, Farhad Merchant, Lennart M. Reimann, Rainer Leupers:
Deceptive Logic Locking for Hardware Integrity Protection Against Machine Learning Attacks. 1716-1729 - Nidish Vashistha, Hangwei Lu, Qihang Shi, Damon L. Woodard, Navid Asadizanjani, Mark M. Tehranipoor:
Detecting Hardware Trojans Using Combined Self-Testing and Imaging. 1730-1743 - Morteza Soltani, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram:
An Adaptive Memory-Side Encryption Method for Improving Security and Lifetime of PCM-Based Main Memory. 1744-1756 - Che-Wei Chang, Chun-Feng Wu, Yuan-Hao Chang, Ming-Chang Yang, Chieh-Fu Chang:
Leveraging Write Heterogeneity of Phase Change Memory on Supporting Self-Balancing Binary Tree. 1757-1770 - Jinhua Cui, Weiguang Liu, Jianhang Huang, Laurence T. Yang:
ADS: Leveraging Approximate Data for Efficient Data Sanitization in SSDs. 1771-1784 - Jinhua Cui, Cheng Liu, Junwei Liu, Jianhang Huang, Laurence T. Yang:
Exploiting Uncorrectable Data Reuse for Performance Improvement of Flash Memory. 1785-1798 - Xiangzhong Luo, Di Liu, Shuo Huai, Hao Kong, Hui Chen, Weichen Liu:
Designing Efficient DNNs via Hardware-Aware Neural Architecture Search and Beyond. 1799-1812 - Di Liu, Shi-Gui Yang, Zhenli He, Mingxiong Zhao, Weichen Liu:
CARTAD: Compiler-Assisted Reinforcement Learning for Thermal-Aware Task Scheduling and DVFS on Multicores. 1813-1826 - Necati Uysal, Baogang Zhang, Sumit Kumar Jha, Rickard Ewetz:
XMAP: Programming Memristor Crossbars for Analog Matrix-Vector Multiplication: Toward High Precision Using Representable Matrices. 1827-1841 - Taozhong Li, Naifeng Jing, Zhigang Mao, Yiran Chen:
A Hybrid-Grained Remapping Defense Scheme Against Hard Failures for Row-Column-NVM. 1842-1854 - Ankit Wagle, Sarma B. K. Vrudhula:
Heterogeneous FPGA Architecture Using Threshold Logic Gates for Improved Area, Power, and Performance. 1855-1867 - Zi Wang, Benjamin Carrion Schafer:
SSSL: Secure Search Space Locking of Behavioral IPs. 1868-1877 - Georgios Tziantzioulis, Ting-Jung Chang, Jonathan Balkind, Jinzheng Tu, Fei Gao, David Wentzlaff:
OPDB: A Scalable and Modular Design Benchmark. 1878-1887 - Bentian Jiang, Jingsong Chen, Jinwei Liu, Lixin Liu, Fangzhou Wang, Xiaopeng Zhang, Evangeline F. Y. Young:
CU.POKer: Placing DNNs on WSE With Optimal Kernel Sizing and Efficient Protocol Optimization. 1888-1901 - Kai Huang, Siang Chen, Bowen Li, Luc Claesen, Hao Yao, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong:
Acceleration-Aware Fine-Grained Channel Pruning for Deep Neural Networks via Residual Gating. 1902-1915 - Shiyu Xu, Qi Wang, Xingbo Wang, Shihang Wang, Terry Tao Ye:
Multiplication Through a Single Look-Up-Table (LUT) in CNN Inference Computation. 1916-1928 - Jeongwoo Heo, Kwangok Jeong, Jungyun Choi, Taewhan Kim, Kyumyung Choi:
Hardware Performance Monitoring Methodology at Near-Threshold Computing and Advanced Technology Nodes: From Design to Postsilicon. 1929-1942 - Supriyo Maji, Cheng-Kok Koh:
A Scalable, Memory-Efficient Algorithm for Minimum Cycle Mean Calculation in Directed Graphs. 1943-1956 - Genggeng Liu, Xinghai Zhang, Wenzhong Guo, Xing Huang, Wen-Hao Liu, Kai-Yuan Chao, Ting-Chi Wang:
Timing-Aware Layer Assignment for Advanced Process Technologies Considering via Pillars. 1957-1970 - Lanlan Cui, Xiaojian Liu, Fei Wu, Zhonghai Lu, Changsheng Xie:
A Low Bit-Width LDPC Min-Sum Decoding Scheme for NAND Flash. 1971-1975
Volume 41, Number 7, July 2022
- Inga Abel, Maximilian Neuner, Helmut E. Graeb:
A Hierarchical Performance Equation Library for Basic Op-Amp Design. 1976-1989 - Tinghuan Chen, Qi Sun, Canhui Zhan, Changze Liu, Huatao Yu, Bei Yu:
Deep H-GCN: Fast Analog IC Aging-Induced Degradation Estimation. 1990-2003 - Michael Zuzak, Ankit Mondal, Ankur Srivastava:
Evaluating the Security of Logic-Locked Probabilistic Circuits. 2004-2009 - Dimitris Mouris, Charles Gouert, Nektarios Georgios Tsoutsos:
Privacy-Preserving IP Verification. 2010-2023 - Zongsheng Hou, Neng Zhang, Bohan Yang, Hanning Wang, Min Zhu, Shouyi Yin, Shaojun Wei, Leibo Liu:
Efficient FHE Radix-2 Arithmetic Operations Based on Redundant Encoding. 2024-2037 - Donghyun Min, Yungwoo Ko, Ryan Walker, Junghee Lee, Youngjae Kim:
A Content-Based Ransomware Detection and Backup Solid-State Drive for Ransomware Defense. 2038-2051 - Rana Elnaggar, Siyuan Chen, Peilin Song, Krishnendu Chakrabarty:
Securing SoCs With FPGAs Against Rowhammer Attacks. 2052-2065 - Rana Elnaggar, Lorenzo Servadei, Shubham Mathur, Robert Wille, Wolfgang Ecker, Krishnendu Chakrabarty:
Accurate and Robust Malware Detection: Running XGBoost on Runtime Data From Performance Counters. 2066-2079 - Hengshan Yue, Xiaohui Wei, Jingweijia Tan, Nan Jiang, Meikang Qiu:
Eff-ECC: Protecting GPGPUs Register File With a Unified Energy-Efficient ECC Mechanism. 2080-2093 - Zihan Zhang, Jianfei Jiang, Yongxin Zhu, Qin Wang, Zhigang Mao, Naifeng Jing:
A Universal RRAM-Based DNN Accelerator With Programmable Crossbars Beyond MVM Operator. 2094-2106 - Dinesh Rajasekharan, Amol D. Gaidhane, Amit Ranjan Trivedi, Yogesh Singh Chauhan:
Ferroelectric FET-Based Implementation of FitzHugh-Nagumo Neuron Model. 2107-2114 - Yintao He, Ying Wang, Huawei Li, Xiaowei Li:
Saving Energy of RRAM-Based Neural Accelerator Through State-Aware Computing. 2115-2127 - Jinyu Zhan, Wei Jiang, Ying Li, Junting Wu, Jianping Zhu, Jinghuan Yu:
Accelerating Queries of Big Data Systems by Storage-Side CPU-FPGA Co-Design. 2128-2141 - Lana Josipovic, Andrea Guerrieri, Paolo Ienne:
From C/C++ Code to High-Performance Dataflow Circuits. 2142-2155 - Bosheng Liu, Xiaoming Chen, Yinhe Han, Jigang Wu, Liang Chang, Peng Liu, Haobo Xu:
Search-Free Inference Acceleration for Sparse Convolutional Neural Networks. 2156-2169 - Renjian Pan, Zhaobo Zhang, Xin Li, Krishnendu Chakrabarty, Xinli Gu:
Unsupervised Two-Stage Root-Cause Analysis for Integrated Systems. 2170-2184 - Xing Huang, Youlin Pan, Grace Li Zhang, Bing Li, Wenzhong Guo, Tsung-Yi Ho, Ulf Schlichtmann:
PathDriver+: Enhanced Path-Driven Architecture Design for Flow-Based Microfluidic Biochips. 2185-2198 - Shenglan Ni, Houpeng Chen, Xi Li, Yu Lei, Qian Wang, Yi Lv, Guangming Zhang, Sannian Song, Zhitang Song:
Silicon Modeling of Spiking Neurons With Diverse Dynamic Behaviors. 2199-2212 - Jiahua Li, Ron Rohrer:
Efficient Static-Driven Integration for Step-Function Transient Simulation. 2213-2222 - Steven Herbst, Gabriel Rutsch, Wolfgang Ecker, Mark Horowitz:
An Open-Source Framework for FPGA Emulation of Analog/Mixed-Signal Integrated Circuit Designs. 2223-2236 - Yu-Sheng Lu, Yan-Lin Chen, Sheng-Jung Yu, Yao-Wen Chang:
Topological Structure and Physical Layout Co-Design for Wavelength-Routed Optical Networks-on-Chip. 2237-2249 - Mengting Lu, Fang Wang, Zongwei Li, Wenpeng He:
EDC: An Elastic Data Cache to Optimizing the I/O Performance in Deduplicated SSDs. 2250-2262 - Rassul Bairamkulov, Abinash Roy, Mahalingam Nagarajan, Vaishnav Srinivas, Eby G. Friedman:
SPROUT - Smart Power Routing Tool for Board-Level Exploration and Prototyping. 2263-2275 - Romain Mercier, Cédric Killian, Angeliki Kritikakou, Youri Helen, Daniel Chillet:
BiSuT: A NoC-Based Bit-Shuffling Technique for Multiple Permanent Faults Mitigation. 2276-2289 - Bartosz Kaczmarek, Grzegorz Mrugalski, Nilanjan Mukherjee, Artur Pogiel, Janusz Rajski, Lukasz Rybak, Jerzy Tyszer:
LBIST for Automotive ICs With Enhanced Test Generation. 2290-2300 - Ching-Yuan Chen, Krishnendu Chakrabarty:
Efficient Identification of Critical Faults in Memristor-Based Inferencing Accelerators. 2301-2314 - Irith Pomeranz:
GEPDFs: Path Delay Faults Based on Two-Cycle Gate-Exhaustive Faults. 2315-2322 - Chong-Siao Ye, Shi-Xuan Zheng, Fong-Jyun Tsai, Chen Wang, Kuen-Jong Lee, Wu-Tung Cheng, Sudhakar M. Reddy, Justyna Zawada, Mark Kassab, Janusz Rajski:
Efficient Test Compression Configuration Selection. 2323-2336 - Jun-Yu Yang, Shi-Yu Huang:
Tiny Phase-Error Monitor for Fault and Soft-Error-Tolerant DLL to Support Graceful Degradation and Module-Level Testing. 2337-2347 - Arjun Chaudhuri, Chunsheng Liu, Xiaoxin Fan, Krishnendu Chakrabarty:
C-Testing and Efficient Fault Localization for AI Accelerators. 2348-2361 - Sudipa Mandal, Pallab Dasgupta:
Migrating Assertions From Dense to Discrete Time. 2362-2371
Volume 41, Number 8, August 2022
- Xiaopeng Wu, Mingpeng Cao, Guangbao Shan, Yintang Yang:
A Fast Analysis Method of Multiphysics Coupling for 3-D Microsystem. 2372-2379 - Satyajit Mohapatra, Nihar Ranjan Mohapatra:
Dispersion in Placement: Quantification and Insights. 2380-2392 - Zahra Ramezani, Koen Claessen, Nicholas Smallbone, Martin Fabian, Knut Åkesson:
Testing Cyber-Physical Systems Using a Line-Search Falsification Method. 2393-2406 - Yangguang Cui, Kun Cao, Guitao Cao, Meikang Qiu, Tongquan Wei:
Client Scheduling and Resource Management for Efficient Training in Heterogeneous IoT-Edge Federated Learning. 2407-2420 - Jiaji He, Haocheng Ma, Max Panoff, Hanning Wang, Yiqiang Zhao, Leibo Liu, Xiaolong Guo, Yier Jin:
Security Oriented Design Framework for EM Side-Channel Protection in RTL Implementations. 2421-2434 - Lilas Alrahis, Abhrajit Sengupta, Johann Knechtel, Satwik Patnaik, Hani H. Saleh, Baker Mohammad, Mahmoud Al-Qutayri, Ozgur Sinanoglu:
GNN-RE: Graph Neural Networks for Reverse Engineering of Gate-Level Netlists. 2435-2448 - Julian Leonhard, Nimisha Limaye, Shadi Turk, Alhassan Sayed, Alán Rodrigo Díaz Rizo, Hassan Aboushady, Ozgur Sinanoglu, Haralampos-G. Stratigopoulos:
Digitally Assisted Mixed-Signal Circuit Security. 2449-2462 - Shuo-Han Chen, Chun-Feng Wu, Ming-Chang Yang, Yuan-Hao Chang:
A File-Oriented Fast Secure Deletion Strategy for Shingled Magnetic Recording Drives. 2463-2476 - Yubiao Pan, Hao Chen, Jianing Zhao, Yinlong Xu:
HCFTL: A Locality-Aware Flash Translation Layer for Efficient Address Translation. 2477-2489 - Mohamed Ibrahim, Zhanwei Zhong, Bhargab B. Bhattacharya, Krishnendu Chakrabarty:
Efficient Regulation of Synthetic Biocircuits Using Droplet-Aliquot Operations on MEDA Biochips. 2490-2503 - Mahmoud Elfar, Tung-Che Liang, Krishnendu Chakrabarty, Miroslav Pajic:
Formal Synthesis of Adaptive Droplet Routing for MEDA Biochips. 2504-2517 - Matthias Függer, Attila Kinali, Christoph Lenzen, Ben Wiederhake:
Fast All-Digital Clock Frequency Adaptation Circuit for Voltage Droop Tolerance. 2518-2531 - Mohamed A. Elgammal, Kevin E. Murray, Vaughn Betz:
RLPlace: Using Reinforcement Learning and Smart Perturbations to Optimize FPGA Placement. 2532-2545 - Yun Liang, Qingcheng Xiao, Liqiang Lu, Jiaming Xie:
FCNNLib: A Flexible Convolution Algorithm Library for Deep Learning on FPGAs. 2546-2559 - Xin Fan, Niklas Meyer, Tobias Gemmeke:
Compiling All-Digital-Embedded Content Addressable Memories on Chip for Edge Application. 2560-2572 - Siang-Yun Lee, Heinz Riener, Alan Mishchenko, Robert K. Brayton, Giovanni De Micheli:
A Simulation-Guided Paradigm for Logic Synthesis and Verification. 2573-2586 - Pengcheng Zhu, Shiguang Feng, Zhijin Guan:
An Iterated Local Search Methodology for the Qubit Mapping Problem. 2587-2597 - Yifan Chang, Yifan Wang, Jian Peng, Ziyi Dong, Haifeng Li, Wenbo Li:
MFS: A Brain-Inspired Memory Formation System for GAN. 2598-2610 - Wei Jiang, Xiangyu Wen, Jinyu Zhan, Xupeng Wang, Ziwei Song:
Interpretability-Guided Defense Against Backdoor Attacks to Deep Neural Networks. 2611-2624 - Abhiroop Bhattacharjee, Lakshya Bhatnagar, Youngeun Kim, Priyadarshini Panda:
NEAT: Nonlinearity Aware Training for Accurate, Energy-Efficient, and Robust Implementation of Neural Networks on 1T-1R Crossbars. 2625-2637 - Paolo Manfredi, Riccardo Trinchero:
A Probabilistic Machine Learning Approach for the Uncertainty Quantification of Electronic Circuits Based on Gaussian Process Regression. 2638-2651 - Luigi Colalongo, Anna Richelli:
A Second-Order Surface Potential Core Model for Submicron MOSFETs. 2652-2656 - Hao Geng, Yuzhe Ma, Qi Xu, Jin Miao, Subhendu Roy, Bei Yu:
High-Speed Adder Design Space Exploration via Graph Neural Processes. 2657-2670 - Bentian Jiang, Lixin Liu, Yuzhe Ma, Bei Yu, Evangeline F. Y. Young:
Neural-ILT 2.0: Migrating ILT to Domain-Specific and Multitask-Enabled Neural Network. 2671-2684 - Hao Geng, Haoyu Yang, Lu Zhang, Fan Yang, Xuan Zeng, Bei Yu:
Hotspot Detection via Attention-Based Deep Layout Metric Learning. 2685-2698 - Jin-Tai Yan:
Bus Assignment Considering Flexible Escape Routing for Layer Minimization in PCB Designs. 2699-2713 - Mahmut Burak Karadeniz, Mustafa Altun:
TALIPOT: Energy-Efficient DNN Booster Employing Hybrid Bit Parallel-Serial Processing in MSB-First Fashion. 2714-2727 - Muhammad Ibtesam, Umair Saeed Solangi, Jinuk Kim, Muhammad Adil Ansari, Sungju Park:
Highly Efficient Test Architecture for Low-Power AI Accelerators. 2728-2738 - Hogyeong Kim, Hayoung Lee, Donghyun Han, Sungho Kang:
Multibank Optimized Redundancy Analysis Using Efficient Fault Collection. 2739-2752 - Jen-Wei Hsieh, Yueh-Ting Hou, Tai-Chieh Chang:
Alternative Encoding: A Two-Step Transition Reduction Scheme for MLC STT-RAM Cache. 2753-2757 - Md Rubel Ahmed, Hao Zheng, Parijat Mukherjee, Mahesh C. Ketkar, Jin Yang:
Mining Patterns From Concurrent Execution Traces. 2758-2762 - Pragnan Chakravorty:
A Modified General Diode Equation. 2763-2767
Volume 41, Number 9, September 2022
- Kangkang Xu, Yang Yu, Xu Fang:
The Detection of Open and Leakage Faults for Prebond TSV Test Based on Weak Current Source. 2768-2779 - Konstantinos Touloupas, Paul P. Sotiriadis:
LoCoMOBO: A Local Constrained Multiobjective Bayesian Optimization for Analog Circuit Sizing. 2780-2793 - Keertana Settaluri, Zhaokai Liu, Rishubh Khurana, Arash Mirhaj, Rajeev Jain, Borivoje Nikolic:
Automated Design of Analog Circuits Using Reinforcement Learning. 2794-2807 - Yongchen Wang, Ying Wang, Huawei Li, Xiaowei Li:
An Efficient Deep Learning Accelerator Architecture for Compressed Video Analysis. 2808-2820 - Honghui Tang, Qiang Liu:
MPFA: An Efficient Multiple Faults-Based Persistent Fault Analysis Method for Low-Cost FIA. 2821-2834 - Chun-Feng Wu, Martin Kuo, Ming-Chang Yang, Yuan-Hao Chang:
Performance Enhancement of SMR-Based Deduplication Systems. 2835-2848 - Weiguang Pang, Xu Jiang, Mingsong Lv, Teng Gao, Di Liu, Wang Yi:
Toward the Predictability of Dynamic Real-Time DNN Inference. 2849-2862 - David Kuang-Hui Yu, Jen-Wei Hsieh:
Differential Evolution Algorithm With Asymmetric Coding for Solving the Reliability Problem of 3D-TLC CT Flash-Memory Storage Systems. 2863-2876 - Yang Wang, Xu Jiang, Nan Guan, Yue Tang, Weichen Liu:
Locking Protocols for Parallel Real-Time Tasks With Semaphores Under Federated Scheduling. 2877-2890 - Yiwen Zhang:
Energy-Aware Nonpreemptive Scheduling of Mixed-Criticality Real-Time Task Systems. 2891-2900 - Saravanan Sethuraman, Venkata Kalyan Tavva, M. B. Srinivas:
Techniques to Improve Write and Retention Reliability of STT-MRAM Memory Subsystem. 2901-2914 - Mark Wijtvliet, Akash Kumar, Henk Corporaal:
Blocks: Challenging SIMDs and VLIWs With a Reconfigurable Architecture. 2915-2928 - Baofen Yuan, Jianfeng Zhu, Xingchen Man, Zijiao Ma, Shouyi Yin, Shaojun Wei, Leibo Liu:
Dynamic-II Pipeline: Compiling Loops With Irregular Branches on Static-Scheduling CGRA. 2929-2942 - Khouloud Bouaziz, Sonda Chtourou, Zied Marrakchi, Abdulfattah Mohammad Obeid, Mohamed Abid:
Mesh of Trees FPGA Architecture: Exploration and Optimization. 2943-2956 - Tao Luo, Liwei Yang, Huaipeng Zhang, Chuping Qu, Xuan Wang, Yingnan Cui, Weng-Fai Wong, Rick Siow Mong Goh:
NC-Net: Efficient Neuromorphic Computing Using Aggregated Subnets on a Crossbar-Based Architecture With Nonvolatile Memory. 2957-2969 - Sanjai Narain, Emily Mak, Dana Chee, Brendan J. Englot, Kishore Pochiraju, Niraj K. Jha, Karthik S. Narayan:
Fast Design Space Exploration of Nonlinear Systems: Part I. 2970-2983 - Prerit Terway, Kenza Hamidouche, Niraj K. Jha:
Fast Design Space Exploration of Nonlinear Systems: Part II. 2984-2999 - Renao Yan, Qinghui Hong, Chunhua Wang, Jingru Sun, Ya Li:
Multilayer Memristive Neural Network Circuit Based on Online Learning for License Plate Detection. 3000-3011 - Shayan Hassantabar, Zeyu Wang, Niraj K. Jha:
SCANN: Synthesis of Compact and Accurate Neural Networks. 3012-3025 - Myeonggu Kang, Hyein Shin, Lee-Sup Kim:
A Framework for Accelerating Transformer-Based Language Model on ReRAM-Based Architecture. 3026-3039 - Abdelrahman Hosny, Sherief Reda:
Characterizing and Optimizing EDA Flows for the Cloud. 3040-3051 - Cong Xu, Chunhua Wang, Jinguang Jiang, Jingru Sun, Hairong Lin:
Memristive Circuit Implementation of Context-Dependent Emotional Learning Network and Its Application in Multitask. 3052-3065 - Liang Chen, Sheriff Sadiqbatcha, Hussam Amrouch, Sheldon X.-D. Tan:
Electrothermal Simulation and Optimal Design of Thermoelectric Cooler Using Analytical Approach. 3066-3077 - Rui Zhang, Taizhi Liu, Kexin Yang, Linda Milor:
CacheEM: For Reliability Analysis on Cache Memory Aging Due to Electromigration. 3078-3091 - Zhifeng Lin, Yanyue Xie, Peng Zou, Sifei Wang, Jun Yu, Jianli Chen:
An Incremental Placement Flow for Advanced FPGAs With Timing Awareness. 3092-3103 - Yi-Chen Lu, Jeehyun Lee, Anthony Agnesina, Kambiz Samadi, Sung Kyu Lim:
A Clock Tree Prediction and Optimization Framework Using Generative Adversarial Learning. 3104-3117 - Guojin Chen, Wanli Chen, Qi Sun, Yuzhe Ma, Haoyu Yang, Bei Yu:
DAMO: Deep Agile Mask Optimization for Full-Chip Scale. 3118-3131 - Yibo Lin, Tong Qu, Zongqing Lu, Yajuan Su, Yayi Wei:
Asynchronous Reinforcement Learning Framework and Knowledge Transfer for Net-Order Exploration in Detailed Routing. 3132-3142 - Qisheng Wang, Riling Li, Mingsheng Ying:
Equivalence Checking of Sequential Quantum Circuits. 3143-3156 - Adrian Tatulian, Ronald F. DeMara:
Nonuniform Compressive Sensing via Ohmic Voltage Attenuation: A Memristive Crossbar Design Approach Leveraging Intrinsic Computation. 3157-3161
Volume 41, Number 10, October 2022
- Martin Rapp, Hussam Amrouch, Yibo Lin, Bei Yu, David Z. Pan, Marilyn Wolf, Jörg Henkel:
MLCAD: A Survey of Research in Machine Learning for CAD Keynote Paper. 3162-3181 - Qi Xu, Hao Geng, Tianming Ni, Song Chen, Bei Yu, Yi Kang, Xiaoqing Wen:
Fortune: A New Fault-Tolerance TSV Configuration in Router-Based Redundancy Structure. 3182-3187 - Sujan K. Gonugondla, Charbel Sakr, Hassan Dbouk, Naresh R. Shanbhag:
Fundamental Limits on Energy-Delay-Accuracy of In-Memory Architectures in Inference Applications. 3188-3201 - Andrew Stern, Huanyu Wang, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor:
ACED-IT: Assuring Confidential Electronic Design Against Insider Threats in a Zero-Trust Environment. 3202-3215 - Pranesh Santikellur, Rajat Subhra Chakraborty:
Correlation Integral-Based Intrinsic Dimension: A Deep-Learning-Assisted Empirical Metric to Estimate the Robustness of Physically Unclonable Functions to Modeling Attacks. 3216-3227 - Yanjiang Liu, Jiaji He, Haocheng Ma, Tongzhou Qu, Zibin Dai:
A Comprehensive Evaluation of Integrated Circuits Side-Channel Resilience Utilizing Three-Independent-Gate Silicon Nanowire Field Effect Transistors-Based Current Mode Logic. 3228-3238 - Behnaz Ranjbar, Ali Hosseinghorban, Siva Satyendra Sahoo, Alireza Ejlali, Akash Kumar:
BOT-MICS: Bounding Time Using Analytics in Mixed-Criticality Systems. 3239-3251 - Zhuo Su, Dongyan Wang, Yixiao Yang, Zehong Yu, Wanli Chang, Wen Li, Aiguo Cui, Yu Jiang, Jiaguang Sun:
MDD: A Unified Model-Driven Design Framework for Embedded Control Software. 3252-3265 - Vanchinathan Venkataramani, Bruno Bodin, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh:
ASCENT: Communication Scheduling for SDF on Bufferless Software-Defined NoC. 3266-3275 - Chenlin Ma, Zhuokai Zhou, Lei Han, Zhaoyan Shen, Yi Wang, Renhai Chen, Zili Shao:
Rebirth-FTL: Lifetime Optimization via Approximate Storage for NAND Flash Memory. 3276-3289 - Dhananjaya Wijerathne, Zhaoying Li, Anuj Pathania, Tulika Mitra, Lothar Thiele:
HiMap: Fast and Scalable High-Quality Mapping on CGRA via Hierarchical Abstraction. 3290-3303 - Yu-Pei Liang, Tseng-Yi Chen, Yuan-Hao Chang, Yi-Da Huang, Wei-Kuan Shih:
Planting Fast-Growing Forest by Leveraging the Asymmetric Read/Write Latency of NVRAM-Based Systems. 3304-3317 - Anirudh Mohan Kaushik, Hiren D. Patel:
Automatic Construction of Predictable and High-Performance Cache Coherence Protocols for Multicore Real-Time Systems. 3318-3331 - Sanchita Saha Ray, Dulal Adak, Surajeet Ghosh:
Worst Case O(N) Comparison-Free Hardware Sorting Engine. 3332-3345 - Rassul Bairamkulov, Tahereh Jabbari, Eby G. Friedman:
QuCTS - Single-Flux Quantum Clock Tree Synthesis. 3346-3358 - Asif Mirza, Febin Sunny, Peter Walsh, Karim Hassan, Sudeep Pasricha, Mahdi Nikdast:
Silicon Photonic Microring Resonators: A Comprehensive Design-Space Exploration and Optimization Under Fabrication-Process Variations. 3359-3372 - Kuan-Yu Chang, Chun-Yi Lee:
Mapping Nearest Neighbor Compliant Quantum Circuits Onto a 2-D Hexagonal Architecture. 3373-3386 - Jungi Lee, Jongeun Lee:
Specializing CGRAs for Light-Weight Convolutional Neural Networks. 3387-3399 - Cheng Liu, Cheng Chu, Dawen Xu, Ying Wang, Qianlong Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning. 3400-3413 - Jinyu Zhan, Ruoxu Sun, Wei Jiang, Yucheng Jiang, Xunzhao Yin, Cheng Zhuo:
Improving Fault Tolerance for Reliable DNN Using Boundary-Aware Activation. 3414-3425 - Ahmet Inci, Mehmet Meric Isgenc, Diana Marculescu:
DeepNVM++: Cross-Layer Modeling and Optimization Framework of Nonvolatile Memories for Deep Learning. 3426-3437 - Yingcheng Bu, Yi Fang, Guohua Zhang, Jun Cheng:
Achievable-Rate-Aware Retention-Error Correction for Multi-Level-Cell NAND Flash Memory. 3438-3451 - Ruslan Dashkin, Rajit Manohar:
General Approach to Asynchronous Circuits Simulation Using Synchronous FPGAs. 3452-3465 - Zizheng Guo, Mingwei Yang, Tsung-Wei Huang, Yibo Lin:
A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs. 3466-3478 - Chengning Wang, Dan Feng, Wei Tong, Jingning Liu, Bing Wu, Yiran Chen:
Space-Time-Efficient Modeling of Large-Scale 3-D Cross-Point Memory Arrays by Operation Adaption and Network Compaction. 3479-3491 - Qi Xu, Hao Geng, Song Chen, Bo Yuan, Cheng Zhuo, Yi Kang, Xiaoqing Wen:
GoodFloorplan: Graph Convolutional Network and Reinforcement Learning-Based Floorplanning. 3492-3502 - Rongjian Liang, Hua Xiang, Diwesh Pandey, Lakshmi N. Reddy, Shyam Ramji, Gi-Joon Nam, Jiang Hu:
Design Rule Violation Prediction at Sub-10-nm Process Nodes Using Customized Convolutional Networks. 3503-3514 - Vidya A. Chhabria, Sachin S. Sapatnekar:
OpeNPDN: A Neural-Network-Based Framework for Power Delivery Network Synthesis. 3515-3528 - Xiqiong Bai, Ziran Zhu, Pingping Li, Jianli Chen, Tingshen Lan, Xingquan Li, Jun Yu, Wenxing Zhu, Yao-Wen Chang:
Timing-Aware Fill Insertions With Design-Rule and Density Constraints. 3529-3542 - Debao Wei, Hua Feng, Liyan Qiao, Cong Hu, Xiyuan Peng:
Experimental Verification and Analysis of the Acceleration Factor Model for 3-D nand Flash Memory. 3543-3547 - Mehdi Safarpour, Lei Xun, Geoff V. Merrett, Olli Silvén:
A High-Level Approach for Energy Efficiency Improvement of FPGAs by Voltage Trimming. 3548-3552 - Irith Pomeranz:
Storage-Based Logic Built-in Self-Test With Multicycle Tests. 3553-3557 - Hao Du, Qian Yang, Xinyue Dai, Xuewen Liao, Anxue Zhang:
A Parameter Extraction Method for LC Circuit of DB-BPF Based on Fully Connected Network. 3558-3562
Volume 41, Number 11, November 2022
- Yu Huang, Long Zheng, Pengcheng Yao, Qinggang Wang, Haifeng Liu, Xiaofei Liao, Hai Jin, Jingling Xue:
ReaDy: A ReRAM-Based Processing-in-Memory Accelerator for Dynamic Graph Convolutional Networks. 3567-3578 - Jiaxian Chen, Yiquan Lin, Kaoyi Sun, Jiexin Chen, Chenlin Ma, Rui Mao, Yi Wang:
GCIM: Toward Efficient Processing of Graph Convolutional Networks in 3D-Stacked Memory. 3579-3590 - Huichuan Zheng, Hao Zhang, Shuo Xu, Fanjin Xu, Mengying Zhao:
Adaptive Mode Transformation for Wear Leveling in Nonvolatile FPGAs. 3591-3601 - Shailja Pandey, Preeti Ranjan Panda:
NeuroMap: Efficient Task Mapping of Deep Neural Networks for Dynamic Thermal Management in High-Bandwidth Memory. 3602-3613 - Rehan Ahmed, Stefan Draskovic, Lothar Thiele:
Stochastic Guarantees for Adaptive Energy Harvesting Systems. 3614-3625 - Chukwufumnanya Ogbogu, Aqeeb Iqbal Arka, Biresh Kumar Joardar, Janardhan Rao Doppa, Hai Helen Li, Krishnendu Chakrabarty, Partha Pratim Pande:
Accelerating Large-Scale Graph Neural Network Training on Crossbar Diet. 3626-3637 - Ying-Jan Wu, Ching-Yu Kuo, Li-Pin Chang:
iNVMFS: An Efficient File System for NVRAM-Based Intermittent Computing Devices. 3638-3649 - Sosei Ikeda, Hiromitsu Awano, Takashi Sato:
Hardware-Friendly Delayed-Feedback Reservoir for Multivariate Time-Series Classification. 3650-3660 - Mohammed Abderehman, Rupak Gupta, Theegala Rakesh Reddy, Chandan Karfa:
BLAST: Belling the Black-Hat High-Level Synthesis Tool. 3661-3672 - Gaoyang Dai, Morteza Mohaqeqi, Petros Voudouris, Wang Yi:
Response-Time Analysis of Limited-Preemptive Sporadic DAG Tasks. 3673-3684 - Junjie Feng, Xianzhang Chen, Duo Liu, Weigong Zhang, Jiapin Wang, Rongwei Zheng, Yujuan Tan:
eRDAC: Efficient and Reliable Remote Direct Access and Control for Embedded Systems. 3685-3696 - Rongwei Zheng, Xianzhang Chen, Duo Liu, Junjie Feng, Jiapin Wang, Ao Ren, Chengliang Wang, Yujuan Tan:
SENTunnel: Fast Path for Sensor Data Access on Automotive Embedded Systems. 3697-3708 - Chenlin Ma, Zhuokai Zhou, Yingping Wang, Yi Wang, Rui Mao:
MAID-Q: Minimizing Tail Latency in Embedded Flash With SMR Disk via -Learning Model. 3709-3720 - Wei-Che Tsai, Wei-Ming Chen, Tei-Wei Kuo, Pi-Cheng Hsiu:
Intermittent-Aware Distributed Concurrency Control. 3721-3732 - Arnaud de Grandmaison, Karine Heydemann, Quentin L. Meunier:
ARMISTICE: Microarchitectural Leakage Modeling for Masked Software Formal Verification. 3733-3744 - Long Zheng, Haifeng Liu, Yu Huang, Dan Chen, Chaoqiang Liu, Haiheng He, Xiaofei Liao, Hai Jin, Jingling Xue:
A Flexible Yet Efficient DNN Pruning Approach for Crossbar-Based Processing-in-Memory Architectures. 3745-3756 - Andrea Fanti, Carlos Chinea Perez, Rémi Denis-Courmont, Gianluca Roascio, Jan-Erik Ekberg:
Toward Register Spilling Security Using LLVM and ARM Pointer Authentication. 3757-3766 - Jan Sommer, M. Akif Özkan, Oliver Keszöcze, Jürgen Teich:
Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks. 3767-3778 - Weidong Zhu, Kevin R. B. Butler:
NASA: NVM-Assisted Secure Deletion for Flash Memory. 3779-3790 - Yin-Chiuan Chen, Chun-Feng Wu, Yuan-Hao Chang, Tei-Wei Kuo:
Exploring Synchronous Page Fault Handling. 3791-3802 - Jiali Li, Xianzhang Chen, Duo Liu, Lin Li, Jiapin Wang, Zhaoyang Zeng, Yujuan Tan, Lei Qiao:
Horae: A Hybrid I/O Request Scheduling Technique for Near-Data Processing-Based SSD. 3803-3813 - Jin-Wei Chang, Tseng-Yi Chen:
When B-Tree Meets Skyrmion Memory: How Skyrmion Memory Affects an Indexing Scheme. 3814-3825 - Lilas Alrahis, Johann Knechtel, Florian Klemme, Hussam Amrouch, Ozgur Sinanoglu:
GNN4REL: Graph Neural Networks for Predicting Circuit Reliability Degradation. 3826-3837 - Ourania Spantidi, Georgios Zervakis, Iraklis Anagnostopoulos, Jörg Henkel:
Energy-Efficient DNN Inference on Approximate Accelerators Through Formal Property Exploration. 3838-3849 - Jiwon Kim, Sungwoo Baek, Seunghyeok Jeon, Hojung Cha:
DynLiB: Maximizing Energy Availability of Hybrid Li-Ion Battery Systems. 3850-3861 - Jinyu Zhan, Zhibei Pu, Wei Jiang, Junting Wu, Yongjia Yang:
Detecting Spoofed Speeches via Segment-Based Word CQCC and Average ZCR for Embedded Systems. 3862-3873 - Shuangshuang Chang, Ran Bi, Jinghao Sun, Weichen Liu, Qi Yu, Qingxu Deng, Zonghua Gu:
Toward Minimum WCRT Bound for DAG Tasks Under Prioritized List Scheduling Algorithms. 3874-3885 - Jiaming Qiu, Ruiqi Wang, Ayan Chakrabarti, Roch Guérin, Chenyang Lu:
Adaptive Edge Offloading for Image Classification Under Rate Limit. 3886-3897 - Banghu Yin, Liqian Chen, Jiangchao Liu, Ji Wang:
Efficient Complete Verification of Neural Networks via Layerwised Splitting and Refinement. 3898-3909 - Yue Tang, Yawen Wu, Peipei Zhou, Jingtong Hu:
Enabling Weakly Supervised Temporal Action Localization From On-Device Learning of the Video Stream. 3910-3921 - Xiaofeng Ding, Chengliang Wang, Heping Liu, Zhihai Zhang, Xianzhang Chen, Yujuan Tan, Duo Liu, Ao Ren:
FRL: Fast and Reconfigurable Accelerator for Distributed Sound Source Localization. 3922-3933 - Elbruz Ozen, Alex Orailoglu:
Architecting Decentralization and Customizability in DNN Accelerators for Hardware Defect Adaptation. 3934-3945 - Dharamjeet, Yi-Shen Chen, Tseng-Yi Chen, Yuan-Hung Kuan, Yuan-Hao Chang:
LLSM: A Lifetime-Aware Wear-Leveling for LSM-Tree on NAND Flash Memory. 3946-3956 - Paolo Pazzaglia, Martina Maggio:
Characterizing the Effect of Deadline Misses on Time-Triggered Task Chains. 3957-3968 - Liren Yang, Hang Zhang, Jean-Baptiste Jeannin, Necmiye Ozay:
Efficient Backward Reachability Using the Minkowski Difference of Constrained Zonotopes. 3969-3980 - Chenchen Fu, Xinhang Lu, Xiaoxing Qiu, Sujunjie Sun, Xueyong Xu, Weiwei Wu, Chun Jason Xue, Song Han:
Throughput Maximization in Wireless Communication Systems Powered by Hybrid Energy Harvesting. 3981-3992 - Weiwei Chen, Ying Wang, Ying Xu, Chengsi Gao, Yinhe Han, Lei Zhang:
Amphis: Managing Reconfigurable Processor Architectures With Generative Adversarial Learning. 3993-4003 - Soumik Sinha, Sayandeep Saha, Manaar Alam, Varun Agarwal, Ayantika Chatterjee, Anoop Mishra, Deepak Khazanchi, Debdeep Mukhopadhyay:
Exploring Bitslicing Architectures for Enabling FHE-Assisted Machine Learning. 4004-4015 - Clara Hobbs, Bineet Ghosh, Shengjie Xu, Parasara Sridhar Duggirala, Samarjit Chakraborty:
Safety Analysis of Embedded Controllers Under Implementation Platform Timing Uncertainties. 4016-4027 - Bingyao Wang, Margo I. Seltzer:
Tinkertoy: Build Your Own Operating Systems for IoT Devices. 4028-4039 - Jiaojiao Wu, Jun Li, Zhibing Sha, Zhigang Cai, Jianwei Liao:
Adaptive Switch on Wear Leveling for Enhancing I/O Latency and Lifetime of High-Density SSDs. 4040-4051 - Francesco Restuccia, Ryan Kastner:
Cut and Forward: Safe and Secure Communication for FPGA System on Chips. 4052-4063 - Xiaohang Wang, Shengjie Wang, Yingtao Jiang, Amit Kumar Singh, Mei Yang, Letian Huang:
Combating Stealthy Thermal Covert Channel Attack With Its Thermal Signal Transmitted in Direct Sequence Spread Spectrum. 4064-4075 - Qiao Li, Min Ye, Yufei Cui, Tianyu Ren, Tei-Wei Kuo, Chun Jason Xue:
Resolving the Reliability Issues of Open Blocks for 3-D NAND Flash: Observations and Strategies. 4076-4087 - Teng Wang, Lei Gong, Chao Wang, Yang Yang, Yingxue Gao, Xuehai Zhou, Huaping Chen:
ViA: A Novel Vision-Transformer Accelerator Based on FPGA. 4088-4099 - Jun Xia, Tian Liu, Zhiwei Ling, Ting Wang, Xin Fu, Mingsong Chen:
PervasiveFL: Pervasive Federated Learning for Heterogeneous IoT Systems. 4100-4111 - Chuxi Li, Xiaoya Fan, Xiaoti Wu, Zhao Yang, Miao Wang, Meng Zhang, Shengbing Zhang:
Memory-Computing Decoupling: A DNN Multitasking Accelerator With Adaptive Data Arrangement. 4112-4123 - Jie Peng, Haijun Liu, Zhongjin Zhao, Zhiwei Li, Sen Liu, Qingjiang Li:
CMQ: Crossbar-Aware Neural Network Mixed-Precision Quantization via Differentiable Architecture Search. 4124-4133 - Nikhil Rangarajan, Johann Knechtel, Nimisha Limaye, Ozgur Sinanoglu, Hussam Amrouch:
A Novel Attack Mode on Advanced Technology Nodes Exploiting Transistor Self-Heating. 4134-4144 - Harsh Sharma, Sumit K. Mandal, Janardhan Rao Doppa, Ümit Y. Ogras, Partha Pratim Pande:
SWAP: A Server-Scale Communication-Aware Chiplet-Based Manycore PIM Accelerator. 4145-4156 - Junjie Shi, Christoph-Cordt von Egidy, Kuan-Hsun Chen, Jian-Jia Chen:
Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS. 4157-4168 - Wojciech Romaszkan, Tianmu Li, Puneet Gupta:
SASCHA - Sparsity-Aware Stochastic Computing Hardware Architecture for Neural Network Acceleration. 4169-4180 - Jiwon Kim, Eunyeong Kim, Seunghyeok Jeon, Junick Ahn, Hyungchol Jun, Hojung Cha:
PVoT: Reconfigurable Photovoltaic Array for Indoor Light Energy-Powered Batteryless Devices. 4181-4192 - Nicole Fronda, Houssam Abbas:
Differentiable Inference of Temporal Logic Formulas. 4193-4204 - Chiao Hsieh, Yangge Li, Dawei Sun, Keyur Joshi, Sasa Misailovic, Sayan Mitra:
Verifying Controllers With Vision-Based Perception Using Safe Approximate Abstractions. 4205-4216 - Bo Liu, Ziyu Wang, Xuetao Wang, Renyuan Zhang, Anfeng Xue, Qiao Shen, Na Xie, Yu Gong, Zhen Wang, Jun Yang, Hao Cai:
An Efficient BCNN Deployment Method Using Quality-Aware Approximate Computing. 4217-4228 - Chih-Hsuan Yen, Hashan Roshantha Mendis, Tei-Wei Kuo, Pi-Cheng Hsiu:
Stateful Neural Networks for Intermittent Systems. 4229-4240 - Gokul Krishnan, Zhenyu Wang, Injune Yeo, Li Yang, Jian Meng, Maximilian Liehr, Rajiv V. Joshi, Nathaniel C. Cady, Deliang Fan, Jae-Sun Seo, Yu Cao:
Hybrid RRAM/SRAM in-Memory Computing for Robust DNN Acceleration. 4241-4252 - Zhiwei Feng, Zonghua Gu, Haichuan Yu, Qingxu Deng, Linwei Niu:
Online Rerouting and Rescheduling of Time-Triggered Flows for Fault Tolerance in Time-Sensitive Networking. 4253-4264 - Manish Goyal, Miheer Dewaskar, Parasara Sridhar Duggirala:
NExG: Provable and Guided State-Space Exploration of Neural Network Control Systems Using Sensitivity Approximation. 4265-4276 - Samuele Germiniani, Graziano Pravadelli:
HARM: A Hint-Based Assertion Miner. 4277-4288 - Jan Spieck, Stefan Wildermann, Jürgen Teich:
On Transferring Application Mapping Knowledge Between Differing MPSoC Architectures. 4289-4300 - Chia-Chih Lin, Ming-Syan Chen:
Enhancing Reliability and Security: A Configurable Poisoning PUF Against Modeling Attacks. 4301-4312 - Jiaen Xu, Xiaohang Wang, Yingtao Jiang, Amit Kumar Singh, Chongyan Gu, Letian Huang, Mei Yang, Shunbin Li:
Secured Data Transmission Over Insecure Networks-on-Chip by Modulating Inter-Packet Delays. 4313-4324 - Mochamad Asri, Andreas Gerstlauer:
CASPHAr: Cache-Managed Accelerator Staging and Pipelining in Heterogeneous System Architectures. 4325-4336 - Sairam Sri Vatsavai, Ishan G. Thakkar:
Photonic Reconfigurable Accelerators for Efficient Inference of CNNs With Mixed-Sized Tensors. 4337-4348 - Hassan Nassar, Lars Bauer, Jörg Henkel:
CaPUF: Cascaded PUF Structure for Machine Learning Resiliency. 4349-4360 - Rose Bohrer, Bashima Islam:
Cyber-Physical Verification of Intermittently Powered Embedded Systems. 4361-4372 - Yiwen Xu, Zijing Yin, Yiwei Hou, Jianzhong Liu, Yu Jiang:
MIDAS: Safeguarding IoT Devices Against Malware via Real-Time Behavior Auditing. 4373-4384 - Priyanka Panigrahi, Abhik Paul, Chandan Karfa:
Quantifying Information Leakage for Security Verification of Compiler Optimizations. 4385-4396 - Yufei Cui, Shangyu Wu, Qiao Li, Antoni B. Chan, Tei-Wei Kuo, Chun Jason Xue:
Bits-Ensemble: Toward Light-Weight Robust Deep Ensemble by Bits-Sharing. 4397-4408 - Aditi Kabra, Stefan Mitsch, André Platzer:
Verified Train Controllers for the Federal Railroad Administration Train Kinematics Model: Balancing Competing Brake and Track Forces. 4409-4420 - Zhenya Zhang, Paolo Arcaini, Xuan Xie:
Online Reset for Signal Temporal Logic Monitoring. 4421-4432 - Linjun Wu, Yupeng Hu, Kehuan Zhang, Wenjia Li, Xiaolin Xu, Wanli Chang:
FLAM-PUF: A Response-Feedback-Based Lightweight Anti-Machine-Learning-Attack PUF. 4433-4444 - Samvid Mistry, Indranil Saha, Swarnendu Biswas:
An MILP Encoding for Efficient Verification of Quantized Deep Neural Networks. 4445-4456 - Feilong Zuo, Zhengxiong Luo, Junze Yu, Ting Chen, Zichen Xu, Aiguo Cui, Yu Jiang:
Vulnerability Detection of ICS Protocols via Cross-State Fuzzing. 4457-4468 - Niccolò Borgioli, Matteo Zini, Daniel Casini, Giorgiomaria Cicero, Alessandro Biondi, Giorgio C. Buttazzo:
An I/O Virtualization Framework With I/O-Related Memory Contention Control for Real-Time Systems. 4469-4480 - Fangzhu Lin, Chunhua Xiao, Weichen Liu, Lin Wu, Chen Shi, Kun Ning:
Fast and Low Overhead Metadata Operations for NVM-Based File System Using Slotted Paging. 4481-4491 - Wen Zhang, Mimi Xie, Caleb Scott, Chen Pan:
Sparsity-Aware Intelligent Spatiotemporal Data Sensing for Energy Harvesting IoT System. 4492-4503 - Zehong Yu, Zhuo Su, Yixiao Yang, Jie Liang, Yu Jiang, Aiguo Cui, Wanli Chang, Rui Wang:
Mercury: Instruction Pipeline Aware Code Generation for Simulink Models. 4504-4515 - Enrico Tabanelli, Giuseppe Tagliavini, Luca Benini:
Optimizing Random Forest-Based Inference on RISC-V MCUs at the Extreme Edge. 4516-4526 - Yuhong Wen, You Zhou, Fei Wu, Shu Li, Zhenghong Wang, Changsheng Xie:
WA-OPShare: Workload-Adaptive Over-Provisioning Space Allocation for Multi-Tenant SSDs. 4527-4538 - Jongouk Choi, Hyunwoo Joe, Changhee Jung:
CapOS: Capacitor Error Resilience for Energy Harvesting Systems. 4539-4550 - Nuzhat Yamin, Ganapati Bhat:
Near-Optimal Energy Management for Energy Harvesting IoT Devices Using Imitation Learning. 4551-4562 - Yuheng Shen, Yiru Xu, Hao Sun, Jianzhong Liu, Zichen Xu, Aiguo Cui, Heyuan Shi, Yu Jiang:
Tardis: Coverage-Guided Embedded Operating System Fuzzing. 4563-4574 - Yi-Chen Lu, Sai Pentapati, Lingjun Zhu, Gauthaman Murali, Kambiz Samadi, Sung Kyu Lim:
A Machine Learning-Powered Tier Partitioning Methodology for Monolithic 3-D ICs. 4575-4586 - Rakibul Hassan, Gaurav Kolhe, Setareh Rafatirad, Houman Homayoun, Sai Manoj Pudukotai Dinakarrao:
A Neural Network-Based Cognitive Obfuscation Toward Enhanced Logic Locking. 4587-4599 - Sven Thijssen, Sumit Kumar Jha, Rickard Ewetz:
COMPACT: Flow-Based Computing on Nanoscale Crossbars With Minimal Semiperimeter and Maximum Dimension. 4600-4611 - Sudip Poddar, Gerold Fink, Werner Haselmayr, Robert Wille:
A Generic Sample Preparation Approach for Different Microfluidic Labs-on-Chips. 4612-4625 - Tianyang Gai, Tong Qu, Shuhan Wang, Xiaojing Su, Renren Xu, Yun Wang, Jing Xue, Yajuan Su, Yayi Wei, Tian-Chun Ye:
Flexible Hotspot Detection Based on Fully Convolutional Network With Transfer Learning. 4626-4638 - Jianli Chen, Zhifeng Lin, Yanyue Xie, Wenxing Zhu, Yao-Wen Chang:
Mixed-Cell-Height Placement With Complex Minimum-Implant-Area Constraints. 4639-4652 - Yu-Sheng Lu, Sheng-Jung Yu, Yao-Wen Chang:
On-Chip Optical Routing With Provably Good Algorithms for Path Clustering and Assignment. 4653-4666 - Zhiyao Xie, Rongjian Liang, Xiaoqing Xu, Jiang Hu, Chen-Chia Chang, Jingyu Pan, Yiran Chen:
Preplacement Net Length and Timing Estimation by Customized Graph Neural Network. 4667-4680 - Jinwei Chen, Zhixiong Di, Jiangyi Shi, Quanyuan Feng, Qiang Wu:
NBLG: A Robust Legalizer for Mixed-Cell-Height Modern Design. 4681-4693 - Fuxun Yu, Zirui Xu, Chenchen Liu, Dimitrios Stamoulis, Di Wang, Yanzhi Wang, Xiang Chen:
AntiDoteX: Attention-Based Dynamic Optimization for Neural Network Runtime Efficiency. 4694-4707 - Jie Xiao, Wenbo Chen, Jungang Lou, Jianhui Jiang, Qianwei Zhou:
Identifying Reliability-Critical Primary Inputs of Combinational Circuits Based on the Model of Gate-Sensitive Attributes. 4708-4720 - Zheng Dong, Cong Liu:
Schedulability Analysis for Coscheduling Real-Time Tasks on Multiprocessors. 4721-4732 - Liqiang Lu, Yun Liang:
Morphling: A Reconfigurable Architecture for Tensor Computation. 4733-4746 - Ang Li, Huiyu Mo, Wenping Zhu, Qiang Li, Shouyi Yin, Shaojun Wei, Leibo Liu:
BitCluster: Fine-Grained Weight Quantization for Load-Balanced Bit-Serial Neural Network Accelerators. 4747-4757 - Xingchen Li, Zhihang Yuan, Yijin Guan, Guangyu Sun, Tao Zhang, Rongshan Wei, Dimin Niu:
Flatfish: A Reinforcement Learning Approach for Application-Aware Address Mapping. 4758-4770 - Jhon Gomez, Nektar Xama, Anthony Coyette, Ronny Vanhooren, Wim Dobbelaere, Georges G. E. Gielen:
DDtM: Increasing Latent Defect Detection in Analog/Mixed-Signal ICs Using the Difference in Distance to Mean Value. 4771-4781 - Ling Liang, Zheng Qu, Zhaodong Chen, Fengbin Tu, Yujie Wu, Lei Deng, Guoqi Li, Peng Li, Yuan Xie:
H2Learn: High-Efficiency Learning Accelerator for High-Accuracy Spiking Neural Networks. 4782-4796 - Menghua Jia, Yachen Kong, Xuepeng Zhan, Meng Zhang, Fei Wu, Jiezhi Chen:
Optimal Program-Read Schemes Toward Highly Reliable Open Block Operations in 3-D Charge-Trap NAND Flash Memory. 4797-4807 - Chen Chen, Hongyi Wang, Xinyue Song, Feng Liang, Kaikai Wu, Tao Tao:
High-Dimensional Bayesian Optimization for Analog Integrated Circuit Sizing Based on Dropout and g/I Methodology. 4808-4820 - Hsiao-Lun Liu, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang:
A Don't-Care-Based Approach to Reducing the Multiplicative Complexity in Logic Networks. 4821-4825 - Jaeseong Lee, Jungsub Rhim, Duseok Kang, Soonhoi Ha:
SNAS: Fast Hardware-Aware Neural Architecture Search Methodology. 4826-4836 - Valeriy Sukharev, Armen Kteyan, Farid N. Najm, Yong Hyeon Yi, Chris H. Kim, Jun-Ho Choy, Sofya Torosyan, Yu Zhu:
Experimental Validation of a Novel Methodology for Electromigration Assessment in On-Chip Power Grids. 4837-4850 - Jesús Jiménez-León, Arturo Sarmiento-Reyes, Pedro Rosales-Quintero:
A Compact Modeling Methodology for Experimental Memristive Devices. 4851-4861 - Irith Pomeranz:
Pass/Fail Data for Logic Diagnosis Under Bounded Transparent Scan. 4862-4872 - Fupeng Chen, Heng Yu, Weixiong Jiang, Yajun Ha:
Quality Optimization of Adaptive Applications via Deep Reinforcement Learning in Energy Harvesting Edge Devices. 4873-4886 - Xiaodong Wang, Changhao Yan, Yuzhe Ma, Bei Yu, Fan Yang, Dian Zhou, Xuan Zeng:
Analog Circuit Yield Optimization via Freeze-Thaw Bayesian Optimization Technique. 4887-4900 - Amin Sabet, Jonathon S. Hare, Bashir M. Al-Hashimi, Geoff V. Merrett:
Similarity-Aware CNN for Efficient Video Recognition at the Edge. 4901-4914 - Zichang He, Zheng Zhang:
PoBO: A Polynomial Bounding Method for Chance-Constrained Yield-Aware Optimization of Photonic ICs. 4915-4926 - Debayan Das, Mayukh Nath, Baibhab Chatterjee, Raghavan Kumar, Xiaosen Liu, Harish Krishnamurthy, Manoj R. Sastry, Sanu Mathew, Santosh Ghosh, Shreyas Sen:
EM SCA White-Box Analysis-Based Reduced Leakage Cell Design and Presilicon Evaluation. 4927-4938 - Gyungbin Kim, Minho Cheong, Sungho Kang:
SPAR: A New Test-Point Insertion Using Shared Points for Area Overhead Reduction. 4939-4951 - Abraham Peedikayil Kuruvila, Xingyu Meng, Shamik Kundu, Gaurav Pandey, Kanad Basu:
Explainable Machine Learning for Intrusion Detection via Hardware Performance Counters. 4952-4964 - Fayu Wan, Taochen Gu, Binhong Li, Bo Li, Wenceslas Rahajandraibe, Mathieu Guerin, Sébastien Lalléchère, Blaise Ravelo:
Design and Experimentation of Inductorless Low-Pass NGD Integrated Circuit in 180-nm CMOS Technology. 4965-4974 - Shayan Hassantabar, Xiaoliang Dai, Niraj K. Jha:
CURIOUS: Efficient Neural Architecture Search Based on a Performance Predictor and Evolutionary Search. 4975-4990 - Lizhou Wu, Siddharth Rao, Mottaqiallah Taouil, Erik Jan Marinissen, Gouri Sankar Kar, Said Hamdioui:
MFA-MTJ Model: Magnetic-Field-Aware Compact Model of pMTJ for Robust STT-MRAM Design. 4991-5004 - Bin Zhou, Ting Ye, Shenggang Wan, Xubin He, Weijun Xiao, Changsheng Xie:
Data Representation Aware of Damage to Extend the Lifetime of MLC NAND Flash Memory. 5005-5015 - Hui-Chieh Yu, Yu-Huei Lin, Zhiyang Chen, Bing Li, Xing Huang, Ulf Schlichtmann, Tsung-Yi Ho, Hailong Yao:
Contamination-Aware Synthesis for Programmable Microfluidic Devices. 5016-5029 - Wei Li, Yuzhe Ma, Yibo Lin, Bei Yu:
Adaptive Layout Decomposition With Graph Embedding Neural Networks. 5030-5042 - Jingyu Wang, Songming Yu, Zhuqing Yuan, Jinshan Yue, Zhe Yuan, Ruoyang Liu, Yanzhi Wang, Huazhong Yang, Xueqing Li, Yongpan Liu:
PACA: A Pattern Pruning Algorithm and Channel-Fused High PE Utilization Accelerator for CNNs. 5043-5056 - Yu-Teng Nien, Kai-Chiang Wu, Dong-Zhen Lee, Ying-Yen Chen, Po-Lin Chen, Mason Chern, Jih-Nung Lee, Shu-Yi Kao, Mango Chia-Tso Chao:
Methodology of Generating Timing-Slack-Based Cell-Aware Tests. 5057-5070 - Xiaoyu Zhang, Rui Liu, Tao Song, Yuxin Yang, Yinhe Han, Xiaoming Chen:
Re-FeMAT: A Reconfigurable Multifunctional FeFET-Based Memory Architecture. 5071-5084 - Sanbao Su, Chang Meng, Fan Yang, Xiaolong Shen, Leibin Ni, Wei Wu, Zhihang Wu, Junfeng Zhao, Weikang Qian:
VECBEE: A Versatile Efficiency-Accuracy Configurable Batch Error Estimation Method for Greedy Approximate Logic Synthesis. 5085-5099 - Kun-Chih Chen, Hsueh-Wen Tang, Chi-Hsun Wu, Chia-Hsin Chen:
Thermal Sensor Placement for Multicore Systems Based on Low-Complex Compressive Sensing Theory. 5100-5111 - Qiulin Wu, You Zhou, Fei Wu, Hong Jiang, Jian Zhou, Changsheng Xie:
Understanding and Exploiting the Full Potential of SSD Address Remapping. 5112-5125 - Gabriel Ammes, Walter Lau Neto, Paulo F. Butzen, Pierre-Emmanuel Gaillardon, Renato P. Ribas:
A Two-Level Approximate Logic Synthesis Combining Cube Insertion and Removal. 5126-5130 - Williams Paul Nwadiugwu, Dong-Seong Kim:
Reconfigurable Physical Resource Block Using Novel - Beamforming Filter Circuit for LTE-Based Cell-Edge Terminals. 5131-5135
Volume 41, Number 12, December 2022
- Zhenxin Zhao, Lihong Zhang:
Analog Integrated Circuit Topology Synthesis With Deep Reinforcement Learning. 5138-5151 - Baidyanath Ray, Debanjana Datta, Mousumi Bhanja, Ayan Banerjee:
Cell-Based Synthesis of Multiple Analog Filter and Oscillator Topologies Employing Graph. 5152-5168 - Jiwoo Hong, Sunghoon Kim, Dongsuk Jeon:
An Automatic Circuit Design Framework for Level Shifter Circuits. 5169-5181 - Ranran Zhou, Peter Poechmueller, Yong Wang:
An Analog Circuit Design and Optimization System With Rule-Guided Genetic Algorithm. 5182-5192 - Qi Sun, Xufeng Yao, Arjun Ashok Rao, Bei Yu, Shiyan Hu:
Counteracting Adversarial Attacks in Autonomous Driving. 5193-5206 - Sarah Amir, Domenic Forte:
EigenCircuit: Divergent Synthetic Benchmark Generation for Hardware Security Using PCA and Linear Programming. 5207-5219 - Jooyeon Choi, Hyeonuk Sim, Sangyun Oh, Sugil Lee, Jongeun Lee:
MLogNet: A Logarithmic Quantization-Based Accelerator for Depthwise Separable Convolution. 5220-5231 - Hui Chen, Peng Chen, Xiangzhong Luo, Shuo Huai, Weichen Liu:
LAMP: Load-Balanced Multipath Parallel Transmission in Point-to-Point NoCs. 5232-5245 - Sangeet Saha, Shounak Chakraborty, Xiaojun Zhai, Shoaib Ehsan, Klaus D. McDonald-Maier:
ACCURATE: Accuracy Maximization for Real-Time Multicore Systems With Energy-Efficient Way-Sharing Caches. 5246-5260 - Xiao Moyuan, Tsun-Ming Tseng, Ulf Schlichtmann:
Crosstalk-Aware Automatic Topology Customization and Optimization for Wavelength-Routed Optical NoCs. 5261-5274 - Zhengyu Mei, Yuxuan Wang, Hongbing Pan:
TEA-Z: A Tiny and Efficient Architecture Based on Z Channel for Image Watermarking and Its Versatile Hardware Implementation. 5275-5287 - Fazal Hameed, Jerónimo Castrillón:
BlendCache: An Energy and Area Efficient Racetrack Last-Level-Cache Architecture. 5288-5298 - Debao Wei, Zhelong Piao, Hua Feng, Liyan Qiao, Cong Hu, Xiyuan Peng:
TCSE: A Target Cell States Elimination Coding Strategy for Highly Reliable Data Storage Based on 3-D nand Flash Memory. 5299-5312 - Fangxin Liu, Wenbo Zhao, Zongwu Wang, Yilong Zhao, Tao Yang, Yiran Chen, Li Jiang:
IVQ: In-Memory Acceleration of DNN Inference Exploiting Varied Quantization. 5313-5326 - Mahta Mayahinia, Mehdi B. Tahoori, Manu Perumkunnil Komalan, Houman Zahedmanesh, Kristof Croes, Tommaso Marinelli, José Ignacio Gómez Pérez, Timon Evenblij, Gouri Sankar Kar, Francky Catthoor:
Time-Dependent Electromigration Modeling for Workload-Aware Design-Space Exploration in STT-MRAM. 5327-5332 - Xuhang Chen, Xueyan Wang, Xiaotao Jia, Jianlei Yang, Gang Qu, Weisheng Zhao:
Accelerating Graph-Connected Component Computation With Emerging Processing-In-Memory Architecture. 5333-5342 - Hongxiang Fan, Martin Ferianc, Zhiqiang Que, Shuanglong Liu, Xinyu Niu, Miguel R. D. Rodrigues, Wayne Luk:
FPGA-Based Acceleration for Bayesian Convolutional Neural Networks. 5343-5356 - Yehua Ling, Tao He, Yu Zhang, Haitao Meng, Kai Huang, Gang Chen:
Lite-Stereo: A Resource-Efficient Hardware Accelerator for Real-Time High-Quality Stereo Estimation Using Binary Neural Network. 5357-5366 - Yuheng Jiang, Jiajia Chen:
A New Algorithm to Derive High Performance and Low Hardware Cost DCT for HEVC. 5367-5379 - Yuhao Zhou, Zhenxue He, Chen Chen, Tao Wang, Limin Xiao, Xiang Wang:
An Efficient Power Optimization Approach for Fixed Polarity Reed-Muller Logic Circuits Based on Metaheuristic Optimization Algorithm. 5380-5393 - Zhenge Jia, Yiyu Shi, Jingtong Hu:
Personalized Neural Network for Patient-Specific Health Monitoring in IoT: A Metalearning Approach. 5394-5407 - Sourav Sanyal, Kaushik Roy:
Neuro-Ising: Accelerating Large-Scale Traveling Salesman Problems via Graph Neural Network Guided Localized Ising Solvers. 5408-5420 - Kai Zhong, Xuefei Ning, Guohao Dai, Zhenhua Zhu, Tianchen Zhao, Shulin Zeng, Yu Wang, Huazhong Yang:
Exploring the Potential of Low-Bit Training of Convolutional Neural Networks. 5421-5434 - Morteza Fayazi, Zachary Colter, Zineb Benameur-El Youbi, Javad Bagherzadeh, Tutu Ajayi, Ronald G. Dreslinski:
FASCINET: A Fully Automated Single-Board Computer Generator Using Neural Networks. 5435-5448 - Xing Huang, Tsung-Yi Ho, Zepeng Li, Genggeng Liu, Lu Wang, Qingshan Li, Wenzhong Guo, Bing Li, Ulf Schlichtmann:
MiniControl 2.0: Co-Synthesis of Flow and Control Layers for Microfluidic Biochips With Strictly Constrained Control Ports. 5449-5463 - Qilin Zheng, Xingchen Li, Yijin Guan, Zongwei Wang, Yimao Cai, Yiran Chen, Guangyu Sun, Ru Huang:
PIMulator-NN: An Event-Driven, Cross-Level Simulation Framework for Processing-In-Memory-Based Neural Network Accelerators. 5464-5475 - Haikun Liu, Jiahong Xu, Xiaofei Liao, Hai Jin, Yu Zhang, Fubing Mao:
A Simulation Framework for Memristor-Based Heterogeneous Computing Architectures. 5476-5488 - Yuhang Zhang, Guanghui He, Guoxing Wang, Yongfu Li:
XBarNet: Computationally Efficient Memristor Crossbar Model Using Convolutional Autoencoder. 5489-5500 - Tianshu Hou, Ngai Wong, Quan Chen, Zhigang Ji, Hai-Bao Chen:
A Space-Time Neural Network for Analysis of Stress Evolution Under DC Current Stressing. 5501-5514 - Shumpei Morita, Song Bian, Michihiro Shintani, Takashi Sato:
Efficient Analysis for Mitigation of Workload-Dependent Aging Degradation. 5515-5525 - Grace Li Zhang, Bing Li, Xing Huang, Xunzhao Yin, Cheng Zhuo, Masanori Hashimoto, Ulf Schlichtmann:
VirtualSync+: Timing Optimization With Virtual Synchronization. 5526-5540 - Jianli Chen, Zhipeng Huang, Ziran Zhu, Zheng Peng, Wenxing Zhu, Yao-Wen Chang:
Novel Proximal Group ADMM for Placement Considering Fogging and Proximity Effects. 5541-5553 - Hsiang-Ting Wen, Yu-Jie Cai, Yang Hsu, Yao-Wen Chang:
Via-Based Redistribution Layer Routing for InFO Packages With Irregular Pad Structures. 5554-5567 - Yih-Lang Li, Shih-Ting Lin, Shinichi Nishizawa, Hong-Yan Su, Ming-Jie Fong, Oscar Chen, Hidetoshi Onodera:
NCTUcell: A DDA- and Delay-Aware Cell Library Generator for FinFET Structure With Implicitly Adjustable Grid Map. 5568-5581 - Wei-Hsiang Tseng, Chen-Hao Hsu, Wan-Hsuan Lin, Yao-Wen Chang:
A Bridge-Based Compression Algorithm for Topological Quantum Circuits. 5582-5595 - Darong Huang, Ali Pahlevan, Luis Costero, Marina Zapater, David Atienza:
Reinforcement Learning-Based Joint Reliability and Performance Optimization for Hybrid-Cache Computing Servers. 5596-5609 - Aurea Edna Moreno-Mojica, José Ernesto Rayas-Sánchez:
Frequency- and Time-Domain Yield Optimization of a Power Delivery Network Subject to Large Decoupling Capacitor Tolerances. 5610-5620 - Ahmed Al-Qallaf, Kamal El-Sankary:
Design of Time-Mode PI Controller for Switched-Capacitor DC/DC Converter Using Differential Evolution Algorithm - A Design Methodology. 5621-5634 - Irith Pomeranz:
Wrapping Paths of Undetected Transition Faults With Two-Cycle Gate-Exhaustive Faults. 5635-5643 - Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich:
SCAR: Security Compliance Analysis and Resynthesis of Reconfigurable Scan Networks. 5644-5656 - Arjun Chaudhuri, Jonti Talukdar, Fei Su, Krishnendu Chakrabarty:
Functional Criticality Analysis of Structural Faults in AI Accelerators. 5657-5670 - Hyeonchan Lim, Hyojoon Yun, Sungho Kang:
A Hybrid Test Scheme for Automotive IC in Multisite Testing. 5671-5680 - Mohamed Saleh Abouelyazid, Sherif Hammouda, Yehea Ismail:
Accuracy-Based Hybrid Parasitic Capacitance Extraction Using Rule-Based, Neural-Networks, and Field-Solver Methods. 5681-5694 - Sayandeep Sanyal, Pallab Dasgupta, Aritra Hazra, Sourav Das, Scott Morrison, Sudhakar Surendran, Lakshmanan Balasubramanian:
The CoveRT Approach for Coverage Management in Analog and Mixed-Signal Integrated Circuits. 5695-5708 - Binod Kumar, V. S. Vineesh, Puneet Nemade, Masahiro Fujita:
Aries: A Semiformal Technique for Fine-Grained Bug Localization in Hardware Designs. 5709-5721 - Lama Shaer, Rouwaida Kanj, Rajiv V. Joshi, Ali Chehab:
Group LARS-Based Iterative Reweighted Least Squares Methodology for Efficient Statistical Modeling of Memory Designs. 5722-5726 - Hai Wang, Wenjun He, Qinhui Yang, Xizhu Peng, He Tang:
DBP: Distributed Power Budgeting for Many-Core Systems in Dark Silicon. 5727-5731 - Qinyu Chen, Chang Gao, Xinyuan Fang, Haitao Luan:
Skydiver: A Spiking Neural Network Accelerator Exploiting Spatio-Temporal Workload Balance. 5732-5736
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