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ORCIDSungho Kang 0001
Person information
- affiliation: Yonsei University, Department of Electrical and Electronic Engineering, Computer Systems Reliable SoC Laboratory, Seoul, Korea
- affiliation: Motorola Inc., Austin, Semiconductor Systems Design Technology, TX, USA
- affiliation: Schlumberger Inc., Schlumberger Laboratory for Computer Science, Austin, TX, USA
- affiliation (PhD): University of Texas at Austin, TX, USA
Other persons with the same name
- Sungho Kang — disambiguation page
- Sungho Kang 0002
![[0009-0008-5829-4503]](https://dblp1.uni-trier.de/img/orcid-mark.12x12.png "0009-0008-5829-4503")
— Sungkyunkwan University, Department of Electrical and Computer Engineering, Seoul, South Korea
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2020 – today
- 2024
[j121]Hyojoon Yun, Hyeonchan Lim, Hayoung Lee, Doohyun Yoon, Sungho Kang:
An Efficient Scan Diagnosis for Intermittent Faults Using CNN With Multi-Channel Data. IEEE Access 12: 146463-146475 (2024)- [j120]Hayoung Lee, Sooryeong Lee, Sungho Kang:
A New Fail Address Memory Architecture for Cost-Effective ATE. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(4): 1260-1273 (2024) - [j119]Seung Ho Shin, Hayoung Lee, Sungho Kang:
GRAP: Efficient GPU-Based Redundancy Analysis Using Parallel Evaluation for Cross Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(8): 2518-2531 (2024) - [j118]Hyeonchan Lim, Tae-Hyun Kim, Sungho Kang:
Reconfigurable Multi-Bit Scan Flip-Flop for Cell-Aware Diagnosis. IEEE Trans. Circuits Syst. II Express Briefs 71(4): 2024-2028 (2024) - [j117]Sangjun Lee, Jongho Park, Sungwhan Park, Hyemin Kim, Sungho Kang:
A New Zero-Overhead Test Method for Low-Power AI Accelerators. IEEE Trans. Circuits Syst. II Express Briefs 71(5): 2649-2653 (2024) - [j116]Juyong Lee, Hayoung Lee, Sooryeong Lee, Sungho Kang:
A New ISA for High-Speed and Area-Efficient ALPG. IEEE Trans. Circuits Syst. II Express Briefs 71(7): 3358-3362 (2024) - [j115]Hayoung Lee, Sooryeong Lee, Sungho Kang:
RA-Aware Fail Data Collection Architecture for Cost Reduction. IEEE Trans. Very Large Scale Integr. Syst. 32(6): 1136-1149 (2024) - [j114]Hayoung Lee, Jongho Park, Sungho Kang:
An Area-Efficient Systolic Array Redundancy Architecture for Reliable AI Accelerator. IEEE Trans. Very Large Scale Integr. Syst. 32(10): 1950-1954 (2024) - 2023
- [j113]Youngkwang Lee, Donghyun Han, Sooryeong Lee, Sungho Kang:
Novel Error-Tolerant Voltage-Divider-Based Through-Silicon-Via Test Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1): 308-321 (2023) - [j112]Hayoung Lee, Seung Ho Shin, Younwoo Yoo, Sungho Kang:
TRUST: Through-Silicon via Repair Using Switch Matrix Topology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(7): 2377-2390 (2023) - [j111]Sunghoon Kim, Seokjun Jang, Sungho Kang:
Scan Chain Architecture With Data Duplication for Multiple Scan Cell Fault Diagnosis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(8): 2717-2727 (2023) - [j110]Hayoung Lee, Jihye Kim, Jongho Park, Sungho Kang:
STRAIT: Self-Test and Self-Recovery for AI Accelerator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(9): 3092-3104 (2023) - [j109]Yong Lee, Seokjun Jang, Sungho Kang:
Shift Left Quality Management System (QMS) Using a 3-D Matrix Scanning Method on System on a Chip. IEEE Trans. Circuits Syst. II Express Briefs 70(4): 1580-1584 (2023) - [j108]Youngkwang Lee, Donghyun Han, Sungho Kang:
TSV Built-In Self-Repair Architecture for Improving the Yield and Reliability of HBM. IEEE Trans. Very Large Scale Integr. Syst. 31(4): 578-590 (2023) - [c87]Younwoo Yoo, Hayoung Lee, Seung Ho Shin, Sungho Kang:
GPU-Based Redundancy Analysis using Partitioning Method for Memory Repair. ISOCC 2023: 1-2 - [c86]Sunghoon Kim, Donghyun Han, Seokjun Jang, Sungho Kang:
LOTS: Low Overhead TSV Repair Method Using IEEE-1838 Standard Architecture. ISOCC 2023: 289-290 - [c85]Hayoung Lee, Younwoo Yoo, Seung Ho Shin, Sungho Kang:
Redundancy Analysis Simplification Scheme for High-Speed Memory Repair. ISOCC 2023: 339-340 - [c84]Hyojoon Yun, Tae-Hyun Kim, Sungho Kang:
Machine Learning based Scan Chain Diagnosis for Double Faults. ISOCC 2023: 341-342 - [c83]Hyemin Kim, Sangjun Lee, Jongho Park, Sungwhan Park, Sungho Kang:
A New Flip-flop Shared Architecture of Test Point Insertion for Scan Design. ISOCC 2023: 343-344 - 2022
- [j107]Youngkwang Lee, Young-Woo Lee, Sungyoul Seo, Sungho Kang:
Reduced-Pin-Count BOST for Test-Cost Reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(3): 750-761 (2022) - [j106]Sangmin Park, Minho Cheong, Donghyun Han, Sungho Kang:
Herringbone-Based TSV Architecture for Clustered Fault Repair and Aging Recovery. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(4): 1142-1153 (2022) - [j105]Hogyeong Kim, Hayoung Lee, Donghyun Han, Sungho Kang:
Multibank Optimized Redundancy Analysis Using Efficient Fault Collection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(8): 2739-2752 (2022) - [j104]Gyungbin Kim, Minho Cheong, Sungho Kang:
SPAR: A New Test-Point Insertion Using Shared Points for Area Overhead Reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4939-4951 (2022) - [j103]Hyeonchan Lim, Hyojoon Yun, Sungho Kang:
A Hybrid Test Scheme for Automotive IC in Multisite Testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5671-5680 (2022) - [j102]Hyeonchan Lim, Hyojoon Yun, Sungho Kang:
Scan Cell Modification for Intra Cell-Aware Scan Chain Diagnosis. IEEE Trans. Circuits Syst. II Express Briefs 69(11): 4498-4502 (2022) - [j101]Hayoung Lee, Younwoo Yoo, Seung Ho Shin, Sungho Kang:
ECMO: ECC Architecture Reusing Content-Addressable Memories for Obtaining High Reliability in DRAM. IEEE Trans. Very Large Scale Integr. Syst. 30(6): 781-793 (2022) - [c82]Seung Ho Shin, Hayoung Lee, Sooryeong Lee, Younwoo Yoo, Sungho Kang:
An Improved Early Termination Methodology Using Convolutional Neural Network. ISOCC 2022: 21-22 - [c81]Sooryeong Lee, Hayoung Lee, Younwoo Yoo, Seung Ho Shin, Sungho Kang:
PROG: Per-Row Output Generator for BOST. ISOCC 2022: 23-24 - [c80]Sunghoon Kim, Seokjun Jang, Youngki Moon, Sungho Kang:
Pair-Grouping Scan Chain Architecture for Multiple Scan Cell Fault Diagnosis. ISOCC 2022: 25-26 - [c79]Hayoung Lee, Sooryeong Lee, Younwoo Yoo, Seung Ho Shin, Sungho Kang:
FAME: Fault Address Memory Structure for Repair Time Reduction. ISOCC 2022: 31-32 - [c78]Jongho Park, Sangjun Lee, Inhwan Lee, Sungwhan Park, Sungho Kang:
Correlation Aware Random Pattern Generation for Test Time and Shift Power Reduction of Logic BIST. ISOCC 2022: 53-54 - [c77]Hyeonchan Lim, Hyojoon Yun, Juyong Lee, Sungho Kang:
Cell-Aware Scan Diagnosis Using Partially Synchronous Set and Reset. ISOCC 2022: 121-122 - [c76]Jihye Kim, Hayoung Lee, Jongho Park, Sungho Kang:
ZOS: Zero Overhead Scan for Systolic Array-based AI accelerator. ISOCC 2022: 360-361 - [c75]Tae Hyun Kim, Hyeonchan Lim, Minho Cheong, Hyojoon Yun, Sungho Kang:
Logic Diagnosis Based on Deep Learning for Multiple Faults. ISOCC 2022: 366-367 - 2021
- [j100]Jaewon Park, Jae Hoon Lee, Sang-Kil Park, Ki Chul Chun, Kyomin Sohn, Sungho Kang:
An In-DRAM BIST for 16 Gb DDR4 DRAM in the 2nd 10-nm-Class DRAM Process. IEEE Access 9: 33487-33497 (2021) - [j99]Hayoung Lee, Hyunggoy Oh, Sungho Kang:
On-Chip Error Detection Reusing Built-In Self-Repair for Silicon Debug. IEEE Access 9: 56443-56456 (2021) - [j98]Donghyun Han, Hayoung Lee, Sungho Kang:
Effective Spare Line Allocation Built-in Redundancy Analysis With Base Common Spare for Yield Improvement of 3D Memory. IEEE Access 9: 76716-76729 (2021) - [j97]Hyungil Woo, Seokjun Jang, Sungho Kang:
A Secure Scan Architecture Protecting Scan Test and Scan Dump Using Skew-Based Lock and Key. IEEE Access 9: 102161-102176 (2021) - [j96]Kwonhyoung Lee, Sangjun Lee, Jongho Park, Inhwan Lee, Sungho Kang:
A Low-Power BIST Scheme Using Weight-Aware Scan Grouping and Scheduling for Automotive ICs. IEEE Access 9: 116115-116132 (2021) - [j95]Seokjun Jang, Jihye Kim, Sungho Kang:
Reconfigurable Scan Architecture for High Diagnostic Resolution. IEEE Access 9: 120537-120550 (2021) - [j94]Donghyun Han, Hayoung Lee, Seungtaek Lee, Sungho Kang:
ECC-Aware Fast and Reliable Pattern Matching Redundancy Analysis for Highly Reliable Memory. IEEE Access 9: 133274-133288 (2021) - [j93]Sangjun Lee, Kyunghwan Cho, Jihye Kim, Jongho Park, Inhwan Lee, Sungho Kang:
Low-Power Scan Correlation-Aware Scan Cluster Reordering for Wireless Sensor Networks. Sensors 21(18): 6111 (2021) - [j92]Jungil Mok, Hyeonchan Lim, Sungho Kang:
Enhanced Postbond Test Architecture for Bridge Defects Between the TSVs. IEEE Trans. Very Large Scale Integr. Syst. 29(6): 1164-1177 (2021) - [c74]Youngkwang Lee, Donghyun Han, Sooryeong Lee, Sungho Kang:
A Circular-based TSV Repair Architecture. ISOCC 2021: 1-2 - [c73]Donghyun Han, Youngkwang Lee, Sooryeong Lee, Sungho Kang:
Hardware Efficient Built-in Self-test Architecture for Power and Ground TSVs in 3D IC. ISOCC 2021: 101-102 - [c72]Sangjun Lee, Jongho Park, Inhwan Lee, Kwonhyoung Lee, Sungho Kang:
Hybrid Test Access Mechanism for Multiple Identical Cores. ISOCC 2021: 365-366 - [c71]Seokjun Jang, Hyungil Woo, Sunghoon Kim, Sungho Kang:
Secure Scan Design through Pseudo Fault Injection. ISOCC 2021: 425-426 - [c70]Younwoo Yoo, Hayoung Lee, Seung Ho Shin, Sungho Kang:
Post-bond Repair of Line Faults with Double-bit ECC for 3D Memory. ISOCC 2021: 427-428 - [c69]Seung Ho Shin, Hayoung Lee, Younwoo Yoo, Sungho Kang:
An Effective Spare Allocation Methodology for 3D Memory Repair with BIRA. ISOCC 2021: 429-430 - [c68]Youngki Moon, Hyunho Yoo, Donghyun Han, Sungho Kang:
Area Efficient Built-In Redundancy Analysis using Pre-Solutions with Various Spare Structure. ISOCC 2021: 431-432 - 2020
- [j91]Jihye Kim, Hayoung Lee, Seokjun Jang, Sungho Kang:
Fine-Grained Defect Diagnosis for CMOL FPGA Circuits. IEEE Access 8: 163140-163151 (2020) - [j90]Hyunyul Lim, Minho Cheong, Sungho Kang:
Scan-Chain-Fault Diagnosis Using Regressions in Cryptographic Chips for Wireless Sensor Networks. Sensors 20(17): 4771 (2020) - [j89]Minho Cheong, Ingeol Lee, Sungho Kang:
A 3-D Rotation-Based Through-Silicon via Redundancy Architecture for Clustering Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(9): 1925-1934 (2020) - [j88]Young-Woo Lee, Hyeonchan Lim, Youngkwang Lee, Sungho Kang:
Robust Secure Shield Architecture for Detection and Protection Against Invasive Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 3023-3034 (2020) - [j87]Sangjun Lee, Kyunghwan Cho, Sungki Choi, Sungho Kang:
A New Logic Topology-Based Scan Chain Stitching for Test-Power Reduction. IEEE Trans. Circuits Syst. 67-II(12): 3432-3436 (2020) - [j86]Tae Hyun Kim, Hayoung Lee, Sungho Kang:
GPU-Based Redundancy Analysis Using Concurrent Evaluation. IEEE Trans. Very Large Scale Integr. Syst. 28(3): 805-817 (2020) - [c67]Hayoung Lee, Donghyun Han, Hogyeong Kim, Sungho Kang:
Redundancy Analysis Optimization with Clustered Known Solutions for High Speed Repair. ISOCC 2020: 51-52 - [c66]Hyeonchan Lim, Tae Hyun Kim, Seunghwan Kim, Sungho Kang:
Diagnosis of Scan Chain Faults Based-on Machine-Learning. ISOCC 2020: 57-58 - [c65]Jihye Kim, Hayoung Lee, Seokjun Jang, Hogyeong Kim, Sungho Kang:
Memory-like Defect Diagnosis for CMOL FPGAs. ISOCC 2020: 139-140 - [c64]Hayoung Lee, Keewon Cho, Sungho Kang, Wooheon Kang, Seungtaek Lee, Woosik Jeong:
Fail Memory Configuration Set for RA Estimation. ITC 2020: 1-9 - [c63]Hayoung Lee, Donghyun Han, Hogyeong Kim, Sungho Kang:
W-ERA: One-Time Memory Repair with Wafer-Level Early Repair Analysis for Cost Reduction. ITC-Asia 2020: 94-99
2010 – 2019
- 2019
- [j85]Jaewon Jang, Minho Cheong, Sungho Kang:
TSV Repair Architecture for Clustered Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(1): 190-194 (2019) - [j84]Keewon Cho, Young-Woo Lee, Sungyoul Seo, Sungho Kang:
An Efficient BIRA Utilizing Characteristics of Spare Pivot Faults. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(3): 551-561 (2019) - [j83]Ingeol Lee, Minho Cheong, Sungho Kang:
Highly Reliable Redundant TSV Architecture for Clustered Faults. IEEE Trans. Reliab. 68(1): 237-247 (2019) - [j82]Jihye Kim, Sangjun Lee, Sungho Kang:
Test-Friendly Data-Selectable Self-Gating (DSSG). IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1972-1976 (2019) - [j81]Hayoung Lee, Donghyun Han, Seungtaek Lee, Sungho Kang:
Dynamic Built-In Redundancy Analysis for Memory Repair. IEEE Trans. Very Large Scale Integr. Syst. 27(10): 2365-2374 (2019) - [c62]Minho Cheng, Hyunyul Lim, Tae Hyun Kim, Sungho Kang:
A Hardware-efficient TSV Repair Scheme Based on Butterfly Topology. ISOCC 2019: 63-64 - [c61]Jihye Kim, Sangjun Lee, Minho Moon, Sungho Kang:
Transition-delay Test Methodology for Designs with Self-gating. ISOCC 2019: 93-94 - [c60]Young-Woo Lee, Youngkwang Lee, Minho Moon, Sungho Kang:
Tunable Compact Probing Detector with Fast Analysis Time Against Invasive Attacks. ISOCC 2019: 115-116 - [c59]Kyunghwan Cho, Jihye Kim, Hyunggoy Oh, Sangjun Lee, Sungho Kang:
A New Scan Chain Reordering Method for Low Power Consumption based on Care Bit Density. ISOCC 2019: 134-135 - [c58]Hayoung Lee, Donghyun Han, Seungtaek Lee, Sungho Kang:
Redundancy Analysis based on Fault Distribution for Memory with Complex Spares. ISOCC 2019: 235-236 - 2018
- [j80]Sungyoul Seo, Keewon Cho, Young-Woo Lee, Sungho Kang:
A Statistic-Based Scan Chain Reordering for Energy-Quality Scalable Scan Test. IEEE J. Emerg. Sel. Topics Circuits Syst. 8(3): 391-403 (2018) - [j79]Inhyuk Choi, Hyunggoy Oh, Young-Woo Lee, Sungho Kang:
Test Resource Reused Debug Scheme to Reduce the Post-Silicon Debug Cost. IEEE Trans. Computers 67(12): 1835-1839 (2018) - [j78]Jaeil Lim, Hyunggoy Oh, Heetae Kim, Sungho Kang:
Thermal Aware Test Scheduling for NTV Circuit. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(4): 906-910 (2018) - [j77]Hayoung Lee, Kiwon Cho, Donghyun Kim, Sungho Kang:
Fault Group Pattern Matching With Efficient Early Termination for High-Speed Redundancy Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(7): 1473-1482 (2018) - [j76]Hayoung Lee, Jooyoung Kim, Keewon Cho, Sungho Kang:
Fast Built-In Redundancy Analysis Based on Sequential Spare Line Allocation. IEEE Trans. Reliab. 67(1): 264-273 (2018) - [j75]Donghyun Kim, Hayoung Lee, Sungho Kang:
An Area-Efficient BIRA With 1-D Spare Segments. IEEE Trans. Very Large Scale Integr. Syst. 26(1): 206-210 (2018) - [c57]Hyunggoy Oh, Heetae Kim, Sangjun Lee, Sungho Kang:
Dynamic voltage Drop induced Path Delay Analysis for STV and NTV Circuits during At-speed Scan Test. ISOCC 2018: 7-8 - [c56]Minho Cheong, Ingeol Lee, Sungho Kang:
A Test Methodology for Neural Computing Unit. ISOCC 2018: 11-12 - [c55]Keewon Cho, Young-Woo Lee, Sungyoul Seo, Sungho Kang:
2-D Failure Bitmap Compression Using Line Fault Marking Method. ISOCC 2018: 21-22 - [c54]Hyeonchan Lim, Seokjun Jang, Sungho Kang:
A Software-based Scan Chain Diagnosis for Double Faults in A Scan Chain. ISOCC 2018: 265-266 - [c53]Heetae Kim, Hyunggoy Oh, Sangjun Lee, Sungho Kang:
Low Power Scan Chain Architecture Based on Circuit Topology. ISOCC 2018: 267-268 - [c52]Donghyun Han, Hayoung Lee, Seungtaek Lee, Minho Moon, Sungho Kang:
3D Memory Formed of Unrepairable Memory Dice and Spare Layer. TENCON 2018: 1362-1366 - [c51]Dongsu Lee, Hyunyul Lim, Tae Hyun Kim, Sungho Kang:
Neural Network Reliability Enhancement Approach Using Dropout Underutilization in GPU. TENCON 2018: 2281-2286 - 2017
- [j74]Hyunggoy Oh, Heetae Kim, Jaeil Lim, Sungho Kang:
Reconfigurable scan architecture for test power and data volume reduction. IEICE Electron. Express 14(13): 20170415 (2017) - [j73]Heetae Kim, Hyunggoy Oh, Jaeil Lim, Sungho Kang:
A novel X-filling method for capture power reduction. IEICE Electron. Express 14(23): 20171093 (2017) - [j72]Younsun Kim, Hyunggoy Oh, Sungho Kang:
Proof of Concept of Home IoT Connected Vehicles. Sensors 17(6): 1289 (2017) - [j71]Hyunggoy Oh, Taewoo Han, Inhyuk Choi, Sungho Kang:
An On-Chip Error Detection Method to Reduce the Post-Silicon Debug Time. IEEE Trans. Computers 66(1): 38-44 (2017) - [j70]Hyunggoy Oh, Inhyuk Choi, Sungho Kang:
DRAM-Based Error Detection Method to Reduce the Post-Silicon Debug Time for Multiple Identical Cores. IEEE Trans. Computers 66(9): 1504-1517 (2017) - [j69]Jaeseok Park, Hyunyul Lim, Sungho Kang:
FRESH: A New Test Result Extraction Scheme for Fast TSV Tests. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(2): 336-345 (2017) - [j68]Young-Woo Lee, Hyeonchan Lim, Sungho Kang:
Grouping-Based TSV Test Architecture for Resistive Open and Bridge Defects in 3-D-ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(10): 1759-1763 (2017) - [j67]Jaeseok Park, Minho Cheong, Sungho Kang:
R2-TSV: A Repairable and Reliable TSV Set Structure Reutilizing Redundancies. IEEE Trans. Reliab. 66(2): 458-466 (2017) - [j66]Jooyoung Kim, Woosung Lee, Keewon Cho, Sungho Kang:
Hardware-Efficient Built-In Redundancy Analysis for Memory With Various Spares. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 844-856 (2017) - [j65]Jaewon Jang, Minho Cheong, Jin-Ho Ahn, Sung Kyu Lim, Sungho Kang:
Chain-Based Approach for Fast Through-Silicon-Via Coupling Delay Estimation. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 1178-1182 (2017) - [c50]Donghyun Han, Hayoung Lee, Donghyun Kim, Sungho Kang:
A new repair scheme for TSV-based 3D memory using base die repair cells. ISOCC 2017: 11-12 - [c49]Hyunyul Lim, Tae Hyun Kim, Dongsu Lee, Sungho Kang:
LARECD: Low area overhead and reliable error correction DMR architecture. ISOCC 2017: 27-28 - [c48]Keewon Cho, Young-Woo Lee, Sungyoul Seo, Sungho Kang:
An efficient built-in self-repair scheme for area reduction. ISOCC 2017: 105-106 - [c47]Hyunggoy Oh, Heetae Kim, Jaeil Lim, Sungho Kang:
A selective error data capture method using on-chip DRAM for silicon debug of multi-core design. ISOCC 2017: 121-122 - [c46]Hyeonchan Lim, Junghwan Kim, Soyeon Kang, Sungho Kang:
Test data reduction method based on berlekamp-massey algorithm. ISOCC 2017: 123-124 - [c45]Sungyoul Seo, Hyeonchan Lim, Soyeon Kang, Sungho Kang:
Off-chip test architecture for improving multi-site testing efficiency using tri-state decoder and 3V-level encoder. ISQED 2017: 191-195 - [c44]Hyeonchan Lim, Sungyoul Seo, Soyeon Kang, Sungho Kang:
Broadcast scan compression based on deterministic pattern generation algorithm. ISQED 2017: 449-453 - 2016
- [j64]Keewon Cho, Wooheon Kang, Hyungjun Cho, Changwook Lee, Sungho Kang:
A Survey of Repair Analysis Algorithms for Memories. ACM Comput. Surv. 49(3): 47:1-47:41 (2016) - [j63]Sungyoul Seo, Yong Lee, Sungho Kang:
Tri-State Coding Using Reconfiguration of Twisted Ring Counter for Test Data Compression. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(2): 274-284 (2016) - [j62]Taewoo Han, Inhyuk Choi, Hyunggoy Oh, Sungho Kang:
Parallelized Network-on-Chip-Reused Test Access Mechanism for Multiple Identical Cores. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(7): 1219-1223 (2016) - [j61]Wooheon Kang, Changwook Lee, Hyunyul Lim, Sungho Kang:
A New 3-D Fuse Architecture to Improve Yield of 3-D Memories. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(10): 1763-1767 (2016) - [j60]Wooheon Kang, Changwook Lee, Hyunyul Lim, Sungho Kang:
Optimized Built-In Self-Repair for Multiple Memories. IEEE Trans. Very Large Scale Integr. Syst. 24(6): 2174-2183 (2016) - [c43]Hyunggoy Oh, Inhyuk Choi, Sungho Kang:
A new online test and debug methodology for automotive camera image processing system. APCCAS 2016: 370-371 - [c42]Inhyuk Choi, Hyunggoy Oh, Sungho Kang:
Test access mechaism for stack test time reduction of 3-dimensional integrated circuit. APCCAS 2016: 522-525 - [c41]Soyeon Kang, Inhyuk Choi, Hyeonchan Lim, Sungyoul Seo, Sungho Kang:
Software-based embedded core test using multi-polynomial for test data reduction. ISOCC 2016: 39-40 - [c40]Keewon Cho, Jooyoung Kim, Hayoung Lee, Sungho Kang:
Discussion of cost-effective redundancy architectures. ISOCC 2016: 97-98 - [c39]Tae Hyun Kim, Hyunyul Lim, Sungho Kang:
P-backtracking: A new scan chain diagnosis method with probability. ISOCC 2016: 141-142 - [c38]Heetae Kim, <