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ORCIDHiren D. Patel
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- affiliation: University of Waterloo, Canada
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2020 – today
- 2024
[j25]Francesco Lumpp
, Franco Fummi, Hiren D. Patel, Nicola Bombieri:
Enabling Kubernetes Orchestration of Mixed-Criticality Software for Autonomous Mobile Robots. IEEE Trans. Robotics 40: 540-553 (2024)- [c64]Artem Klashtorny, Mahesh Tripunitara, Hiren D. Patel:
A Compiler Phase to Optimally Split GPU Wavefronts for Safety-Critical Systems. DATE 2024: 1-6 - [c63]Xinzhe Wang, Zhuanhao Wu, Rodolfo Pellizzoni, Hiren D. Patel:
Exclusive Hierarchies for Predictable Sharing in Last-Level Cache. RTAS 2024: 186-198 - 2023
- [j24]Artem Klashtorny, Zhuanhao Wu, Anirudh Mohan Kaushik, Hiren D. Patel:
Predictable GPU Wavefront Splitting for Safety-Critical Systems. ACM Trans. Embed. Comput. Syst. 22(5s): 107:1-107:25 (2023) - [j23]Kleber Stangherlin, Zhuanhao Wu, Hiren D. Patel, Manoj Sachdev:
Enhancing Strong PUF Security With Nonmonotonic Response Quantization. IEEE Trans. Very Large Scale Integr. Syst. 31(1): 55-64 (2023) - [c62]Susmita Tadepalli, Zhuanhao Wu, Hiren D. Patel:
PASoC: A Predictable Accelerator-rich SoC. CPS-IoT Week Workshops 2023: 325-330 - [c61]Zhuanhao Wu, Marat Bekmyrza, Nachiket Kapre, Hiren D. Patel:
Ditty: Directory-based Cache Coherence for Multicore Safety-critical Systems. DATE 2023: 1-6 - [c60]Zhuanhao Wu, Maya B. Gokhale, Scott Lloyd, Hiren D. Patel:
SCCL: An open-source SystemC to RTL translator. FCCM 2023: 23-33 - [c59]Zhuanhao Wu, Anirudh M. Kaushik, Hiren D. Patel:
ZeroCost-LLC: Shared LLCs at No Cost to WCL. RTAS 2023: 249-261 - 2022
- [j22]Anirudh Mohan Kaushik, Hiren D. Patel:
Automatic Construction of Predictable and High-Performance Cache Coherence Protocols for Multicore Real-Time Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(10): 3318-3331 (2022) - [c58]Zhuanhao Wu, Hiren D. Patel:
Predictable sharing of last-level cache partitions for multi-core safety-critical systems. DAC 2022: 1273-1278 - [c57]Srinirdheeshwar Kuttuva Prakash, Hiren D. Patel, Nachiket Kapre:
Managing HBM Bandwidth on Multi-Die FPGAs with FPGA Overlay NoCs. FCCM 2022: 1-9 - [c56]Michael Barrow, Zhuanhao Wu, Scott Lloyd, Maya B. Gokhale, Hiren D. Patel, Peter Lindstrom:
ZHW: A Numerical CODEC for Big Data Scientific Computation. FPT 2022: 1-9 - [c55]Francesco Lumpp, Franco Fummi, Hiren D. Patel, Nicola Bombieri:
Containerization and Orchestration of Software for Autonomous Mobile Robots: a Case Study of Mixed-Criticality Tasks across Edge-Cloud Computing Platforms. IROS 2022: 9708-9713 - [d1]Kleber Stangherlin, Zhuanhao Wu, Hiren D. Patel, Manoj Sachdev:
Testchip Measured CRPs of NMQ strong PUF. IEEE DataPort, 2022
- [i5]Zhuanhao Wu, Hiren D. Patel:
Predictable Sharing of Last-level Cache Partitions for Multi-core Safety-critical Systems. CoRR abs/2204.01679 (2022) - [i4]Kleber Stangherlin, Zhuanhao Wu, Hiren D. Patel, Manoj Sachdev:
Enhancing Strong PUF Security with Non-monotonic Response Quantization. CoRR abs/2206.03440 (2022) - [i3]Kleber Stangherlin, Zhuanhao Wu, Hiren D. Patel, Manoj Sachdev:
Design Exploration and Security Assessment of PUF-on-PUF Implementations. CoRR abs/2206.11840 (2022) - [i2]Kleber Stangherlin, Zhuanhao Wu, Hiren D. Patel, Manoj Sachdev:
Secure and Lightweight Strong PUF Challenge Obfuscation with Keyed Non-linear FSR. CoRR abs/2207.11181 (2022) - 2021
- [j21]Anirudh Mohan Kaushik, Gennady Pekhimenko, Hiren D. Patel:
Gretch: A Hardware Prefetcher for Graph Analytics. ACM Trans. Archit. Code Optim. 18(2): 18:1-18:25 (2021) - [j20]Francesco Lumpp, Stefano Aldegheri, Hiren D. Patel, Nicola Bombieri:
Task Mapping and Scheduling for OpenVX Applications on Heterogeneous Multi/Many-Core Architectures. IEEE Trans. Computers 70(8): 1148-1159 (2021) - [j19]Anirudh Mohan Kaushik, Mohamed Hassan, Hiren D. Patel:
Designing Predictable Cache Coherence Protocols for Multi-Core Real-Time Systems. IEEE Trans. Computers 70(12): 2098-2111 (2021) - [c54]Francesco Lumpp, Hiren D. Patel, Nicola Bombieri:
A Framework for Optimizing CPU-iGPU Communication on Embedded Platforms. DAC 2021: 685-690 - [c53]Anirudh Mohan Kaushik, Hiren D. Patel:
Automated Synthesis of Predictable and High-Performance Cache Coherence Protocols. DATE 2021: 816-821 - [c52]Zhuanhao Wu, Anirudh Mohan Kaushik, Paulos Tegegn, Hiren D. Patel:
A Hardware Platform for Exploring Predictable Cache Coherence Protocols for Real-time Multicores. RTAS 2021: 92-104 - [c51]Anirudh Mohan Kaushik, Hiren D. Patel:
A Systematic Approach to Achieving Tight Worst-Case Latency and High-Performance Under Predictable Cache Coherence. RTAS 2021: 105-117 - 2020
- [c50]Stefano Aldegheri, Nicola Bombieri, Hiren D. Patel:
On the Task Mapping and Scheduling for DAG-based Embedded Vision Applications on Heterogeneous Multi/Many-core Architectures. DATE 2020: 1003-1006
2010 – 2019
- 2019
- [c49]Zhuanhao Wu, Hiren D. Patel, Manoj Sachdev, Mahesh V. Tripunitara:
Strengthening PUFs using Composition. ICCAD 2019: 1-8 - [c48]Anirudh M. Kaushik, Paulos Tegegn, Zhuanhao Wu, Hiren D. Patel:
CARP: A Data Communication Mechanism for Multi-core Mixed-Criticality Systems. RTSS 2019: 419-432 - [c47]Nivedita Sritharan, Anirudh M. Kaushik, Mohamed Hassan, Hiren D. Patel:
Enabling Predictable, Simultaneous and Coherent Data Sharing in Mixed Criticality Systems. RTSS 2019: 433-445 - [e3]Daniel Große, Sara Vinco, Hiren D. Patel:
Languages, Design Methods, and Tools for Electronic System Design - Selected Contributions from FDL 2017 [Verona, Italy, September 18-20, 2017]. Lecture Notes in Electrical Engineering 530, Springer 2019, ISBN 978-3-030-02214-3 [contents] - 2018
- [j18]Mohamed Hassan, Hiren D. Patel:
MCXplore: Automating the Validation Process of DRAM Memory Controller Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(5): 1050-1063 (2018) - [j17]Danlu Guo, Mohamed Hassan, Rodolfo Pellizzoni, Hiren D. Patel:
A Comparative Study of Predictable DRAM Controllers. ACM Trans. Embed. Comput. Syst. 17(2): 53:1-53:23 (2018) - [j16]Mohamed Hassan, Anirudh M. Kaushik, Hiren D. Patel:
Exposing Implementation Details of Embedded DRAM Memory Controllers through Latency-based Analysis. ACM Trans. Embed. Comput. Syst. 17(5): 90:1-90:25 (2018) - [e2]Hiren D. Patel, Tom J. Kazmierski, Sebastian Steinhorst:
2018 Forum on Specification & Design Languages, FDL 2018, Garching, Germany, September 10-12, 2018. IEEE 2018, ISBN 978-1-5386-6418-6 [contents] - 2017
- [j15]Mohamed Hassan, Hiren D. Patel, Rodolfo Pellizzoni:
PMC: A Requirement-Aware DRAM Controller for Multicore Mixed Criticality Systems. ACM Trans. Embed. Comput. Syst. 16(4): 100:1-100:28 (2017) - [c46]Nachiket Kapre, Hiren D. Patel:
Applying Models of Computation to OpenCL Pipes for FPGA Computing. IWOCL 2017: 9:1-9:4 - [c45]Mohamed Hassan, Anirudh M. Kaushik, Hiren D. Patel:
Predictable Cache Coherence for Multi-core Real-Time Systems. RTAS 2017: 235-246 - [e1]Franco Fummi, Hiren D. Patel, Samarjit Chakraborty:
2017 Forum on Specification and Design Languages, FDL 2017, Verona, Italy, September 18-20, 2017. IEEE 2017, ISBN 978-1-5386-4733-2 [contents] - [i1]Nivedita Sritharan, Anirudh M. Kaushik, Mohamed Hassan, Hiren D. Patel:
HourGlass: Predictable Time-based Cache Coherence Protocol for Dual-Critical Multi-Core Systems. CoRR abs/1706.07568 (2017) - 2016
- [j14]Hany Kashif, Hiren D. Patel, Sebastian Fischmeister:
Path Selection for Real-Time Communication on Priority-Aware NoCs. ACM Trans. Design Autom. Electr. Syst. 21(3): 53:1-53:25 (2016) - [c44]Mohamed Hassan, Hiren D. Patel:
MCXplore: An automated framework for validating memory controller designs. DATE 2016: 1357-1362 - [c43]Mohamed Hassan, Hiren D. Patel:
Criticality- and Requirement-Aware Bus Arbitration for Multi-Core Mixed Criticality Systems. RTAS 2016: 73-83 - [c42]Hany Kashif, Hiren D. Patel:
Buffer Space Allocation for Real-Time Priority-Aware Networks. RTAS 2016: 255-266 - 2015
- [j13]Hany Kashif, Sina Gholamian, Hiren D. Patel:
SLA: A Stage-Level Latency Analysisfor Real-Time Communicationin a Pipelined Resource Model. IEEE Trans. Computers 64(4): 1177-1190 (2015) - [c41]Hany Kashif, Johnson J. Thomas, Hiren D. Patel, Sebastian Fischmeister:
Static slack-based instrumentation of programs. ETFA 2015: 1-8 - [c40]Mohamed Hassan, Anirudh M. Kaushik, Hiren D. Patel:
Reverse-engineering embedded memory controllers through latency-based analysis. RTAS 2015: 297-306 - [c39]Mohamed Hassan, Hiren D. Patel, Rodolfo Pellizzoni:
A framework for scheduling DRAM memory accesses for multi-core mixed-time critical systems. RTAS 2015: 307-316 - 2014
- [j12]S. Visweswaran, Hiren D. Patel:
A graph associated with the set of all nonzero annihilating ideals of a commutative ring. Discret. Math. Algorithms Appl. 6(4) (2014) - [j11]Dan Wang, Aravindkumar Rajendiran, Sundaram Ananthanarayanan, Hiren D. Patel, Mahesh V. Tripunitara, Siddharth Garg:
Reliable Computing with Ultra-Reduced Instruction Set Coprocessors. IEEE Micro 34(6): 86-94 (2014) - [c38]Hany Kashif, Hiren D. Patel:
Bounding buffer space requirements for real-time priority-aware networks. ASP-DAC 2014: 113-118 - [c37]Stephen A. Edwards, Hiren D. Patel:
MEMOCODE 2014 software design contest: Space Invaders emulator. MEMOCODE 2014: 185 - 2013
- [j10]Aayush Prakash, Hiren D. Patel:
An Instruction Scratchpad Memory Allocation for the Precision Timed Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(11): 1819-1823 (2013) - [c36]Sundaram Ananthanarayanan, Siddharth Garg, Hiren D. Patel:
Low cost permanent fault detection using ultra-reduced instruction set co-processors. DATE 2013: 933-938 - [c35]Valeria Bertacco, Debapriya Chatterjee, Nicola Bombieri, Franco Fummi, Sara Vinco, Anirudh M. Kaushik, Hiren D. Patel:
On the use of GP-GPUs for accelerating compute-intensive EDA applications. DATE 2013: 1357-1366 - [c34]Anirudh M. Kaushik, Hiren D. Patel:
Systemc-clang: An open-source framework for analyzing mixed-abstraction SystemC models. FDL 2013: 1-8 - [c33]Hany Kashif, Sina Gholamian, Rodolfo Pellizzoni, Hiren D. Patel, Sebastian Fischmeister:
ORTAP: An Offset-based response time analysis for a pipelined communication resource model. IEEE Real-Time and Embedded Technology and Applications Symposium 2013: 247-258 - 2012
- [j9]Rohit Sinha, Hiren D. Patel:
synASM: A High-Level Synthesis Framework With Support for Parallel and Timed Constructs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(10): 1508-1521 (2012) - [c32]Rohit Sinha, Aayush Prakash, Hiren D. Patel:
Parallel simulation of mixed-abstraction SystemC models on GPUs and multicore CPUs. ASP-DAC 2012: 455-460 - [c31]Hany Kashif, Hiren D. Patel, Sebastian Fischmeister:
Using link-level latency analysis for path selection for real-time communication on NoCs. ASP-DAC 2012: 499-504 - [c30]Aravindkumar Rajendiran, Sundaram Ananthanarayanan, Hiren D. Patel, Mahesh V. Tripunitara, Siddharth Garg:
Reliable computing with ultra-reduced instruction set co-processors. DAC 2012: 697-702 - [c29]Aayush Prakash, Hiren D. Patel:
An instruction scratchpad memory allocation for the precision timed architecture. DATE 2012: 659-664 - [c28]Mahesh Nanjundappa, Anirudh M. Kaushik, Hiren D. Patel, Sandeep K. Shukla:
Accelerating SystemC simulations using GPUs. HLDVT 2012: 132-139 - 2011
- [j8]Siddharth Garg, Shreyas Sundaram, Hiren D. Patel:
Robust heterogeneous data center design: a principled approach. SIGMETRICS Perform. Evaluation Rev. 39(3): 28-30 (2011) - [c27]Jan Reineke, Isaac Liu, Hiren D. Patel, Sungjun Kim, Edward A. Lee:
PRET DRAM controller: bank privatization for predictability and temporal isolation. CODES+ISSS 2011: 99-108 - [c26]Dai N. Bui, Edward A. Lee, Isaac Liu, Hiren D. Patel, Jan Reineke:
Temporal isolation on multiprocessing architectures. DAC 2011: 274-279 - [c25]Rohit Sinha, Hiren D. Patel:
Abstract state machines as an intermediate representation for high-level synthesis. DATE 2011: 1406-1411 - [c24]Rohit Sinha, Hiren D. Patel:
Extending Force-Directed Scheduling with Explicit Parallel and Timed Constructs for High-Level Synthesis. FCCM 2011: 214-217 - [c23]Sitaram Chamarty, Hiren D. Patel, Mahesh V. Tripunitara:
An authorization scheme for version control systems. SACMAT 2011: 123-132 - 2010
- [c22]Mahesh Nanjundappa, Hiren D. Patel, Bijoy Antony Jose, Sandeep K. Shukla:
SCGPSim: a fast SystemC simulator on GPUs. ASP-DAC 2010: 149-154 - [c21]Nathan Buchanan, Hiren D. Patel:
Towards a Multi-MoC Hardware/Software Co-design Framework Using Abstract State Machines. MTV 2010: 53-58 - [c20]Dai N. Bui, Hiren D. Patel, Edward A. Lee:
Deploying Hard Real-Time Control Software on Chip-Multiprocessors. RTCSA 2010: 283-292
2000 – 2009
- 2009
- [c19]Stephen A. Edwards, Sungjun Kim, Edward A. Lee, Isaac Liu, Hiren D. Patel, Martin Schoeberl:
A disruptive computer design idea: Architectures with repeatable timing. ICCD 2009: 54-59 - 2008
- [b3]Hiren D. Patel, Sandeep Kumar Shukla:
Ingredients for Successful System Level Design Methodology. Springer 2008, ISBN 978-1-4020-8471-3, pp. I-XV, 1-207 - [j7]Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch:
SML-Sys: a functional framework with multiple models of computation for modeling heterogeneous system. Des. Autom. Embed. Syst. 12(1-2): 1-30 (2008) - [j6]Hiren D. Patel, Sandeep K. Shukla:
Model-Driven Validation of SystemC Designs. EURASIP J. Embed. Syst. 2008 (2008) - [j5]Hiren D. Patel, Sandeep K. Shukla:
On Cosimulating Multiple Abstraction-Level System-Level Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(2): 394-398 (2008) - [c18]Reinaldo A. Bergamaschi, Guoling Han, Alper Buyuktosunoglu, Hiren D. Patel, Indira Nair, Gero Dittmann, Geert Janssen, Nagu R. Dhanwada, Zhigang Hu, Pradip Bose, John A. Darringer:
Exploring power management in multi-core systems. ASP-DAC 2008: 708-713 - [c17]Ben Lickly, Isaac Liu, Sungjun Kim, Hiren D. Patel, Stephen A. Edwards, Edward A. Lee:
Predictable programming on a precision timed architecture. CASES 2008: 137-146 - [c16]Shanna-Shaye Forbes, Hiren D. Patel, Edward A. Lee, Hugo A. Andrade:
An Automated Mapping of Timed Functional Specification to a Precision Timed Architecture. DS-RT 2008: 322-325 - [c15]Bijoy Antony Jose, Sandeep K. Shukla, Hiren D. Patel, Jean-Pierre Talpin:
On the Deterministic Multi-threaded Software Synthesis from Polychronous Specifications. MEMOCODE 2008: 129-138 - [c14]Bijoy Antony Jose, Hiren D. Patel, Sandeep K. Shukla, Jean-Pierre Talpin:
Generating Multi-Threaded code from Polychronous Specifications. SLAP@ETAPS 2008: 57-69 - 2007
- [b2]Hiren D. Patel:
Ingredients for Successful System Level Automation & Design Methodology. Virginia Tech, Blacksburg, VA, USA, 2007 - [j4]Hiren D. Patel, Sandeep K. Shukla, Reinaldo A. Bergamaschi:
Heterogeneous Behavioral Hierarchy Extensions for SystemC. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(4): 765-780 (2007) - [j3]Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch:
EWD: A metamodeling driven customizable multi-MoC system modeling framework. ACM Trans. Design Autom. Electr. Syst. 12(3): 33:1-33:43 (2007) - [c13]Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han:
Performance modeling for early analysis of multi-core systems. CODES+ISSS 2007: 209-214 - [c12]Hiren D. Patel, Sandeep K. Shukla:
Model-driven Validation of SystemC Designs. DAC 2007: 29-34 - [c11]Hiren D. Patel, Sandeep K. Shukla:
Tackling an abstraction gap: co-simulating SystemC DE with bluespec ESL. DATE 2007: 279-284 - 2006
- [j2]Hiren D. Patel, Deepak Mathaikutty, David Berner, Sandeep K. Shukla:
CARH: service-oriented architecture for validating system-level designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(8): 1458-1474 (2006) - [c10]Hiren D. Patel, Sandeep K. Shukla, Reinaldo A. Bergamaschi:
Heterogeneous behavioral hierarchy for system level designs. DATE 2006: 565-570 - [c9]Hiren D. Patel, Sandeep K. Shukla, E. Mednick, Rishiyur S. Nikhil:
A rule-based model of computation for SystemC: integrating SystemC and Bluespec for co-design. MEMOCODE 2006: 39-48 - [c8]Hiren D. Patel, Sandeep K. Shukla:
Deep vs. Shallow, Kernel vs. Language--What is Better for Heterogeneous Modeling in {SystemC}?. MTV 2006: 68-75 - 2005
- [j1]Hiren D. Patel, Sandeep K. Shukla:
Towards a heterogeneous simulation kernel for system-level models: a SystemC kernel for synchronous data flow models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(8): 1261-1271 (2005) - [c7]Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch:
Modelling Environment for Heterogeneous Systems based on MoCs. FDL 2005: 291-303 - [c6]Hiren D. Patel, Sandeep K. Shukla:
Towards Behavioural Hierarchy Extensions for SystemC. FDL 2005: 361-373 - [c5]David Berner, Jean-Pierre Talpin, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla:
SystemCXML: An Exstensible SystemC Front end Using XML. FDL 2005: 405-409 - [c4]David Berner, Hiren D. Patel, Deepak Mathaikutty, Sandeep K. Shukla:
Automated Extraction of Structural Information from SystemC-based IP for Validation. MTV 2005: 99-104 - [p1]Hiren D. Patel, Sumit Gupta, Sandeep K. Shukla, Rajesh Gupta:
An Introductory Survey of Networked Embedded Systems. The Industrial Information Technology Handbook 2005 - [r1]Hiren D. Patel, Sumit Gupta, Sandeep K. Shukla, Rajesh K. Gupta:
Design Issues for Networked Embedded Systems. Embedded Systems Handbook 2005 - 2004
- [b1]Hiren D. Patel, Sandeep Kumar Shukla:
SystemC Kernel extensions for heterogeneous system modeling - a framework for multi-MoC modeling and simulation. Kluwer 2004, ISBN 978-1-4020-8087-6, pp. I-XXXII, 1-172 - [c3]Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla:
A Functional Programming Framework of Heterogeneous Model of Computation for System Design. FDL 2004: 586-598 - [c2]Hiren D. Patel, Sandeep K. Shukla:
Towards a heterogeneous simulation kernel for system level models: a SystemC kernel for synchronous data flow models. ACM Great Lakes Symposium on VLSI 2004: 248-253 - [c1]Hiren D. Patel, Sandeep K. Shukla:
Towards a Heterogeneous Simulation Kernel for System Level Models: A SystemC Kernel for Synchronous Data Flow Models. ISVLSI 2004: 241-242
Coauthor Index
Anirudh M. Kaushik
aka: Anirudh Mohan Kaushik
aka: Anirudh Mohan Kaushik
Sandeep K. Shukla
aka: Sandeep Kumar Shukla
aka: Sandeep Kumar Shukla
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