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Bohan Yang 0004
Person information
- affiliation: Tsinghua University, Institute of Microelectronics, Beijing, China
Other persons with the same name
- Bohan Yang 0001 — K.U. Leuven, Belgium
- Bohan Yang 0002 — Shanghai Jiao Tong University
- Bohan Yang 0003 — Chinese Academy of Social Science, Department of World Economics and Politics, China
- Bohan Yang 0005
— Chinese University of Hong Kong, Department of Mechanical and Automation Engineering, Hong Kong
- Bohan Yang 0006 — Cornell University, Ithaca, NY, USA
- Bohan Yang 0007
— Shandong University, School of Mathematics, Jinan, China
- Bohan Yang 0008 — Wuhan University, Global Navigation Satellite System Research Center, Wuhan, China
- Bohan Yang 0009 — Southwest Petroleum University, School of Mechatronic Engineering, Chengdu, China
- Bohan Yang 0010 — Guizhou Normal University, School of Physics and Electronic Science, Guiyang, China
- Bohan Yang 0011 — Chinese Academy of Sciences, Changchun Institute of Optics, Fine Mechanics and Physics, China
- Bohan Yang 0012
— Chinese Academy of Sciences, Shenyang Institute of Automation, State Key Laboratory of Robotics, China
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2020 – today
- 2024
- [j10]Jiangxue Liu, Cankun Zhao, Shuohang Peng, Bohan Yang, Hang Zhao, Xiangdong Han, Min Zhu, Shaojun Wei, Leibo Liu:
A Low-Latency High-Order Arithmetic to Boolean Masking Conversion. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024(2): 630-653 (2024) - [j9]Xiangren Chen, Bohan Yang, Jianfeng Zhu, Jun Liu, Shuying Yin, Guang Yang, Min Zhu, Shaojun Wei, Leibo Liu:
UpWB: An Uncoupled Architecture Design for White-box Cryptography Using Vectorized Montgomery Multiplication. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024(2): 677-713 (2024) - [c4]Hang Zhao, Cankun Zhao, Wenping Zhu, Bohan Yang, Shaojun Wei, Leibo Liu:
Sparse Polynomial Multiplication-Based High-Performance Hardware Implementation for CRYSTALS-Dilithium. HOST 2024: 150-159 - [i3]Jiangxue Liu, Cankun Zhao, Shuohang Peng, Bohan Yang, Hang Zhao, Xiangdong Han, Min Zhu, Shaojun Wei, Leibo Liu:
A Low-Latency High-Order Arithmetic to Boolean Masking Conversion. IACR Cryptol. ePrint Arch. 2024: 45 (2024) - 2023
- [j8]Shuqin Su, Bohan Yang, Vladimir Rozic, Mingyuan Yang, Min Zhu, Shaojun Wei, Leibo Liu:
A Closer Look at the Chaotic Ring Oscillators based TRNG Design. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2023(2): 381-417 (2023) - [c3]Shuohang Peng, Bohan Yang, Shuying Yin, Hang Zhao, Cankun Zhao, Shaojun Wei, Leibo Liu:
A Low-Randomness First-Order Masked Xoodyak. HOST 2023: 48-56 - [i2]Shuqin Su, Bohan Yang, Vladimir Rozic, Mingyuan Yang, Min Zhu, Shaojun Wei, Leibo Liu:
A Closer Look at the Chaotic Ring Oscillators based TRNG Design. IACR Cryptol. ePrint Arch. 2023: 40 (2023) - 2022
- [j7]Chenchen Deng, Min Zhu, Jinjiang Yang, Youyu Wu, Jiaji He, Bohan Yang, Jianfeng Zhu, Shouyi Yin, Shaojun Wei, Leibo Liu:
An energy-efficient dynamically reconfigurable cryptographic engine with improved power/EM-side-channel-attack resistance. Sci. China Inf. Sci. 65(4) (2022) - [j6]Zongsheng Hou
, Neng Zhang
, Bohan Yang, Hanning Wang
, Min Zhu, Shouyi Yin
, Shaojun Wei
, Leibo Liu
:
Efficient FHE Radix-2 Arithmetic Operations Based on Redundant Encoding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2024-2037 (2022) - [j5]Xiangren Chen, Bohan Yang, Shouyi Yin, Shaojun Wei, Leibo Liu:
CFNTT: Scalable Radix-2/4 NTT Multiplication Architecture with an Efficient Conflict-free Memory Mapping Scheme. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022(1): 94-126 (2022) - [j4]Cankun Zhao, Neng Zhang, Hanning Wang, Bohan Yang, Wenping Zhu, Zhengdong Li, Min Zhu, Shouyi Yin, Shaojun Wei, Leibo Liu:
A Compact and High-Performance Hardware Architecture for CRYSTALS-Dilithium. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022(1): 270-295 (2022) - [c2]Xiangren Chen, Bohan Yang, Yong Lu, Shouyi Yin, Shaojun Wei, Leibo Liu:
Efficient access scheme for multi-bank based NTT architecture through conflict graph. DAC 2022: 91-96 - [c1]Mingyuan Yang, Yemeng Zhang, Bohan Yang, Hanning Wang, Shouyi Yin, Shaojun Wei, Leibo Liu:
A SHA-512 Hardware Implementation Based on Block RAM Storage Structure. IPDPS Workshops 2022: 132-135 - 2021
- [j3]Neng Zhang
, Qiao Qin, Zongsheng Hou
, Bohan Yang, Shouyi Yin
, Shaojun Wei
, Leibo Liu
:
Efficient Comparison and Addition for FHE With Weighted Computational Complexity Model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(9): 1896-1908 (2021) - [j2]Yihong Zhu
, Min Zhu, Bohan Yang
, Wenping Zhu, Chenchen Deng
, Chen Chen
, Shaojun Wei
, Leibo Liu
:
LWRpro: An Energy-Efficient Configurable Crypto-Processor for Module-LWR. IEEE Trans. Circuits Syst. I Regul. Pap. 68(3): 1146-1159 (2021) - 2020
- [j1]Neng Zhang, Bohan Yang, Chen Chen, Shouyi Yin, Shaojun Wei, Leibo Liu:
Highly Efficient Architecture of NewHope-NIST on FPGA using Low-Complexity NTT/INTT. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2020(2): 49-72 (2020) - [i1]Yihong Zhu, Min Zhu, Bohan Yang, Wenping Zhu, Chenchen Deng, Chen Chen, Shaojun Wei, Leibo Liu:
A High-performance Hardware Implementation of Saber Based on Karatsuba Algorithm. IACR Cryptol. ePrint Arch. 2020: 1037 (2020)
Coauthor Index
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last updated on 2024-07-19 21:19 CEST by the dblp team
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