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Yunhui Qiu
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2020 – today
- 2024
- [j4]Yunhui Qiu
, Yiqing Mao
, Xuchen Gao
, Sichao Chen
, Jiangnan Li
, Wenbo Yin
, Lingli Wang
:
FDRA: A Framework for a Dynamically Reconfigurable Accelerator Supporting Multi-Level Parallelism. ACM Trans. Reconfigurable Technol. Syst. 17(1): 4:1-4:26 (2024) - [j3]Yuan Dai
, Jingyuan Li
, Qilong Zhu, Yunhui Qiu
, Yihan Hu, Wenbo Yin, Lingli Wang
:
HETA: A Heterogeneous Temporal CGRA Modeling and Design Space Exploration via Bayesian Optimization. IEEE Trans. Very Large Scale Integr. Syst. 32(3): 505-518 (2024) - [c14]Xuchen Gao, Yunhui Qiu, Yuan Dai, Wenbo Yin, Lingli Wang:
A CGRA Front-end Compiler Enabling Extraction of General Control and Dedicated Operators. ASPDAC 2024: 799-804 - [c13]Jiahang Lou, Xuchen Gao, Yiqing Mao, Yunhui Qiu, Yihan Hu, Wenbo Yin, Lingli Wang:
An Agile Deploying Approach for Large-Scale Workloads on CGRA-CPU Architecture. DATE 2024: 1-6 - 2023
- [c12]Mingyang Chen, Yunhui Qiu, Kaixiang Zhu, Lingli Wang:
An Automatic Optimization Method of Combinational Logic Loops in CGRA. ASICON 2023: 1-4 - [c11]Yuan Dai
, Yunhui Qiu, Qilong Zhu, Jingyuan Li
, Wenbo Yin, Lingli Wang:
UPTRA: An Ultra-Parameterized Temporal CGRA Modeling and Optimization. FCCM 2023: 208 - [c10]Bingbing Peng, Shaoyang Sun, Yuan Dai
, Jingyuan Li
, Yunhui Qiu, Kaihang Wang, Wenbo Yin, Lingli Wang:
PRAD: A Bayesian Optimization-based DSE Framework for Parameterized Reconfigurable Architecture Design. FCCM 2023: 226 - [c9]Yuhang Cao, Yunhui Qiu, Xuchen Gao
, Qilong Zhu, Wenbo Yin, Lingli Wang:
E2-ACE: An Energy-Efficient Reconfigurable Crypto-Accelerator with Agile End-to-End Toolchain. ICFPT 2023: 296-297 - [c8]Qilong Zhu, Yuhang Cao, Yunhui Qiu, Xuchen Gao
, Wenbo Yin, Lingli Wang:
A Dynamic Partial Reconfigurable CGRA Framework for Multi-Kernel Applications. ICFPT 2023: 298-299 - [c7]Jingyuan Li
, Yunhui Qiu, Guowei Zhu, Qilong Zhu, Wenbo Yin, Lingli Wang:
THRAM: A Template-based Heterogeneous CGRA Modeling Framework Supporting Fast DSE. ISCAS 2023: 1-5 - 2022
- [j2]Yunhui Qiu
, Wenbo Yin, Lingli Wang
:
A High-Performance and Scalable NVMe Controller Featuring Hardware Acceleration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(5): 1344-1357 (2022) - [c6]Yunhui Qiu, Yuhang Cao, Yuan Dai
, Wenbo Yin, Lingli Wang:
TRAM: An Open-Source Template-based Reconfigurable Architecture Modeling Framework. FPL 2022: 61-69 - 2021
- [c5]Yunhui Qiu, Wenbo Yin, Lingli Wang:
A High-performance Open-channel Open-way NAND Flash Controller Architecture. FPL 2021: 91-98 - 2020
- [j1]Yunhui Qiu
, Jinyu Xie, Hankun Lv, Wenbo Yin, Wai-Shing Luk, Lingli Wang
, Bowei Yu, Hua Chen, Xianjun Ge, Zhijian Liao, Xiaozhong Shi:
FULL-KV: Flexible and Ultra-Low-Latency In-Memory Key-Value Store System Design on CPU-FPGA. IEEE Trans. Parallel Distributed Syst. 31(8): 1828-1444 (2020) - [c4]Hankun Lv, Yuchen Ren, Yunhui Qiu, Wenbo Yin, Lingli Wang:
High Throughput and Low Latency Multi-Version Management Key-Value Storage Accelerator. FPT 2020: 290-291
2010 – 2019
- 2019
- [c3]Yuchen Ren, Zhijian Liao, Xiaozhong Shi, Jinyu Xie, Yunhui Qiu, Hankun Lv, Wenbo Yin, Lingli Wang, Bowei Yu, Hua Chen, Xianjun He:
A Low-Latency Multi-Version Key-Value Store Using B-Tree on an FPGA-CPU Platform. FPL 2019: 321-325 - [c2]Jinyu Xie, Yunhui Qiu, Wenbo Yin, Lingli Wang:
High-Throughput and Low-Latency Distributed Management Proxy for Key-Value Store Over 100Gbps Ethernet on FPGA. FPT 2019: 224-230 - 2018
- [c1]Yunhui Qiu, Hankun Lv, Jinyu Xie, Wenbo Yin, Lingli Wang:
Ultra-Low-Latency and Flexible In-memory Key-Value Store System Design on CPU-FPGA. FPT 2018: 142-149
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last updated on 2024-08-23 19:21 CEST by the dblp team
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