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ORCIDDawen Xu 0002
Person information
- affiliation: Hefei University of Technology, Anhui, China
- affiliation: Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Academy of Sciences, China
Other persons with the same name
- Dawen Xu 0001
![[0000-0002-9619-8407]](https://dblp1.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-9619-8407")
— Ningbo University, CKC Software Lab, China (and 1 more) - Dawen Xu 0003 — Nanjing University of Aeronautics and Astronautics, College of Mechanical and Electrical Engineering, China
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2020 – today
- 2024
[c18]Shengwen Liang, Ziming Yuan, Ying Wang, Dawen Xu, Huawei Li, Xiaowei Li:
HyQA: Hybrid Near-Data Processing Platform for Embedding Based Question Answering System. DATE 2024: 1-6- 2023
- [j9]Cheng Chu, Cheng Liu, Dawen Xu, Ying Wang, Tao Luo, Huawei Li, Xiaowei Li:
Accelerating Deformable Convolution Networks with Dynamic and Irregular Memory Accesses. ACM Trans. Design Autom. Electr. Syst. 28(4): 67:1-67:23 (2023) - 2022
- [j8]Cheng Liu, Cheng Chu, Dawen Xu, Ying Wang, Qianlong Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(10): 3400-3413 (2022) - [j7]Dawen Xu, Zhuangyu Feng, Cheng Liu, Li Li, Ying Wang, Huawei Li, Xiaowei Li:
Taming Process Variations in CNFET for Efficient Last-Level Cache Design. IEEE Trans. Very Large Scale Integr. Syst. 30(4): 418-431 (2022) - [c17]Samuel J. Engers, Cheng Chu, Dawen Xu, Ying Wang, Fan Chen:
MOCCA: A Process Variation Tolerant Systolic DNN Accelerator using CNFETs in Monolithic 3D. ACM Great Lakes Symposium on VLSI 2022: 379-382 - [c16]Cheng Chu, Dawen Xu, Ying Wang, Fan Chen:
Canopy: A CNFET-based Process Variation Aware Systolic DNN Accelerator. ISLPED 2022: 24:1-24:6 - 2021
- [j6]Bao Fang, Huaguo Liang, Dawen Xu, Maoxiang Yi, Yongxia Sheng, Cuiyun Jiang, Zhengfeng Huang, Yingchun Lu:
Approximate multipliers based on a novel unbiased approximate 4-2 compressor. Integr. 81: 17-24 (2021) - [j5]Shengwen Liang, Ying Wang, Cheng Liu, Lei He, Huawei Li, Dawen Xu, Xiaowei Li:
EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks. IEEE Trans. Computers 70(9): 1511-1525 (2021) - [j4]Dawen Xu, Ziyang Zhu, Cheng Liu, Ying Wang, Shuang Zhao, Lei Zhang, Huaguo Liang, Huawei Li, Kwang-Ting Cheng:
Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System. IEEE Trans. Very Large Scale Integr. Syst. 29(3): 472-484 (2021) - [j3]Dawen Xu, Meng He, Cheng Liu, Ying Wang, Long Cheng, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
R2F: A Remote Retraining Framework for AIoT Processors With Computing Errors. IEEE Trans. Very Large Scale Integr. Syst. 29(11): 1955-1966 (2021) - [c15]Cheng Chu, Fan Chen, Dawen Xu, Ying Wang:
RECOIN: A Low-Power Processing-in-ReRAM Architecture for Deformable Convolution. ACM Great Lakes Symposium on VLSI 2021: 235-240 - [i4]Dawen Xu, Qianlong Wang, Cheng Liu, Cheng Chu, Ying Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
HyCA: A Hybrid Computing Architecture for Fault Tolerant Deep Learning. CoRR abs/2106.04772 (2021) - [i3]Dawen Xu, Cheng Chu, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
Energy-Efficient Accelerator Design for Deformable Convolution Networks. CoRR abs/2107.02547 (2021) - [i2]Dawen Xu, Meng He, Cheng Liu, Ying Wang, Long Cheng, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
R2F: A Remote Retraining Framework for AIoT Processors with Computing Errors. CoRR abs/2107.03096 (2021) - [i1]Dawen Xu, Zhuangyu Feng, Cheng Liu, Li Li, Ying Wang, Yuanqing Cheng, Huawei Li, Xiaowei Li:
Taming Process Variations in CNFET for Efficient Last Level Cache Design. CoRR abs/2108.05023 (2021) - 2020
- [j2]Dawen Xu, Cheng Liu, Ying Wang, Kaijie Tu, Bingsheng He, Lei Zhang:
Accelerating Generative Neural Networks on Unmodified Deep Learning Processors - A Software Approach. IEEE Trans. Computers 69(8): 1172-1184 (2020) - [c14]Dawen Xu, Ziyang Zhu, Cheng Liu, Ying Wang, Huawei Li, Lei Zhang, Kwang-Ting Cheng:
Persistent Fault Analysis of Neural Networks on FPGA-based Acceleration System. ASAP 2020: 85-92 - [c13]Songyun Qu, Bing Li, Ying Wang, Dawen Xu, Xiandong Zhao, Lei Zhang:
RaQu: An automatic high-utilization CNN quantization and mapping framework for general-purpose RRAM Accelerator. DAC 2020: 1-6 - [c12]Dawen Xu, Kexin Chu, Cheng Liu, Ying Wang, Lei Zhang, Huawei Li:
CNT-Cache: an Energy-Efficient Carbon Nanotube Cache with Adaptive Encoding. DATE 2020: 963-966 - [c11]Dawen Xu, Cheng Chu, Cheng Liu, Ying Wang, Xianzhong Zhou, Lei Zhang, Huaguo Liang, Huawei Li:
Multi-task Scheduling for PIM-based Heterogeneous Computing System. ACM Great Lakes Symposium on VLSI 2020: 457-462 - [c10]Dawen Xu, Cheng Chu, Qianlong Wang, Cheng Liu, Ying Wang, Lei Zhang, Huaguo Liang, Kwang-Ting Cheng:
A Hybrid Computing Architecture for Fault-tolerant Deep Learning Accelerators. ICCD 2020: 478-485
2010 – 2019
- 2019
- [c9]Dawen Xu, KouZi Xing, Cheng Liu, Ying Wang, Yulin Dai, Long Cheng, Huawei Li, Lei Zhang:
Resilient Neural Network Training for Accelerators with Computing Errors. ASAP 2019: 99-102 - [c8]Dawen Xu, Li Li, Ying Wang, Cheng Liu, Huawei Li:
Exploring emerging CNFET for efficient last level cache design. ASP-DAC 2019: 426-431 - [c7]Li Li, Dawen Xu, Kouzi Xing, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li:
Squeezing the Last MHz for CNN Acceleration on FPGAs. ITC-Asia 2019: 151-156 - 2018
- [c6]Dawen Xu, Kaijie Tu, Ying Wang, Cheng Liu, Bingsheng He, Huawei Li:
FCN-engine: accelerating deconvolutional layers in classic CNN processors. ICCAD 2018: 22 - [c5]Desong Pang, Dawen Xu, Ying Wang, Huaguo Liang:
MTTF-Aware Reliability Task Scheduling for PIM-Based Heterogeneous Computing System. ITC-Asia 2018: 25-30 - 2017
- [c4]Dawen Xu, Yi Liao, Ying Wang, Huawei Li, Xiaowei Li:
Selective off-loading to Memory: Task Partitioning and Mapping for PIM-enabled Heterogeneous Systems. Conf. Computing Frontiers 2017: 255-258 - 2015
- [c3]Huaguo Liang, Yangyang Dai, Maoxiang Yi, Dawen Xu, Zhengfeng Huang:
MTTF-Aware Reliability Task Scheduling for Heterogeneous Multicore System. ICA3PP (2) 2015: 716-727 - [c2]Guimao Zhang, Maoxiang Yi, Yong Miao, Dawen Xu, Huaguo Liang:
NBTI-induced circuit aging optimization by protectability-aware gate replacement technique. LATS 2015: 1-4 - 2014
- [j1]Dawen Xu, Huawei Li, Amirali Ghofrani, Kwang-Ting Cheng, Yinhe Han, Xiaowei Li:
Test-Quality Optimization for Variable $n$ -Detections of Transition Faults. IEEE Trans. Very Large Scale Integr. Syst. 22(8): 1738-1749 (2014) - 2010
- [c1]Huawei Li, Dawen Xu, Yinhe Han, Kwang-Ting Cheng, Xiaowei Li:
nGFSIM : A GPU-based fault simulator for 1-to-n detection and its applications. ITC 2010: 343-352
Coauthor Index
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