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Xinyu Niu
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2020 – today
- 2023
- [j20]Linghui Kong
, Haizhong Qian, Yuqing Wu, Xinyu Niu, Di Wang, Zhekun Huang:
Simplification and Regularization Algorithm for Right-Angled Polygon Building Outlines with Jagged Edges. ISPRS Int. J. Geo Inf. 12(12): 469 (2023) - [j19]Chenggang Wang, Xiong Xu, Defu Liu, Xinyu Niu, Shijiao Han:
Simple and effective complementary label learning based on mean square error loss. Mach. Vis. Appl. 34(6): 118 (2023) - [j18]Hongxiang Fan
, Shuanglong Liu
, Zhiqiang Que
, Xinyu Niu, Wayne Luk:
High-Performance Acceleration of 2-D and 3-D CNNs on FPGAs Using Static Block Floating Point. IEEE Trans. Neural Networks Learn. Syst. 34(8): 4473-4487 (2023) - [j17]Zhiqiang Que
, Hiroki Nakahara
, Hongxiang Fan
, He Li
, Jiuxi Meng
, Kuen Hung Tsoi
, Xinyu Niu
, Eriko Nurvitadhi
, Wayne Luk
:
Remarn: A Reconfigurable Multi-threaded Multi-core Accelerator for Recurrent Neural Networks. ACM Trans. Reconfigurable Technol. Syst. 16(1): 4:1-4:26 (2023) - 2022
- [j16]Hongxiang Fan
, Martin Ferianc
, Zhiqiang Que
, Shuanglong Liu
, Xinyu Niu, Miguel R. D. Rodrigues
, Wayne Luk:
FPGA-Based Acceleration for Bayesian Convolutional Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5343-5356 (2022) - [j15]Shuanglong Liu
, Hongxiang Fan
, Martin Ferianc
, Xinyu Niu, Huifeng Shi, Wayne Luk:
Toward Full-Stack Acceleration of Deep Convolutional Neural Networks on FPGAs. IEEE Trans. Neural Networks Learn. Syst. 33(8): 3974-3987 (2022) - [j14]Hongxiang Fan
, Martin Ferianc
, Zhiqiang Que
, Xinyu Niu, Miguel R. D. Rodrigues
, Wayne Luk:
Accelerating Bayesian Neural Networks via Algorithmic and Hardware Optimizations. IEEE Trans. Parallel Distributed Syst. 33(12): 3387-3399 (2022) - [j13]Zhiqiang Que
, Hiroki Nakahara
, Eriko Nurvitadhi, Andrew Boutros, Hongxiang Fan
, Chenglong Zeng, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Wayne Luk:
Recurrent Neural Networks With Column-Wise Matrix-Vector Multiplication on FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 30(2): 227-237 (2022) - [c49]Hongxiang Fan, Martin Ferianc, Zhiqiang Que, He Li, Shuanglong Liu, Xinyu Niu, Wayne Luk:
Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator. ASP-DAC 2022: 250-255 - 2021
- [j12]Zhiqiang Que
, Daniel Holanda Noronha, Ruizhe Zhao, Xinyu Niu, Steven J. E. Wilton, Wayne Luk:
In-circuit tuning of deep learning designs. J. Syst. Archit. 118: 102198 (2021) - [j11]Jianghong Zhao
, Yinrui Wang
, Yuee Cao, Ming Guo, Xianfeng Huang, Ruiju Zhang, Xintong Dou, Xinyu Niu, Yuanyuan Cui, Jun Wang:
The Fusion Strategy of 2D and 3D Information Based on Deep Learning: A Review. Remote. Sens. 13(20): 4029 (2021) - [c48]Hongxiang Fan, Martin Ferianc
, Miguel Rodrigues, Hongyu Zhou, Xinyu Niu, Wayne Luk:
High-Performance FPGA-based Accelerator for Bayesian Neural Networks. DAC 2021: 1063-1068 - [i4]Hongxiang Fan, Martin Ferianc, Miguel Rodrigues, Hongyu Zhou, Xinyu Niu, Wayne Luk:
High-Performance FPGA-based Accelerator for Bayesian Neural Networks. CoRR abs/2105.09163 (2021) - [i3]Hongxiang Fan, Martin Ferianc, Zhiqiang Que, He Li, Shuanglong Liu, Xinyu Niu, Wayne Luk:
Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator. CoRR abs/2111.12787 (2021) - 2020
- [j10]Zhiqiang Que
, Yongxin Zhu, Hongxiang Fan, Jiuxi Meng, Xinyu Niu, Wayne Luk:
Mapping Large LSTMs to FPGAs with Weight Reuse. J. Signal Process. Syst. 92(9): 965-979 (2020) - [c47]Zhiqiang Que, Hiroki Nakahara, Eriko Nurvitadhi, Hongxiang Fan, Chenglong Zeng, Jiuxi Meng, Xinyu Niu, Wayne Luk:
Optimizing Reconfigurable Recurrent Neural Networks. FCCM 2020: 10-18 - [c46]Hongxiang Fan, Martin Ferianc
, Shuanglong Liu, Zhiqiang Que, Xinyu Niu, Wayne Luk:
Optimizing FPGA-Based CNN Accelerator Using Differentiable Neural Architecture Search. ICCD 2020: 465-468 - [c45]Zhiqiang Que, Hiroki Nakahara, Hongxiang Fan, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Eriko Nurvitadhi, Wayne Luk:
A Reconfigurable Multithreaded Accelerator for Recurrent Neural Networks. FPT 2020: 20-28 - [c44]Zhiqiang Que, Daniel Holanda Noronha, Ruizhe Zhao, Xinyu Niu, Steven J. E. Wilton, Wayne Luk:
Towards Overlay-based Rapid In-Circuit Tuning of Deep Learning Designs. FPT 2020: 301 - [c43]Ruizhe Zhao, Wayne Luk, Chao Xiong, Xinyu Niu, Kuen Hung Tsoi:
On the challenges in programming mixed-precision deep neural networks. MAPL@PLDI 2020: 20-28
2010 – 2019
- 2019
- [j9]Erwei Wang
, James J. Davis, Ruizhe Zhao, Ho-Cheung Ng, Xinyu Niu, Wayne Luk, Peter Y. K. Cheung, George A. Constantinides:
Deep Neural Network Approximation for Custom Hardware: Where We've Been, Where We're Going. ACM Comput. Surv. 52(2): 40:1-40:39 (2019) - [c42]Hongxiang Fan, Cheng Luo, Chenglong Zeng, Martin Ferianc
, Zhiqiang Que, Shuanglong Liu, Xinyu Niu, Wayne Luk:
F-E3D: FPGA-based Acceleration of an Efficient 3D Convolutional Neural Network for Human Action Recognition. ASAP 2019: 1-8 - [c41]Zhiqiang Que
, Thomas Nugent, Shuanglong Liu, Li Tian, Xinyu Niu, Yongxin Zhu, Wayne Luk:
Efficient Weight Reuse for Large LSTMs. ASAP 2019: 17-24 - [c40]Hongxiang Fan, Gang Wang, Martin Ferianc
, Xinyu Niu, Wayne Luk:
Static Block Floating-Point Quantization for Convolutional Neural Networks on FPGA. FPT 2019: 28-35 - [c39]Zhiqiang Que
, Yanyang Liu, Ce Guo, Xinyu Niu, Yongxin Zhu, Wayne Luk:
Real-Time Anomaly Detection for Flight Testing Using AutoEncoder and LSTM. FPT 2019: 379-382 - [i2]Erwei Wang, James J. Davis, Ruizhe Zhao, Ho-Cheung Ng, Xinyu Niu, Wayne Luk, Peter Y. K. Cheung, George A. Constantinides:
Deep Neural Network Approximation for Custom Hardware: Where We've Been, Where We're Going. CoRR abs/1901.06955 (2019) - 2018
- [j8]Shuanglong Liu
, Hongxiang Fan, Xinyu Niu, Ho-Cheung Ng, Yang Chu, Wayne Luk:
Optimizing CNN-based Segmentation with Deeply Customized Convolutional and Deconvolutional Architectures on FPGA. ACM Trans. Reconfigurable Technol. Syst. 11(3): 19:1-19:22 (2018) - [c38]Ruizhe Zhao, Shuanglong Liu, Ho-Cheung Ng, Erwei Wang, James J. Davis, Xinyu Niu, Xiwei Wang, Huifeng Shi, George A. Constantinides, Peter Y. K. Cheung, Wayne Luk:
Hardware Compilation of Deep Neural Networks: An Overview. ASAP 2018: 1-8 - [c37]Ruizhe Zhao, Xinyu Niu, Wayne Luk:
Automatic Optimising CNN with Depthwise Separable Convolution on FPGA: (Abstact Only). FPGA 2018: 285 - [c36]Shuanglong Liu, Xinyu Niu, Wayne Luk:
A Low-Power Deconvolutional Accelerator for Convolutional Neural Network Based Segmentation on FPGA: Abstract Only. FPGA 2018: 293 - [c35]Ruizhe Zhao, Ho-Cheung Ng, Wayne Luk, Xinyu Niu:
Towards Efficient Convolutional Neural Network for Domain-Specific Applications on FPGA. FPL 2018: 147-154 - [c34]Hongxiang Fan, Ho-Cheung Ng, Shuanglong Liu, Zhiqiang Que, Xinyu Niu, Wayne Luk:
Reconfigurable Acceleration of 3D-CNNs for Human Action Recognition with Block Floating-Point Representation. FPL 2018: 287-294 - [c33]Hongxiang Fan, Shuanglong Liu, Martin Ferianc
, Ho-Cheung Ng, Zhiqiang Que, Shen Liu, Xinyu Niu, Wayne Luk:
A Real-Time Object Detection Accelerator with Compressed SSDLite on FPGA. FPT 2018: 14-21 - [c32]Shuanglong Liu, Chenglong Zeng, Hongxiang Fan, Ho-Cheung Ng, Jiuxi Meng, Zhiqiang Que, Xinyu Niu, Wayne Luk:
Memory-Efficient Architecture for Accelerating Generative Networks on FPGA. FPT 2018: 30-37 - [c31]Di Wu, Zhanrui Sun, Yongxin Zhu, Li Tian, Hanlin Zhu, Peng Xiong, Zihao Cao, Menglin Wang, Yu Zheng, Chao Xiong, Hao Jiang, Kuen Hung Tsoi, Xinyu Niu, Wei Mao, Can Feng, Xiaowen Zha, Guobao Deng, Wayne Luk:
Custom machine learning architectures: towards realtime anomaly detection for flight testing. IPDPS Workshops 2018: 1323-1330 - [c30]Jiajun Gao, Yongxin Zhu, Meikang Qiu, Kuen Hung Tsoi, Xinyu Niu, Wayne Luk, Ruizhe Zhao, Zhiqiang Que, Wei Mao, Can Feng, Xiaowen Zha, Guobao Deng, Jiayi Chen, Tao Liu:
Reconfigurable Hardware Generation for Tensor Flow Models of CNN Algorithms on a Heterogeneous Acceleration Platform. SmartCom 2018: 87-96 - [c29]Hanlin Zhu, Yongxin Zhu, Di Wu, Hui Wang, Li Tian, Wei Mao, Can Feng, Xiaowen Zha, Guobao Deng, Jiayi Chen, Tao Liu, Xinyu Niu, Kuen Hung Tsoi, Wayne Luk:
Correlation Coefficient Based Cluster Data Preprocessing and LSTM Prediction Model for Time Series Data in Large Aircraft Test Flights. SmartCom 2018: 376-385 - [i1]Ruizhe Zhao, Ho-Cheung Ng, Wayne Luk, Xinyu Niu:
Towards Efficient Convolutional Neural Network for Domain-Specific Applications on FPGA. CoRR abs/1809.03318 (2018) - 2017
- [j7]Francis P. Russell
, Peter D. Düben
, Xinyu Niu, Wayne Luk, Tim N. Palmer:
Exploiting the chaotic behaviour of atmospheric models with reconfigurable architectures. Comput. Phys. Commun. 221: 160-173 (2017) - [c28]Andreea-Ingrid Funie, Liucheng Guo, Xinyu Niu, Wayne Luk, Mark Salmon:
Custom Framework for Run-Time Trading Strategies. ARC 2017: 154-167 - [c27]Ruizhe Zhao, Xinyu Niu, Yajie Wu, Wayne Luk, Qiang Liu:
Optimizing CNN-Based Object Detection Algorithms on Embedded FPGA Platforms. ARC 2017: 255-267 - [c26]Paul Grigoras, Pavel Burovskiy, James Arram, Xinyu Niu, Kit Cheung, Junyi Xie, Wayne Luk:
dfesnippets: An Open-Source Library for Dataflow Acceleration on FPGAs. ARC 2017: 299-310 - [c25]Ruizhe Zhao, Tim Todman, Wayne Luk, Xinyu Niu:
DeepPump: Multi-pumping deep Neural Networks. ASAP 2017: 206 - [c24]Hongxiang Fan, Xinyu Niu, Qiang Liu, Wayne Luk:
F-C3D: FPGA-based 3-dimensional convolutional neural network. FPL 2017: 1-4 - [c23]Ruizhe Zhao, Wayne Luk, Xinyu Niu, Huifeng Shi, Haitao Wang:
Hardware Acceleration for Machine Learning. ISVLSI 2017: 645-650 - 2016
- [c22]Shaojun Wang, Xinyu Niu, Ning Ma, Wayne Luk, Philip H. W. Leong
, Yu Peng:
A Scalable Dataflow Accelerator for Real Time Onboard Hyperspectral Image Classification. ARC 2016: 105-116 - [c21]Xinyu Niu, Nicholas Ng, Tomofumi Yuki, Shaojun Wang, Nobuko Yoshida
, Wayne Luk:
EURECA compilation: Automatic optimisation of cycle-reconfigurable circuits. FPL 2016: 1-4 - [c20]Hao Zhou, Xinyu Niu, Junqi Yuan, Lingli Wang, Wayne Luk:
Connect on the fly: Enhancing and prototyping of cycle-reconfigurable modules. FPL 2016: 1-8 - [c19]Dirk Stroobandt, Ana Lucia Varbanescu, Catalin Bogdan Ciobanu
, Muhammed Al Kadi, Andreas Brokalakis, George Charitopoulos, Tim Todman, Xinyu Niu, Dionisios N. Pnevmatikatos
, Amit Kulkarni, Elias Vansteenkiste, Wayne Luk, Marco D. Santambrogio, Donatella Sciuto, Michael Hübner, Tobias Becker
, Georgi Gaydadjiev
, Antonis Nikitakis, Alex J. W. Thom:
EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures. ReCoSoC 2016: 1-7 - [p1]Xinyu Niu, Tim Todman, Wayne Luk:
Self-adaptive Hardware Acceleration on a Heterogeneous Cluster. Self-aware Computing Systems 2016: 167-192 - 2015
- [b1]Xinyu Niu:
Optimising runtime reconfigurable designs for high performance applications. Imperial College London, UK, 2015 - [j6]Dionisios N. Pnevmatikatos
, Kyprianos Papadimitriou
, Tobias Becker
, Peter Böhm, Andreas Brokalakis, Karel Bruneel, Catalin Bogdan Ciobanu
, Tom Davidson, Georgi Gaydadjiev
, Karel Heyse, Wayne Luk, Xinyu Niu, Ioannis Papaefstathiou
, Danilo Pau
, Oliver Pell, Christian Pilato
, Marco D. Santambrogio
, Donatella Sciuto
, Dirk Stroobandt, Tim Todman, Elias Vansteenkiste:
FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration. Microprocess. Microsystems 39(4-5): 321-338 (2015) - [j5]Thomas C. P. Chau, Xinyu Niu, Alison Eele, Jan M. Maciejowski, Peter Y. K. Cheung, Wayne Luk:
Mapping Adaptive Particle Filters to Heterogeneous Reconfigurable Systems. ACM Trans. Reconfigurable Technol. Syst. 7(4): 36:1-36:17 (2015) - [j4]Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu, Oliver Pell:
Automating Elimination of Idle Functions by Runtime Reconfiguration. ACM Trans. Reconfigurable Technol. Syst. 8(3): 15:1-15:28 (2015) - [j3]Qiang Liu, Terrence S. T. Mak, Tao Zhang, Xinyu Niu, Wayne Luk, Alex Yakovlev
:
Power-Adaptive Computing System Design for Solar-Energy-Powered Embedded Systems. IEEE Trans. Very Large Scale Integr. Syst. 23(8): 1402-1414 (2015) - [c18]Catalin Bogdan Ciobanu
, Ana Lucia Varbanescu, Dionisios N. Pnevmatikatos
, George Charitopoulos, Xinyu Niu, Wayne Luk, Marco D. Santambrogio, Donatella Sciuto, Muhammed Al Kadi, Michael Hübner, Tobias Becker
, Georgi Gaydadjiev
, Andreas Brokalakis, Antonis Nikitakis, Alex J. W. Thom, Elias Vansteenkiste, Dirk Stroobandt:
EXTRA: Towards an Efficient Open Platform for Reconfigurable High Performance Computing. CSE 2015: 339-342 - [c17]Francis P. Russell
, Peter D. Düben
, Xinyu Niu, Wayne Luk, Tim N. Palmer
:
Architectures and Precision Analysis for Modelling Atmospheric Variables with Chaotic Behaviour. FCCM 2015: 171-178 - [c16]Xinyu Niu, Wayne Luk, Yu Wang:
EURECA: On-Chip Configuration Generation for Effective Dynamic Data Access. FPGA 2015: 74-83 - [c15]Junyi Xie, Xinyu Niu, Andy K. S. Lau, Kevin K. Tsia
, Hayden Kwok-Hay So
:
Accelerated cell imaging and classification on FPGAs for quantitative-phase asymmetric-detection time-stretch optical microscopy. FPT 2015: 1-8 - [c14]James Stanley Targett, Xinyu Niu, Francis P. Russell, Wayne Luk, Stephen Jeffress, Peter D. Düben
:
Lower precision for higher accuracy: Precision and resolution exploration for shallow water equations. FPT 2015: 208-211 - 2014
- [j2]Xinyu Niu, Qiwei Jin, Wayne Luk, Stephen Weston:
A Self-Aware Tuning and Self-Aware Evaluation Method for Finite-Difference Applications in Reconfigurable Systems. ACM Trans. Reconfigurable Technol. Syst. 7(2): 15:1-15:19 (2014) - [c13]Andrei Bara, Xinyu Niu, Wayne Luk:
A dataflow system for anomaly detection and analysis. FPT 2014: 276-279 - [c12]Paul Grigoras, Max Tottenham, Xinyu Niu, José Gabriel F. Coutinho, Wayne Luk:
Elastic Management of Reconfigurable Accelerators. ISPA 2014: 174-181 - 2013
- [c11]Thomas C. P. Chau, Xinyu Niu, Alison Eele, Wayne Luk, Peter Y. K. Cheung, Jan M. Maciejowski:
Heterogeneous Reconfigurable System for Adaptive Particle Filters in Real-Time Applications. ARC 2013: 1-12 - [c10]Paul Grigoras, Xinyu Niu, José Gabriel F. Coutinho, Wayne Luk, Jacob A. Bower, Oliver Pell:
Aspect driven compilation for dataflow designs. ASAP 2013: 18-25 - [c9]Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu:
Automating Elimination of Idle Functions by Run-Time Reconfiguration. FCCM 2013: 97-104 - [c8]Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu:
Automating resource optimisation in reconfigurable design (abstract only). FPGA 2013: 275 - [c7]Xinyu Niu, José Gabriel F. Coutinho, Wayne Luk:
A scalable design approach for stencil computation on reconfigurable clusters. FPL 2013: 1-4 - [c6]Xinyu Niu, José Gabriel F. Coutinho, Yu Wang, Wayne Luk:
Dynamic Stencil: Effective exploitation of run-time resources in reconfigurable clusters. FPT 2013: 214-221 - [c5]Riccardo Cattaneo
, Xinyu Niu, Christian Pilato
, Tobias Becker
, Wayne Luk, Marco D. Santambrogio
:
A framework for effective exploitation of partial reconfiguration in dataflow computing. ReCoSoC 2013: 1-8 - 2012
- [j1]Nicholas Ng, Nobuko Yoshida
, Xinyu Niu, Kuen Hung Tsoi:
Session types: towards safe and fast reconfigurable programming. SIGARCH Comput. Archit. News 40(5): 22-27 (2012) - [c4]Kyprianos Papadimitriou
, Christian Pilato
, Dionisios N. Pnevmatikatos
, Marco D. Santambrogio
, Catalin Bogdan Ciobanu
, Tim Todman, Tobias Becker
, Tom Davidson, Xinyu Niu, Georgi Gaydadjiev
, Wayne Luk, Dirk Stroobandt:
Novel Design Methods and a Tool Flow for Unleashing Dynamic Reconfiguration. CSE 2012: 391-398 - [c3]Xinyu Niu, Qiwei Jin, Wayne Luk, Qiang Liu, Oliver Pell:
Exploiting run-time reconfiguration in stencil computation. FPL 2012: 173-180 - [c2]Xinyu Niu, Kuen Hung Tsoi, Wayne Luk:
Self-Adaptive Heterogeneous Cluster with Wireless Network. IPDPS Workshops 2012: 306-311 - 2011
- [c1]Xinyu Niu, Kuen Hung Tsoi, Wayne Luk:
Reconfiguring Distributed Applications in FPGA Accelerated Cluster with Wireless Networking. FPL 2011: 545-550
Coauthor Index

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