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Ujjwal Guin
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2020 – today
- 2024
- [c31]Gaines Odom
, Hardhik Mohanty
, Ujjwal Guin
, Bhaskar Krishnamachari
:
Blockchain-Enabled Whitelisting Mechanisms for Enhancing Security in 3D ICs. ACM Great Lakes Symposium on VLSI 2024: 483-488 - [c30]Gaines Odom
, Zakia Tamanna Tisha, Ujjwal Guin:
A Novel Self-referencing Approach Using Memory Power-up States for Detecting COTS SRAMs. VTS 2024: 1-7 - 2023
- [j25]Yadi Zhong
, Ujjwal Guin
:
A Comprehensive Test Pattern Generation Approach Exploiting the SAT Attack for Logic Locking. IEEE Trans. Computers 72(8): 2293-2305 (2023) - [j24]Yadi Zhong
, Ujjwal Guin
:
Complexity Analysis of the SAT Attack on Logic Locking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(10): 3143-3156 (2023) - [c29]Yadi Zhong
, Joshua Hovanes
, Ujjwal Guin
:
On-Demand Device Authentication using Zero-Knowledge Proofs for Smart Systems. ACM Great Lakes Symposium on VLSI 2023: 569-574 - 2022
- [j23]Benjamin J. Lucas, Ali Alwan, Marion Murzello, Yazheng Tu, Pengzhou He
, Andrew J. Schwartz
, David Guevara, Ujjwal Guin
, Kyle Juretus
, Jiafeng Xie
:
Lightweight Hardware Implementation of Binary Ring-LWE PQC Accelerator. IEEE Comput. Archit. Lett. 21(1): 17-20 (2022) - [j22]Wendong Wang
, Adit D. Singh, Ujjwal Guin:
A Systematic Bit Selection Method for Robust SRAM PUFs. J. Electron. Test. 38(3): 235-246 (2022) - [j21]Yadi Zhong
, Ayush Jain, M. Tanjidur Rahman, Navid Asadizanjani, Jiafeng Xie, Ujjwal Guin
:
AFIA: ATPG-Guided Fault Injection Attack on Secure Logic Locking. J. Electron. Test. 38(5): 527-546 (2022) - [j20]Mehdi Sadi
, Ujjwal Guin
:
Test and Yield Loss Reduction of AI and Deep Learning Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(1): 104-115 (2022) - [c28]Yuqiao Zhang, Chunli Tang, Peng Li, Ujjwal Guin:
CamSkyGate: camouflaged skyrmion gates for protecting ICs. DAC 2022: 757-762 - [c27]Yadi Zhong, Ujjwal Guin:
Fault-Injection Based Chosen-Plaintext Attacks on Multicycle AES Implementations. ACM Great Lakes Symposium on VLSI 2022: 443-448 - [c26]Yadi Zhong, Ujjwal Guin:
Chosen-Plaintext Attack on Energy-Efficient Hardware Implementation of GIFT-COFB. HOST 2022: 73-76 - [c25]Ziqi Zhou, Ujjwal Guin, Peng Li, Vishwani D. Agrawal:
Fault Modeling and Test Generation for Technology-Specific Defects of Skyrmion Logic Circuits. VTS 2022: 1-7 - [i11]Yadi Zhong, Ujjwal Guin:
A Comprehensive Test Pattern Generation Approach Exploiting SAT Attack for Logic Locking. CoRR abs/2204.11307 (2022) - [i10]Yadi Zhong, Ujjwal Guin:
AFIA: ATPG-Guided Fault Injection Attack on Secure Logic Locking. CoRR abs/2206.04754 (2022) - [i9]Yadi Zhong, Ujjwal Guin:
Complexity Analysis of the SAT Attack on Logic Locking. CoRR abs/2207.01808 (2022) - [i8]Joshua Hovanes, Yadi Zhong, Ujjwal Guin:
Beware of Discarding Used SRAMs: Information is Stored Permanently. CoRR abs/2208.02883 (2022) - 2021
- [j19]Pengzhou He
, Ujjwal Guin
, Jiafeng Xie
:
Novel Low-Complexity Polynomial Multiplication Over Hybrid Fields for Efficient Implementation of Binary Ring-LWE Post-Quantum Cryptography. IEEE J. Emerg. Sel. Topics Circuits Syst. 11(2): 383-394 (2021) - [j18]Prattay Chowdhury, Ujjwal Guin
, Adit D. Singh, Vishwani D. Agrawal:
Estimating Operational Age of an Integrated Circuit. J. Electron. Test. 37(1): 25-40 (2021) - [j17]Yuqiao Zhang, Ayush Jain, Pinchen Cui, Ziqi Zhou, Ujjwal Guin:
A novel topology-guided attack and its countermeasure towards secure logic locking. J. Cryptogr. Eng. 11(3): 213-226 (2021) - [j16]Ayush Jain, Ziqi Zhou, Ujjwal Guin:
TAAL: Tampering Attack on Any Key-based Logic Locked Circuits. ACM Trans. Design Autom. Electr. Syst. 26(4): 28:1-28:22 (2021) - [c24]Pratiksha Mittal, Austin Walthall, Pinchen Cui, Anthony Skjellum, Ujjwal Guin:
A Blockchain-based Contactless Delivery System for Addressing COVID-19 and Other Pandemics. Blockchain 2021: 1-6 - [c23]Ayush Jain, Ziqi Zhou, Ujjwal Guin:
Survey of Recent Developments for Hardware Trojan Detection. ISCAS 2021: 1-5 - [c22]Shamik Kundu, Kanad Basu, Mehdi Sadi
, Twisha Titirsha, Shihao Song, Anup Das
, Ujjwal Guin:
Special Session: Reliability Analysis for AI/ML Hardware. VTS 2021: 1-10 - [c21]Ziqi Zhou, Ujjwal Guin, Peng Li, Vishwani D. Agrawal:
Defect Characterization and Testing of Skyrmion-Based Logic Circuits. VTS 2021: 1-7 - [i7]Shamik Kundu, Kanad Basu, Mehdi Sadi, Twisha Titirsha, Shihao Song, Anup Das, Ujjwal Guin:
Special Session: Reliability Analysis for ML/AI Hardware. CoRR abs/2103.12166 (2021) - 2020
- [j15]Md Jubayer al Mahmod, Ujjwal Guin:
A Robust, Low-Cost and Secure Authentication Scheme for IoT Applications. Cryptogr. 4(1): 8 (2020) - [j14]Wendong Wang
, Ujjwal Guin, Adit D. Singh:
Aging-Resilient SRAM-based True Random Number Generator for Lightweight Devices. J. Electron. Test. 36(3): 301-311 (2020) - [j13]Yuqiao Zhang, Ujjwal Guin
:
End-to-End Traceability of ICs in Component Supply Chain for Fighting Against Recycling. IEEE Trans. Inf. Forensics Secur. 15: 767-775 (2020) - [c20]Ayush Jain, Ujjwal Guin:
A Novel Tampering Attack on AES Cores with Hardware Trojans. ITC-Asia 2020: 77-82 - [c19]Ayush Jain, Ujjwal Guin, M. Tanjidur Rahman, Navid Asadizanjani, Danielle Duvalsaint, R. D. Shawn Blanton:
Special Session: Novel Attacks on Logic-Locking. VTS 2020: 1-10 - [c18]Wendong Wang, Ujjwal Guin, Adit D. Singh:
A Zero-Cost Detection Approach for Recycled ICs using Scan Architecture. VTS 2020: 1-6 - [c17]Jiafeng Xie, Kanad Basu, Kris Gaj, Ujjwal Guin:
Special Session: The Recent Advance in Hardware Implementation of Post-Quantum Cryptography. VTS 2020: 1-10 - [i6]Mehdi Sadi, Ujjwal Guin:
Yield Loss Reduction and Test of AI and Deep Learning Accelerators. CoRR abs/2006.04798 (2020) - [i5]Yuqiao Zhang, Ayush Jain, Pinchen Cui, Ziqi Zhou, Ujjwal Guin:
A Novel Topology-Guided Attack and Its Countermeasure Towards Secure Logic Locking. CoRR abs/2006.05930 (2020) - [i4]Benjamin Tan
, Ramesh Karri, Nimisha Limaye, Abhrajit Sengupta, Ozgur Sinanoglu, Md. Moshiur Rahman, Swarup Bhunia, Danielle Duvalsaint, Ronald D. Blanton, Amin Rezaei, Yuanqi Shen, Hai Zhou, Leon Li, Alex Orailoglu, Zhaokun Han, Austin Benedetti, Luciano Brignone, Muhammad Yasin, Jeyavijayan Rajendran, Michael Zuzak, Ankur Srivastava, Ujjwal Guin, Chandan Karfa, Kanad Basu, Vivek V. Menon, Matthew French, Peilin Song, Franco Stellari, Gi-Joon Nam, Peter Gadfort, Alric Althoff, Joseph Tostenrude, Saverio Fazzari, Eric Breckenfeld, Kenneth Plaks:
Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking. CoRR abs/2006.06806 (2020) - [i3]Ayush Jain, M. Tanjidur Rahman, Ujjwal Guin:
ATPG-Guided Fault Injection Attacks on Logic Locking. CoRR abs/2007.10512 (2020) - [i2]Ayush Jain, Ujjwal Guin:
A Novel Tampering Attack on AES Cores with Hardware Trojans. CoRR abs/2008.03290 (2020)
2010 – 2019
- 2019
- [j12]Pinchen Cui
, Julie Dixon, Ujjwal Guin, Daniel DiMase:
A Blockchain-Based Framework for Supply Chain Provenance. IEEE Access 7: 157113-157125 (2019) - [j11]Benjamin Cyr
, Jubayer Mahmod
, Ujjwal Guin
:
Low-Cost and Secure Firmware Obfuscation Method for Protecting Electronic Systems From Cloning. IEEE Internet Things J. 6(2): 3700-3711 (2019) - [j10]Pinchen Cui
, Ujjwal Guin, Anthony Skjellum, David A. Umphress:
Blockchain in IoT: Current Trends, Challenges, and Future Roadmap. J. Hardw. Syst. Secur. 3(4): 338-364 (2019) - [j9]Ujjwal Guin, Navid Asadizanjani, Mark M. Tehranipoor:
Standards for Hardware Security. GetMobile Mob. Comput. Commun. 23(1): 5-9 (2019) - [c16]Yuqiao Zhang, Pinchen Cui, Ziqi Zhou, Ujjwal Guin:
TGA: An Oracle-less and Topology-Guided Attack on Logic Locking. ASHES@CCS 2019: 75-83 - [c15]Ujjwal Guin, Wendong Wang, Charles Harper, Adit D. Singh:
Detecting Recycled SoCs by Exploiting Aging Induced Biases in Memory Cells. HOST 2019: 72-80 - [c14]Pinchen Cui, Ujjwal Guin:
Countering Botnet of Things using Blockchain-Based Authenticity Framework. ISVLSI 2019: 598-603 - [c13]Prattay Chowdhury, Ujjwal Guin, Adit D. Singh, Vishwani D. Agrawal:
Two-Pattern ∆IDDQ Test for Recycled IC Detection. VLSID 2019: 82-87 - [c12]Jubayer Mahmod, Spencer K. Millican, Ujjwal Guin, Vishwani D. Agrawal:
Special Session: Delay Fault Testing - Present and Future. VTS 2019: 1-10 - [i1]Ayush Jain, Ziqi Zhou, Ujjwal Guin:
TAAL: Tampering Attack on Any Key-based Logic Locked Circuits. CoRR abs/1909.07426 (2019) - 2018
- [j8]Ujjwal Guin
, Ziqi Zhou, Adit D. Singh:
Robust Design-for-Security Architecture for Enabling Trust in IC Manufacturing and Test. IEEE Trans. Very Large Scale Integr. Syst. 26(5): 818-830 (2018) - [c11]Mahabubul Alam, Sreeja Chowdhury, Mark M. Tehranipoor, Ujjwal Guin:
Robust, low-cost, and accurate detection of recycled ICs using digital signatures. HOST 2018: 209-214 - [c10]Ujjwal Guin, Pinchen Cui, Anthony Skjellum:
Ensuring Proof-of-Authenticity of IoT Edge Devices Using Blockchain Technology. iThings/GreenCom/CPSCom/SmartData 2018: 1042-1049 - [c9]Wendong Wang, Adit D. Singh, Ujjwal Guin, Abhijit Chatterjee:
Exploiting power supply ramp rate for calibrating cell strength in SRAM PUFs. LATS 2018: 1-6 - [c8]Ujjwal Guin, Adit D. Singh, Mahabubul Alam, Janice Canedo, Anthony Skjellum:
A Secure Low-Cost Edge Device Authentication Scheme for the Internet of Things. VLSID 2018: 85-90 - [c7]Ziqi Zhou, Ujjwal Guin, Vishwani D. Agrawal:
Modeling and test generation for combinational hardware Trojans. VTS 2018: 1-6 - 2017
- [j7]Mahabubul Alam, Mark M. Tehranipoor, Ujjwal Guin
:
TSensors Vision, Infrastructure and Security Challenges in Trillion Sensor Era. J. Hardw. Syst. Secur. 1(4): 311-327 (2017) - [j6]Ujjwal Guin
, Swarup Bhunia
, Domenic Forte
, Mark M. Tehranipoor:
SMA: A System-Level Mutual Authentication for Protecting Electronic Hardware and Firmware. IEEE Trans. Dependable Secur. Comput. 14(3): 265-278 (2017) - [c6]Ujjwal Guin, Ziqi Zhou, Adit D. Singh:
A novel design-for-security (DFS) architecture to prevent unauthorized IC overproduction. VTS 2017: 1-6 - 2016
- [j5]Ujjwal Guin, Qihang Shi, Domenic Forte
, Mark M. Tehranipoor:
FORTIS: A Comprehensive Solution for Establishing Forward Trust for Protecting IPs and ICs. ACM Trans. Design Autom. Electr. Syst. 21(4): 63:1-63:20 (2016) - [j4]Ujjwal Guin
, Domenic Forte
, Mark M. Tehranipoor:
Design of Accurate Low-Cost On-Chip Structures for Protecting Integrated Circuits Against Recycling. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1233-1246 (2016) - 2015
- [c5]Bicky Shakya, Ujjwal Guin, Mark M. Tehranipoor, Domenic Forte
:
Performance optimization for on-chip sensors to detect recycled ICs. ICCD 2015: 289-295 - 2014
- [j3]Ujjwal Guin, Daniel DiMase, Mohammad Tehranipoor:
Counterfeit Integrated Circuits: Detection, Avoidance, and the Challenges Ahead. J. Electron. Test. 30(1): 9-23 (2014) - [j2]Ujjwal Guin, Daniel DiMase, Mohammad Tehranipoor:
A Comprehensive Framework for Counterfeit Defect Coverage Analysis and Detection Assessment. J. Electron. Test. 30(1): 25-40 (2014) - [j1]Ujjwal Guin, Ke Huang, Daniel DiMase, John M. Carulli, Mohammad Tehranipoor, Yiorgos Makris
:
Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain. Proc. IEEE 102(8): 1207-1228 (2014) - [c4]Ujjwal Guin, Xuehui Zhang, Domenic Forte
, Mohammad Tehranipoor:
Low-cost On-Chip Structures for Combating Die and IC Recycling. DAC 2014: 87:1-87:6 - 2013
- [c3]Ujjwal Guin, Tapan J. Chakraborty, Mohammad Tehranipoor:
Functional Fmax test-time reduction using novel DFTs for circuit initialization. ICCD 2013: 1-6 - [c2]Ujjwal Guin, Domenic Forte
, Mohammad Tehranipoor:
Anti-counterfeit Techniques: From Design to Resign. MTV 2013: 89-94 - 2011
- [c1]Ujjwal Guin, Chen-Huan Chiang:
Design for Bit Error Rate estimation of high speed serial links. VTS 2011: 278-283
Coauthor Index
aka: Mohammad Tehranipoor
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