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"Low-Latency Double Point Multiplication Architecture Using Differential ..."

Taha Shahroodi, Siavash Bayat Sarmadi, Hatameh Mosanaei-Boorani (2019)

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DOI: 10.1109/TCSI.2018.2883557

access: closed

type: Journal Article

metadata version: 2020-05-22

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  - https://dblp.org/rec/journals/tcas/ShahroodiSM19
Taha Shahroodi, Siavash Bayat Sarmadi, Hatameh Mosanaei-Boorani:
Low-Latency Double Point Multiplication Architecture Using Differential Addition Chain Over $GF(2^m)$. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(4): 1465-1473 (2019)

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