![](https://dblp1.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp1.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp1.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
default search action
Neeta Pandey
Person information
Refine list
![note](https://dblp1.uni-trier.de/img/note-mark.dark.12x12.png)
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2024
- [j51]Lokesh Soni
, Neeta Pandey
:
A low power Schmitt-trigger driven 10T SRAM Cell for high speed applications. Integr. 97: 102187 (2024) - 2023
- [j50]Shikha, Neeta Pandey, Kirti Gupta
:
Memristor-Based Architectures for PFSCL Circuit Realizations. Circuits Syst. Signal Process. 42(8): 4985-5012 (2023) - [j49]Navnit Kumar, Manjeet Kumar
, Neeta Pandey:
Electronically tunable positive and negative fractional order inductor circuit using single topology. Integr. 88: 379-389 (2023) - [j48]Navnit Kumar, Manjeet Kumar
, Neeta Pandey:
CCTA based four different pairs of mutually coupled circuit using single topology. Integr. 91: 43-53 (2023) - [j47]Neetika Yadav, Neeta Pandey
, Deva Nand:
Modified Dual Mode Transmission Gate Diffusion Input Logic for Improving Energy Efficiency. J. Circuits Syst. Comput. 32(10): 2350171:1-2350171:21 (2023) - [j46]Kriti Suneja, Neeta Pandey
, Rajeshwari Pandey:
A Novel Chaotic System with Exponential Nonlinearity and its Adaptive Self-Synchronization: From Numerical Simulations to Circuit Implementation. J. Circuits Syst. Comput. 32(17): 2350296:1-2350296:23 (2023) - [j45]Damyanti Singh
, Neeta Pandey, Kirti Gupta
:
Process invariant Schmitt Trigger non-volatile 13T1M SRAM cell. Microelectron. J. 135: 105773 (2023) - [j44]Sumedha Gupta
, Neeta Pandey, R. S. Gupta:
Modeling of Dual- Metal Junctionless Accumulation-Mode cylindrical surrounding gate (DM-JAM-CSG) MOSFET for cryogenic temperature applications. Microelectron. J. 139: 105880 (2023) - [j43]Ishu Tomar
, Indu Sreedevi, Neeta Pandey:
PLC and SCADA based Real Time Monitoring and Train Control System for the Metro Railways Infrastructure. Wirel. Pers. Commun. 129(1): 521-548 (2023) - [j42]Neetika Yadav, Neeta Pandey, Deva Nand
:
LDML: A Proposal to Reduce Leakage Power in DML Circuits. Wirel. Pers. Commun. 129(2): 1009-1024 (2023) - [c14]Om Krishna Gupta, Neeta Pandey, Maneesha Gupta
:
Refining RNMC compensation for Three Stage Amplifier using DTMOS Transistor and FFVF. ICCCNT 2023: 1-4 - 2022
- [j41]Monika Bhardwaj, Sujata Pandey, Neeta Pandey:
A novel design of a 1 GHz phase locked loop with improved lock time for fast frequency acquisition. Int. J. Comput. Aided Eng. Technol. 17(2): 192-207 (2022) - [j40]Kriti Suneja, Neeta Pandey, Rajeshwari Pandey:
Novel Pehlivan-Uyarŏglu Chaotic System Variants and their CFOA Based Realization. J. Circuits Syst. Comput. 31(9): 2250171:1-2250171:25 (2022) - [j39]Ranjana Sivaram, Kirti Gupta, Neeta Pandey
:
On improving the performance of dynamic positive-feedback source-coupled logic (D-PFSCL) through inclusion of transmission gates. Microprocess. Microsystems 90: 104521 (2022) - [j38]Damyanti Singh
, Kirti Gupta, Neeta Pandey
:
A novel read decoupled 8T1M nvSRAM cell for near threshold operation. Microelectron. J. 126: 105496 (2022) - [c13]Garima Varshney, Neeta Pandey, Rajeshwari Pandey:
OTA Based Fractional-Order Oscillator With Controlled Phase Difference. ISCAS 2022: 3478-3482 - 2021
- [j37]Monica Gupta
, Kirti Gupta, Neeta Pandey
:
A data-independent 9T SRAM cell with enhanced ION/IOFF ratio and RBL voltage swing in near threshold and sub-threshold region. Int. J. Circuit Theory Appl. 49(4): 953-969 (2021) - [j36]Garima Varshney
, Neeta Pandey
, Rajeshwari Pandey
:
Generalization of shadow filters in fractional domain. Int. J. Circuit Theory Appl. 49(10): 3248-3265 (2021) - [j35]Monica Gupta
, Kirti Gupta, Neeta Pandey
:
A novel PVT-variation-tolerant Schmitt-trigger-based 12T SRAM cell with improved write ability and high ION/IOFF ratio in sub-threshold region. Int. J. Circuit Theory Appl. 49(11): 3789-3810 (2021) - [j34]Neetika Yadav, Neeta Pandey, Deva Nand:
Leakage reduction in dual mode logic through gated leakage transistors. Microprocess. Microsystems 84: 104269 (2021) - [j33]Monica Gupta
, Kirti Gupta, Neeta Pandey
:
Comparative Analysis of the Design Techniques for Low Leakage SRAMs at 32nm. Microprocess. Microsystems 85: 104281 (2021) - [j32]R. Arundeepakvel, Jatin
, Parth Khatter, Neeta Pandey
, Shahram Minaei
:
A novel design for voltage inverting metamutator and its applications. Microelectron. J. 113: 105096 (2021) - [j31]Aditya S. Kumar, Sagar Jain, Neeta Pandey
:
Clock Aligned Input Adiabatic Logic. Microelectron. J. 114: 105122 (2021) - [j30]Navnit Kumar, Manjeet Kumar
, Neeta Pandey
:
Unified floating immittance emulator based on CCTA. Microelectron. J. 118: 105289 (2021) - 2020
- [b1]Kirti Gupta, Neeta Pandey, Maneesha Gupta
:
Model and Design of Improved Current Mode Logic Gates - Differential and Single-ended. Springer 2020, ISBN 978-981-15-0981-0, pp. 1-171 - [j29]Ranjana Sivaram, Kirti Gupta, Neeta Pandey:
A new realization scheme for dynamic PFSCL style. Integr. 75: 169-177 (2020) - [j28]Prakhar Sharma, Shourya Gupta, Kirti Gupta, Neeta Pandey:
A low power subthreshold Schmitt Trigger based 12T SRAM bit cell with process-variation-tolerant write-ability. Microelectron. J. 97: 104703 (2020)
2010 – 2019
- 2019
- [j27]Manoj Kumar Tiwari, Neeta Pandey, Sajal K. Paul, Saiyid Mohammad Irshad Rizvi:
Programmable CCCII: reliability analysis and design methodology. IET Circuits Devices Syst. 13(4): 487-493 (2019) - [j26]Gurumurthy Komanapalli
, Rajeshwari Pandey
, Neeta Pandey:
New sinusoidal oscillator configurations using operational transresistance amplifier. Int. J. Circuit Theory Appl. 47(5): 666-685 (2019) - [j25]Praveen Kumar, Neeta Pandey
, Sajal K. Paul:
Realization of Resistorless and Electronically Tunable Inverse Filters Using VDTA. J. Circuits Syst. Comput. 28(9): 1950143:1-1950143:20 (2019) - [j24]Shourya Gupta
, Kirti Gupta, Benton H. Calhoun, Neeta Pandey
:
Low-Power Near-Threshold 10T SRAM Bit Cells With Enhanced Data-Independent Read Port Leakage for Array Augmentation in 32-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(3): 978-988 (2019) - [j23]Gurumurthy Komanapalli
, Rajeshwari Pandey, Neeta Pandey:
Operational Transresistance Amplifier Based Wienbridge Oscillator and Its Harmonic Analysis. Wirel. Pers. Commun. 108(1): 1-17 (2019) - [c12]Pranav Gangwar, Neeta Pandey, Rajeshwari Pandey:
Novel Control Unit Design for a High-Speed SHA-3 Architecture. MWSCAS 2019: 904-907 - [c11]Pranav Gangwar, Satvik Maurya, Shubham Garg, Sakshi Goyal, Aditya S. Kumar, Preyesh Dalmia, Neeta Pandey:
Hardware/Software Co-Design of a High-Speed Othello Solver. MWSCAS 2019: 1223-1226 - 2018
- [j22]Shourya Gupta
, Kirti Gupta, Neeta Pandey
:
Pentavariate Vmin Analysis of a Subthreshold 10T SRAM Bit Cell With Variation Tolerant Write and Divided Bit-Line Read. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3326-3337 (2018) - [c10]Rajeshwari Pandey, Neeta Pandey:
OTRA Based Log and Antilog Amplifiers. MWSCAS 2018: 182-185 - [c9]Neeta Pandey, Kirti Gupta, Bharat Choudhary
:
MCML Dynamic Register Design. MWSCAS 2018: 582-586 - [c8]Veepsa Bhatia, Neeta Pandey, Sri Ranjani Prasanthi:
Design of an SCL logic based Current Comparator. MWSCAS 2018: 1134-1137 - [c7]Preyesh Dalmia, Vikas, Abhinav Parashar, Akshi Tomar, Neeta Pandey:
Novel High Speed Vedic Multiplier Proposal Incorporating Adder Based on Quaternary Signed Digit Number System. VLSID 2018: 289-294 - 2017
- [j21]Neeta Pandey, Bharat Choudhary
, Kirti Gupta, Ankit Mittal:
New Sleep-Based PFSCL Tri-State Inverter/Buffer Topologies. J. Circuits Syst. Comput. 26(12): 1750186:1-1750186:15 (2017) - [j20]Pratibha Bajpai, Neeta Pandey
, Kirti Gupta
, Shrey Bagga
, Jeebananda Panda
:
On Improving the Performance of Dynamic DCVSL Circuits. J. Electr. Comput. Eng. 2017: 8207104:1-8207104:11 (2017) - [j19]Veepsa Bhatia
, Neeta Pandey
:
Modified Tang and Pun's Current Comparator and Its Application to Full Flash and Two-Step Flash Current Mode ADCs. J. Electr. Comput. Eng. 2017: 8245181:1-8245181:12 (2017) - [j18]Shourya Gupta
, Kirti Gupta, Neeta Pandey:
A 32-nm Subthreshold 7T SRAM Bit Cell With Read Assist. IEEE Trans. Very Large Scale Integr. Syst. 25(12): 3473-3483 (2017) - [c6]Naman Saxena
, Shruti Dutta
, Neeta Pandey
, Kirti Gupta
:
Implementation and Performance Comparison of a Four-Bit Ripple-Carry Adder Using Different MOS Current Mode Logic Topologies. ICCSA (6) 2017: 299-313 - 2016
- [j17]Neeta Pandey, Deva Nand, Rajeshwari Pandey:
Generalised operational floating current conveyor based instrumentation amplifier. IET Circuits Devices Syst. 10(3): 209-219 (2016) - [j16]Neeta Pandey, Kirti Gupta, Garima Bhatia, Bharat Choudhary
:
MOS current mode logic exclusive-OR gate using multi-threshold triple-tail cells. Microelectron. J. 57: 13-20 (2016) - [j15]Neeta Pandey
, Kirti Gupta
, Bharat Choudhary
:
New Proposal for MCML Based Three-Input Logic Implementation. VLSI Design 2016: 8712768:1-8712768:10 (2016) - [c5]Shobhit Kareer, Anchit Kumar, Kirti Gupta, Neeta Pandey:
A Novel Bulk Drain Connected 6T SRAM Cell. ICACDS 2016: 232-242 - [c4]Veepsa Bhatia, Neeta Pandey:
A Novel Ultra Low Power Current Comparator. ICACDS 2016: 423-432 - [c3]Divyesh Sachan, Deva Nand, Neeta Pandey:
Universal biquadratic filter using Operational Floating Current Conveyor (OFCC). ICM 2016: 317-320 - 2015
- [j14]Neeta Pandey, Rajeshwari Pandey:
Approach for third order quadrature oscillator realisation. IET Circuits Devices Syst. 9(3): 161-171 (2015) - 2014
- [j13]Rajeshwari Pandey, Neeta Pandey, Sajal K. Paul, Ajay Singh, B. Sriram, Kaushlendra Trivedi:
Novel grounded inductance simulator using single OTRA. Int. J. Circuit Theory Appl. 42(10): 1069-1079 (2014) - [j12]Neeta Pandey, Kirti Gupta
, Maneesha Gupta
:
An efficient triple-tail cell based PFSCL D latch. Microelectron. J. 45(8): 1001-1007 (2014) - 2013
- [j11]Neeta Pandey, Sajal K. Paul:
Mixed Mode Universal filter. J. Circuits Syst. Comput. 22(1) (2013) - [j10]Kirti Gupta, Neeta Pandey, Maneesha Gupta
:
Analysis and design of MOS current mode logic exclusive-OR gate using triple-tail cells. Microelectron. J. 44(6): 561-567 (2013) - 2012
- [c2]Veepsa Bhatia, Neeta Pandey, Asok Bhattacharyya:
An expandable current-mode ADC with power optimization technique. RAIT 2012: 765-770 - 2011
- [j9]Neeta Pandey, Rishik Bazaz, Rahul Manocha:
MO-CCCCTA-Based Floating Positive and Negative Inductors and Their Applications. J. Electr. Comput. Eng. 2011: 150354:1-150354:8 (2011) - [j8]Rajeshwari Pandey, Neeta Pandey, Sajal K. Paul, Aditya Singh, B. Sriram, Kaushalendra Trivedi:
New Topologies of Lossless Grounded Inductor Using OTRA. J. Electr. Comput. Eng. 2011: 175130:1-175130:6 (2011) - [j7]Neeta Pandey, Sajal K. Paul:
Differential Difference Current Conveyor Transconductance Amplifier: A New Analog Building Block for Signal Processing. J. Electr. Comput. Eng. 2011: 361384:1-361384:10 (2011) - [j6]Rajeshwari Pandey, Neeta Pandey, Mayank Bothra, Sajal K. Paul:
Operational Transresistance Amplifier-Based Multiphase Sinusoidal Oscillators. J. Electr. Comput. Eng. 2011: 586853:1-586853:8 (2011) - [j5]Kirti Gupta, Ranjana Sridhar, Jaya Chaudhary, Neeta Pandey, Maneesha Gupta
:
New Low-Power Tristate Circuits in Positive Feedback Source-Coupled Logic. J. Electr. Comput. Eng. 2011: 670508:1-670508:6 (2011) - [j4]Neeta Pandey, Sajal K. Paul:
Single CDTA-Based Current Mode All-Pass Filter and Its Applications. J. Electr. Comput. Eng. 2011: 897631:1-897631:5 (2011) - 2010
- [j3]Neeta Pandey, Sajal K. Paul:
SIMO Transadmittance Mode Active-C Universal Filter. Circuits Syst. 1(2): 54-58 (2010)
2000 – 2009
- 2006
- [j2]Neeta Pandey, Sajal K. Paul, Asok Bhattacharyya, S. B. Jain:
A new mixed mode biquad using reduced number of active and passive elements. IEICE Electron. Express 3(6): 115-121 (2006) - 2005
- [j1]Neeta Pandey, Sajal K. Paul, Asok Bhattacharyya, S. B. Jain:
A novel current controlled current mode universal filter: SITO approach. IEICE Electron. Express 2(17): 451-457 (2005) - [c1]Neeta Pandey, Sajal K. Paul, Asok Bhattacharyya:
An insensitive current mode universal biquad: multi-input multi-output. ISCAS (4) 2005: 3299-3302
Coauthor Index
![](https://dblp1.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-07-20 21:24 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint