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Benjamín T. Reyes
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2020 – today
- 2024
- [c18]F. Ahmad, A. Mellati, A. Fernandez, A. Iyer, A. Fan, Benjamín T. Reyes, Cindra Abidin, Claudio Nani, D. Albano, Fredy Solis, Gabriele Minoia, Geoff Hatcher, Hugo S. Carrer, K. Kota, L. Wang, M. Bachu, Marco Garampazzi, M. Hassanpourghadi, N. Fan, P. Prabha, R. L. Nguyen, S. Ho, T. Dusatko, T. Wu, W. Elsharkasy, Z. Sun, S. Jantzi, L. Tse:
18.3 An 8b 160GS/s 57GHz Bandwidth Time-Interleaved DAC and Driver-Based Transmitter with Adaptive Calibration for 800Gb/s Coherent Optical Applications in 5nm. ISSCC 2024: 342-344 - [c17]R. L. Nguyen, A. Mellati, A. Fernandez, A. Iyer, A. Fan, Benjamín T. Reyes, Cindra Abidin, Claudio Nani, D. Albano, F. Ahmad, Fredy Solis, Gabriele Minoia, Geoff Hatcher, M. Bachu, Marco Garampazzi, Mohsen Hassanpourghadi, N. Fan, P. Prabha, S. Fan, S. Ho, T. Dusatko, Tzu-Fan Wu, W. Elsharkasy, Z. Sun, S. Jantzi, L. Tse:
18.4 A 200GS/s 8b 20fJ/c-s Receiver with >60GHz AFE Bandwidth for 800Gb/s Optical Coherent Communications in 5nm FinFET. ISSCC 2024: 344-346 - [c16]Fabio Giunco, Marco Sosio, Claudio Nani, Ivan Fabiano, T. Lovitt, Victor Karam, D. Albano, C. Asero, Nicola Codega, Marco Garampazzi, Nicola Ghittori, D. Herbas, S. Ho, Enrico Monaco, Benjamín T. Reyes, P. Rossi, E. Temporiti, P. Pascale, Fernando De Bernardinis, S. Scouten, S. Jantzi:
A 800Gb/s Transceiver for PAM-4 Optical Direct-Detection Applications in 5nm FinFet Process. VLSI Technology and Circuits 2024: 1-2 - 2023
- [j8]Agustin C. Galetto, Juan I. Bonetti, Benjamín T. Reyes, Damián A. Morero, Mario R. Hueda:
Digital Background Compensation of Analog Impairments in Jointly Frequency-Time Interleaved DACs. IEEE Access 11: 96143-96157 (2023) - [j7]Leandro Passetti, Damián A. Morero, Benjamín T. Reyes, Mario R. Hueda:
Adaptive Digital Compensation of Analog Impairments in Frequency Interleaved ADC for Next-Generation High-Speed Communication Receivers. IEEE Access 11: 124855-124868 (2023) - [c15]Leandro Passetti, Benjamín T. Reyes, Damián A. Morero, Mario R. Hueda:
Evaluation of the Performance Impact of Clock Jitter and Phase Noise in a Two-Band Frequency-Interleaved ADC. ICECS 2023: 1-4 - 2022
- [j6]Fredy Solis, Benjamín T. Reyes, Damián A. Morero, Mario R. Hueda:
Error-Backpropagation-Based Background Calibration of TI-ADC for Adaptively Equalized Digital Communication Receivers. IEEE Access 10: 103013-103027 (2022) - [c14]Agustin C. Galetto, Benjamín T. Reyes, Damián A. Morero, Mario R. Hueda:
Backpropagation Based Background Compensation of TI-DAC Errors in High-Speed Transmitters. MWSCAS 2022: 1-4 - [c13]James Kunst, Juan I. Bonetti, Benjamín T. Reyes, Damián A. Morero, Mario R. Hueda:
Reduced Complexity Adaptive Background Compensation of Electro-Optic Tx Impairments in Coherent Optical Transceivers. OFC 2022: 1-3 - 2021
- [j5]Agustin C. Galetto, Benjamín T. Reyes, Damián A. Morero, Mario R. Hueda:
Adaptive Background Compensation of Frequency Interleaved DACs With Application to Coherent Optical Transceivers. IEEE Access 9: 41821-41832 (2021) - [j4]Fredy Solis, Álvaro Fernandez Bocco, Agustin C. Galetto, Leandro Passetti, Mario R. Hueda, Benjamín T. Reyes:
A 4GS/s 8-bit time-interleaved SAR ADC with an energy-efficient architecture in 130 nm CMOS. Int. J. Circuit Theory Appl. 49(10): 3171-3185 (2021) - [c12]Leandro Passetti, Benjamín T. Reyes, Damián A. Morero, Mario R. Hueda:
Reduced Complexity Backpropagation-Based Adaptive Compensation of Frequency Interleaved ADC for Digital Communication Receivers. ISCAS 2021: 1-5 - [c11]Fredy Solis, Damián A. Morero, Mario R. Hueda, Benjamín T. Reyes:
Experimental Evaluation of Backpropagation-Based Background Compensation of TI-ADC with Application to Digital Communication Receivers. ISCAS 2021: 1-5 - [c10]R. L. Nguyen, A. M. Castrillon, A. Fan, A. Mellati, Benjamín T. Reyes, Cindra Abidin, E. Olsen, F. Ahmad, Geoff Hatcher, J. Chana, Laura Biolato, L. Tse, L. Wang, M. Azarmnia, M. Davoodi, N. Campos, N. Fan, P. Prabha, Q. Lu, S. Cyrusian, S. Dallaire, S. Ho, S. Jantzi, T. Dusatko, W. Elsharkasy:
8.6 A Highly Reconfigurable 40-97GS/s DAC and ADC with 40GHz AFE Bandwidth and Sub-35fJ/conv-step for 400Gb/s Coherent Optical Applications in 7nm FinFET. ISSCC 2021: 136-138 - [c9]Álvaro Fernandez Bocco, Fredy Solis, Benjamín T. Reyes, Damián A. Morero, Mario R. Hueda:
An Error Backpropagation-based Background Calibration of Pipeline TI-ADCs for 256-QAM Optical Coherent Receivers. LASCAS 2021: 1-4 - [c8]Agustin C. Galetto, Benjamín T. Reyes, Damián A. Morero, Mario R. Hueda:
Background Compensation of Frequency Interleaved DAC for Optical Transceivers. LASCAS 2021: 1-4 - 2020
- [c7]Leandro Passetti, Agustin C. Galetto, Diego J. Hernando, Damián A. Morero, Benjamín T. Reyes, Mario R. Hueda:
Backpropagation-Based Background Compensation of Frequency Interleaved ADC for Coherent Optical Receivers. ISCAS 2020: 1-5 - [c6]Fredy Solis, Álvaro Fernandez Bocco, Damián A. Morero, Mario R. Hueda, Benjamín T. Reyes:
Background Calibration of Time-Interleaved ADC for Optical Coherent Receivers using Error Backpropagation Techniques. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j3]Benjamín T. Reyes, Laura Biolato, Agustin C. Galetto, Leandro Passetti, Fredy Solis, Mario R. Hueda:
An Energy-Efficient Hierarchical Architecture for Time-Interleaved SAR ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(6): 2064-2076 (2019) - 2018
- [c5]Benjamín T. Reyes, Laura Biolato, Agustin C. Galetto, Leandro Passetti, Fredy Solis, Mario R. Hueda:
An 8-bit 3.2GS/S CMOS time-interleaved SAR ADC with non-buffered input demultiplexing. LASCAS 2018: 1-4 - 2017
- [j2]Benjamín T. Reyes, Raul M. Sanchez, Ariel L. Pola, Mario R. Hueda:
Design and Experimental Evaluation of a Time-Interleaved ADC Calibration Algorithm for Application in High-Speed Communication Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(5): 1019-1030 (2017) - 2016
- [j1]Christian A. Schmidt, Juan E. Cousseau, José Luis Figueroa, Benjamín T. Reyes, Mario R. Hueda:
Efficient Estimation and Correction of Mismatch Errors in Time-Interleaved ADCs. IEEE Trans. Instrum. Meas. 65(2): 243-254 (2016) - [c4]Raul M. Sanchez, Benjamín T. Reyes, Ariel L. Pola, Mario Rafael Hueda:
An FPGA-based emulation platform for evaluation of time-interleaved ADC calibration systems. LASCAS 2016: 187-190 - 2014
- [c3]Benjamín T. Reyes, German Paulina, Lucas Tealdi, Emanuel Labat, Raul M. Sanchez, Pablo Sergio Mandolesi, Mario Rafael Hueda:
A 1.6Gb/s CMOS LVDS transmitter with a programmable pre-emphasis system. LASCAS 2014: 1-4 - [c2]Benjamín T. Reyes, Lucas Tealdi, German Paulina, Emanuel Labat, Raul M. Sanchez, Pablo Sergio Mandolesi, Mario Rafael Hueda:
A 6-bit 2GS/s CMOS time-interleaved ADC for analysis of mixed-signal calibration techniques. LASCAS 2014: 1-4 - 2012
- [c1]Benjamín T. Reyes, Venu Gopinathan, Pablo Sergio Mandolesi, Mario R. Hueda:
Joint sampling-time error and channel skew calibration of time-interleaved ADC in multichannel fiber optic receivers. ISCAS 2012: 2981-2984
Coauthor Index
aka: Mario R. Hueda
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last updated on 2024-10-18 20:27 CEST by the dblp team
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