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Piet Wambacq
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- affiliation: Vrije Universiteit Brussel
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2020 – today
- 2022
- [j61]Xinyan Tang
, Johan Nguyen
, Giovanni Mangraviti
, Zhiwei Zong
, Piet Wambacq
:
Design and Analysis of a 140-GHz T/R Front-End Module in 22-nm FD-SOI CMOS. IEEE J. Solid State Circuits 57(5): 1300-1313 (2022) - [j60]Anirudh Kankuppe
, Sehoon Park
, Kristof Vaesen, Dae-Woong Park, Barend van Liempd
, Siddhartha Sinha
, Piet Wambacq
, Jan Craninckx
:
A 67-mW D-Band FMCW I/Q Radar Receiver With an N-Path Spillover Notch Filter in 28-nm CMOS. IEEE J. Solid State Circuits 57(7): 1982-1996 (2022) - [j59]Sriram Balamurali
, Giovanni Mangraviti
, Cheng-Hsueh Tsai
, Piet Wambacq
, Jan Craninckx
:
Design and Analysis of 55-63-GHz Fundamental Quad-Core VCO With NMOS-Only Stacked Oscillator in 28-nm CMOS. IEEE J. Solid State Circuits 57(7): 1997-2010 (2022) - [j58]Lucas Moura Santana
, Ewout Martens
, Jorge Lagos
, Benjamin P. Hershberg
, Piet Wambacq
, Jan Craninckx
:
A 950 MHz Clock 47.5 MHz BW 4.7 mW 67 dB SNDR Discrete Time Delta Sigma ADC Leveraging Ring Amplification and Split-Source Comparator Based Quantizer in 28 nm CMOS. IEEE J. Solid State Circuits 57(7): 2068-2077 (2022) - [j57]Sehoon Park
, Dae-Woong Park
, Kristof Vaesen, Anirudh Kankuppe
, Siddhartha Sinha
, Barend van Liempd
, Piet Wambacq
, Jan Craninckx
:
A D-Band Low-Power and High-Efficiency Frequency Multiply-by-9 FMCW Radar Transmitter in 28-nm CMOS. IEEE J. Solid State Circuits 57(7): 2114-2129 (2022) - [c115]Steven Van Winckel, Alican Çaglar, Benjamin Gys
, Steven Brebels, Anton Potocnik, Bertrand Parvais, Piet Wambacq, Jan Craninckx:
A 28nm 6.5-8.1GHz 1.16mW/qubit Cryo-CMOS System-an-Chip for Superconducting Qubit Readout. ESSCIRC 2022: 61-64 - 2021
- [j56]Akshay Visweswaran
, Kristof Vaesen, Miguel Glassee, Anirudh Kankuppe
, Siddhartha Sinha
, Claude Desset, Thomas Gielen
, André Bourdoux, Piet Wambacq
:
A 28-nm-CMOS Based 145-GHz FMCW Radar: System, Circuits, and Characterization. IEEE J. Solid State Circuits 56(7): 1975-1993 (2021) - [j55]Yang Zhang
, Giovanni Mangraviti
, Johan Nguyen
, Zhiwei Zong
, Kamil Yavuz Kapusuz
, Sam Lemey
, Hendrik Rogier
, Giuseppe Gramegna, Piet Wambacq
:
A Low-Power Reflection-Coefficient Sensor for 28-GHz Beamforming Transmitters in 22-nm FD-SOI CMOS. IEEE J. Solid State Circuits 56(12): 3704-3714 (2021) - [c114]Alican Çaglar
, Steven Van Winckel, Steven Brebels, Piet Wambacq, Jan Craninckx:
A 4.2mW 4K 6-8GHz CMOS LNA for Superconducting Qubit Readout. A-SSCC 2021: 1-3 - [c113]Lucas Moura Santana
, Ewout Martens, Jorge Lagos, Benjamin P. Hershberg, Piet Wambacq, Jan Craninckx:
A 47.5MHz BW 4.7mW 67dB SNDR Ringamp Based Discrete-Time Delta Sigma ADC. ESSCIRC 2021: 207-210 - [c112]Sriram Balamurali, Giovanni Mangraviti, Cheng-Hsueh Tsai, Piet Wambacq, Jan Craninckx:
A 55-63 GHz fundamental Quad-Core VCO with NMOS-only stacked oscillator in 28 nm CMOS. ESSCIRC 2021: 295-298 - [c111]Anirudh Kankuppe
, Sehoon Park
, Kristof Vaesen, Dae-Woong Park, Barend van Liempd, Piet Wambacq, Jan Craninckx:
A 67mW D-band FMCW I/Q Radar Receiver with an N-path Spillover Notch Filter in 28nm CMOS. ESSCIRC 2021: 471-474 - [c110]Pratap Tumkur Renukaswamy, Nereo Markulic, Piet Wambacq, Jan Craninckx:
Fractional-N Sub-Sampling PLL Using a Calibrated Delay Line for Phase Noise Cancellation. ISCAS 2021: 1-5 - [c109]Yang Zhang, Giovanni Mangraviti, Johan Nguyen
, Zhiwei Zong
, Piet Wambacq:
26.4 A Reflection-Coefficient Sensor for 28GHz Beamforming Transmitters in 22nm FD-SOI CMOS. ISSCC 2021: 360-362 - 2020
- [j54]Cheng-Hsueh Tsai
, Zhiwei Zong
, Federico Pepe
, Giovanni Mangraviti
, Jan Craninckx
, Piet Wambacq
:
Analysis of a 28-nm CMOS Fast-Lock Bang-Bang Digital PLL With 220-fs RMS Jitter for Millimeter-Wave Communication. IEEE J. Solid State Circuits 55(7): 1854-1863 (2020) - [j53]Pratap Tumkur Renukaswamy
, Nereo Markulic
, Piet Wambacq
, Jan Craninckx
:
A 12-mW 10-GHz FMCW PLL Based on an Integrating DAC With 28-kHz RMS-Frequency-Error for 23-MHz/μs Slope and 1.2-GHz Chirp-Bandwidth. IEEE J. Solid State Circuits 55(12): 3294-3307 (2020) - [j52]Xinyan Tang
, Johan Nguyen
, Alaaeldien Medra, Khaled Khalaf
, Akshay Visweswaran
, Björn Debaillie, Piet Wambacq
:
Design of D-Band Transformer-Based Gain-Boosting Class-AB Power Amplifiers in Silicon Technologies. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 67-I(5): 1447-1458 (2020) - [j51]Zhiwei Zong
, Giovanni Mangraviti
, Piet Wambacq:
Low 1/f3 Noise Corner LC-VCO Design Using Flicker Noise Filtering Technique in 22nm FD-SOI. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 67-I(5): 1469-1480 (2020) - [c108]Zhiwei Zong
, Xinyan Tang
, Johan Nguyen
, Khaled Khalaf, Giovanni Mangraviti, Yao Liu, Piet Wambacq:
A 28GHz Two-Way Current Combining Stacked-FET Power Amplifier in 22nm FD-SOI. CICC 2020: 1-4 - [c107]Toshio Yasue, Fortunato Frazzica, Annachiara Spagnolo, David San Segundo Bello, Maarten De Bock, Piet Wambacq, Jan Craninckx:
A 1st Order Incremental Sigma-Delta with Refined Digitally Implemented Feed-Forward for 2-stage ADC. IEEE SENSORS 2020: 1-4 - [c106]Pratap Tumkur Renukaswamy, Nereo Markulic, Sehoon Park
, Anirudh Kankuppe
, Qixian Shi, Piet Wambacq, Jan Craninckx:
17.7 A 12mW 10GHz FMCW PLL Based on an Integrating DAC with 90kHz rms Frequency Error for 23MHz/µs Slope and 1.2GHz Chirp Bandwidth. ISSCC 2020: 278-280 - [c105]Claude Desset, Piet Wambacq, Yang Zhang, Mark Ingels, André Bourdoux:
A flexible power model for mm-wave and THz high-throughput communication systems. PIMRC 2020: 1-6 - [c104]Dae-Woong Park, Dzuhri Radityo Utomo, Jong-Phil Hong, Kristof Vaesen, Piet Wambacq, Sang-Gug Lee:
A 247 and 272 GHz Two-Stage Regenerative Amplifiers in 65 nm CMOS with 18 and 15 dB Gain Based on Double-Gmax Gain Boosting Technique. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [j50]Jorge Lagos
, Benjamin P. Hershberg
, Ewout Martens
, Piet Wambacq
, Jan Craninckx
:
A Single-Channel, 600-MS/s, 12-b, Ringamp-Based Pipelined ADC in 28-nm CMOS. IEEE J. Solid State Circuits 54(2): 403-416 (2019) - [j49]Jorge Lagos
, Benjamin P. Hershberg
, Ewout Martens
, Piet Wambacq
, Jan Craninckx
:
A 1-GS/s, 12-b, Single-Channel Pipelined ADC With Dead-Zone-Degenerated Ring Amplifiers. IEEE J. Solid State Circuits 54(3): 646-658 (2019) - [j48]Nereo Markulic
, Pratap Tumkur Renukaswamy
, Ewout Martens
, Barend van Liempd
, Piet Wambacq
, Jan Craninckx
:
A 5.5-GHz Background-Calibrated Subsampling Polar Transmitter With -41.3-dB EVM at 1024 QAM in 28-nm CMOS. IEEE J. Solid State Circuits 54(4): 1059-1073 (2019) - [j47]Steve Blandino
, Giovanni Mangraviti
, Claude Desset, André Bourdoux, Piet Wambacq, Sofie Pollin
:
Multi-User Hybrid MIMO at 60 GHz Using 16-Antenna Transmitters. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(2): 848-858 (2019) - [c103]Aritra Banerjee
, Kristof Vaesen, Akshay Visweswaran, Khaled Khalaf, Qixian Shi, Steven Brebels, Davide Guermandi, Cheng-Hsueh Tsai, Johan Nguyen
, Alaa Medra, Yao Liu, Giovanni Mangraviti, Orges Furxhi
, Bert Gyselinckx, André Bourdoux, Jan Craninckx, Piet Wambacq:
Millimeter-Wave Transceivers for Wireless Communication, Radar, and Sensing : (Invited Paper). CICC 2019: 1-11 - [c102]Cheng-Hsueh Tsai, Federico Pepe, Giovanni Mangraviti, Zhiwei Zong, Jan Craninckx, Piet Wambacq:
A 22.5-27.7-GHz Fast-Lock Bang-Bang Digital PLL in 28-nm CMOS for Millimeter-Wave Communication With 220-fs RMS Jitter. ESSCIRC 2019: 111-114 - [c101]Akshay Visweswaran, Bastien Vignon, Xinyan Tang
, Steven Brebels, Björn Debaillie, Piet Wambacq:
A 112-142GHz Power Amplifier with Regenerative Reactive Feedback achieving 17dBm peak Psat at 13% PAE. ESSCIRC 2019: 337-340 - [c100]Akshay Visweswaran, Kristof Vaesen, Siddhartha Sinha, Ilja Ocket, Miguel Glassee, Claude Desset, André Bourdoux, Piet Wambacq:
A 145GHz FMCW-Radar Transceiver in 28nm CMOS. ISSCC 2019: 168-170 - [c99]Johan Nguyen
, Xinyan Tang
, Khaled Khalaf, Björn Debaillie, Piet Wambacq:
Systematic Design of On-Chip Matching Networks for D-band Circuits. NEWCAS 2019: 1-4 - [c98]Xinyan Tang
, Alaaeldien Medra, Johan Nguyen
, Khaled Khalaf, Björn Debaillie, Piet Wambacq:
Design of A D-band Transformer-Based Neutralized Class-AB Power Amplifier in Silicon Technologies. NEWCAS 2019: 1-4 - [c97]Dongyang Yan, Mark Ingels, Giovanni Mangraviti, Yao Liu, Bertrand Parvais
, Niamh Waldron, Nadine Collaert, Piet Wambacq:
Design of a 28 GHz differential GaAs power amplifier with capacitive neutralization for 5G mmwave applications. NEWCAS 2019: 1-4 - [c96]Zhiwei Zong
, Giovanni Mangraviti, Piet Wambacq:
A 22-29 GHz Voltage-Biased LC-VCO with Suppressed Flicker Noise over Tuning Range in 22nm FD-SOI. NEWCAS 2019: 1-4 - 2018
- [j46]Khaled Khalaf
, Kristof Vaesen, Steven Brebels, Giovanni Mangraviti
, Michael Libois, Charlotte Soens, Wim Van Thillo
, Piet Wambacq
:
A 60-GHz 8-Way Phased-Array Front-End With T/R Switching and Calibration-Free Beamsteering in 28-nm CMOS. IEEE J. Solid State Circuits 53(7): 2001-2011 (2018) - [j45]Lin-Kun Wu
, David San Segundo Bello, Philippe Coppejans, Jan Craninckx
, Andreas Süss, Maarten Rosmeulen, Piet Wambacq
, Jonathan Borremans:
Analysis and Design of a CMOS Ultra-High-Speed Burst Mode Imager with In-Situ Storage Topology Featuring In-Pixel CDS Amplification. Sensors 18(11): 3683 (2018) - [c95]Jorge Lagos
, Benjamin P. Hershberg, Ewout Martens, Piet Wambacq, Jan Craninckx:
A 1Gsps, 12-bit, single-channel pipelined ADC with dead-zone-degenerated ring amplifiers. CICC 2018: 1-4 - [c94]Bertrand Parvais
, Geert Hellings, Marko Simicic
, Pieter Weckx, Jérôme Mitard, Doyoung Jang, V. Deshpande, B. van Liempc, Anabela Veloso, A. Vandooren, Niamh Waldron, Piet Wambacq, Nadine Collaert, Diederik Verkest:
Scaling CMOS beyond Si FinFET: an analog/RF perspective. ESSDERC 2018: 158-161 - [c93]Jiayoon Ru, Jaehyouk Choi, Piet Wambacq:
Session 15 overview: RF PLLs: RF subcommittee. ISSCC 2018: 244-245 - [c92]Hyunchol Shin, Andrea Bevilacqua, Piet Wambacq:
Session 23 overview: LO generation: RF subcommittee. ISSCC 2018: 364-365 - [c91]Giuseppe Gramegna, Hua Wang, Piet Wambacq:
Session 26 overview: RF techniques for communication and sensing: RF subcommittee. ISSCC 2018: 398-399 - [c90]Nereo Markulic, Pratap Renukaswarny, Ewout Martens, Barend van Liempd, Piet Wambacq, Jan Craninckx:
A 5.5 GHz Background-Calibrated Subsampling Polar Transmitter with -41.3 DB EVM at 1024 OAM in 28NM CMOS. VLSI Circuits 2018: 215-216 - 2017
- [j44]Davide Guermandi
, Qixian Shi, Andy Dewilde, Veerle Derudder, Ubaid Ahmad, Annachiara Spagnolo, Ilja Ocket, André Bourdoux, Piet Wambacq, Jan Craninckx
, Wim Van Thillo:
A 79-GHz 2 × 2 MIMO PMCW Radar SoC in 28-nm CMOS. IEEE J. Solid State Circuits 52(10): 2613-2626 (2017) - [j43]Trong Huynh Bao, Julien Ryckaert, Zsolt Tokei, Abdelkarim Mercha, Diederik Verkest, Aaron Voon-Yew Thean, Piet Wambacq:
Statistical Timing Analysis Considering Device and Interconnect Variability for BEOL Requirements in the 5-nm Node and Beyond. IEEE Trans. Very Large Scale Integr. Syst. 25(5): 1669-1680 (2017) - [c89]Oscar Elisio Mattia, Davide Guermandi, Guy Torfs, Piet Wambacq:
An up to 36Gbps analog baseband equalizer and demodulator for mm-wave wireless communication in 28nm CMOS. CICC 2017: 1-4 - [c88]Khaled Khalaf, Kristof Vaesen, Steven Brebels, Giovanni Mangraviti
, Michael Libois, Charlotte Soens, Piet Wambacq:
A 60GHz 8-way phased array front-end with TR switching and calibration-free beamsteering in 28nm CMOS. ESSCIRC 2017: 203-206 - [c87]Cheng-Hsueh Tsai, Giovanni Mangraviti
, Qixian Shi, Khaled Khalaf, André Bourdoux, Piet Wambacq:
A 54-64.8 GHz subharmonically injection-locked frequency synthesizer with transmitter EVM between -26.5 dB and -28.8 dB in 28 nm CMOS. ESSCIRC 2017: 243-246 - [c86]Kohei Onizuka, Abbas Komijani, Piet Wambacq:
Session 2 overview: Power amplifiers. ISSCC 2017: 30-31 - [c85]Brian P. Ginsburg, Payam Heydari, Piet Wambacq:
Session 17 overview: TX and RX building blocks. ISSCC 2017: 290-291 - [c84]Andrea Mazzanti, Xiang Gao, Piet Wambacq:
Session 19 overview: Frequency generation. ISSCC 2017: 320-321 - 2016
- [j42]Alaa Medra, Davide Guermandi, Kristof Vaesen, Steven Brebels, André Bourdoux, Wim Van Thillo, Piet Wambacq, Vito Giannini
:
An 80 GHz Low-Noise Amplifier Resilient to the TX Spillover in Phase-Modulated Continuous-Wave Radars. IEEE J. Solid State Circuits 51(5): 1141-1153 (2016) - [j41]Khaled Khalaf, Vojkan Vidojkovic, Kristof Vaesen, Michael Libois, Giovanni Mangraviti
, Viki Szortyka, Chunshu Li, Bob Verbruggen, Mark Ingels, André Bourdoux, Charlotte Soens, Wim Van Thillo, John R. Long, Piet Wambacq:
Digitally Modulated CMOS Polar Transmitters for Highly-Efficient mm-Wave Wireless Communication. IEEE J. Solid State Circuits 51(7): 1579-1592 (2016) - [j40]Badr Malki, Bob Verbruggen, Ewout Martens, Piet Wambacq, Jan Craninckx
:
A 150 kHz-80 MHz BW Discrete-Time Analog Baseband for Software-Defined-Radio Receivers using a 5th-Order IIR LPF, Active FIR and a 10 bit 300 MS/s ADC in 28 nm CMOS. IEEE J. Solid State Circuits 51(7): 1593-1606 (2016) - [j39]Nereo Markulic, Kuba Raczkowski, Ewout Martens, Pedro Emiliano Paro Filho, Benjamin P. Hershberg, Piet Wambacq, Jan Craninckx
:
A DTC-Based Subsampling PLL Capable of Self-Calibrated Fractional Synthesis and Two-Point Modulation. IEEE J. Solid State Circuits 51(12): 3078-3092 (2016) - [c83]Davide Guermandi, Qixian Shi, Andy Dewilde, Veerle Derudder, Ubaid Ahmad, Annachiara Spagnolo, André Bourdoux, Piet Wambacq, Wim Van Thillo:
A 79GHz 2×2 MIMO PMCW radar SoC in 28nm CMOS. A-SSCC 2016: 105-108 - [c82]Yanxiang Huang, Chunshu Li, Khaled Khalaf, André Bourdoux, Julien Verschueren, Qixian Shi, Piet Wambacq, Sofie Pollin
, Wim Dehaene, Liesbet Van der Perre
:
A 28 nm CMOS 7.04 Gsps polar digital front-end processor for 60 GHz transmitter. A-SSCC 2016: 333-336 - [c81]Nereo Markulic, Kuba Raczkowski, Ewout Martens, Pedro Emiliano Paro Filho, Benjamin P. Hershberg, Piet Wambacq, Jan Craninckx
:
9.7 A self-calibrated 10Mb/s phase modulator with -37.4dB EVM based on a 10.1-to-12.4GHz, -246.6dB-FOM, fractional-N subsampling PLL. ISSCC 2016: 176-177 - [c80]Giovanni Mangraviti
, Khaled Khalaf, Qixian Shi, Kristof Vaesen, Davide Guermandi, Vito Giannini
, Steven Brebels, Fortunato Frazzica, André Bourdoux, Charlotte Soens, Wim Van Thillo, Piet Wambacq:
13.5 A 4-antenna-path beamforming transceiver for 60GHz multi-Gb/s communication in 28nm CMOS. ISSCC 2016: 246-247 - [c79]Pedro Emiliano Paro Filho, Mark Ingels, Piet Wambacq, Jan Craninckx
:
13.7 A 0.22mm2 CMOS resistive charge-based direct-launch digital transmitter with -159dBc/Hz out-of-band noise. ISSCC 2016: 250-252 - [c78]Benjamin P. Hershberg, Barend van Liempd, Xiaoqiang Zhang, Piet Wambacq, Jan Craninckx
:
20.8 A dual-frequency 0.7-to-1GHz balance network for electrical balance duplexers. ISSCC 2016: 356-357 - [c77]Nereo Markulic, Kuba Raczkowski, Piet Wambacq, Jan Craninckx
:
A Fractional-n subsampling PLL based on a digital-to-time converter. MIPRO 2016: 66-71 - 2015
- [b1]Khaled Khalaf, Vojkan Vidojkovic, Piet Wambacq, John R. Long:
Data Transmission at Millimeter Waves - Exploiting the 60 GHz Band on Silicon. Lecture Notes in Electrical Engineering 346, Springer 2015, ISBN 978-3-662-46937-8, pp. 1-105 - [j38]Badr Malki, Takaya Yamamoto, Bob Verbruggen, Piet Wambacq, Jan Craninckx
:
Correction to "A 70 dB DR 10 b 0-to-80 MS/s Current-Integrating SAR ADC With Adaptive Dynamic Range". IEEE J. Solid State Circuits 50(2): 619 (2015) - [j37]Viki Szortyka, Qixian Shi, Kuba Raczkowski, Bertrand Parvais, Maarten Kuijk
, Piet Wambacq:
A 42 mW 200 fs-Jitter 60 GHz Sub-Sampling PLL in 40 nm CMOS. IEEE J. Solid State Circuits 50(9): 2025-2036 (2015) - [j36]Pedro Emiliano Paro Filho, Mark Ingels, Piet Wambacq, Jan Craninckx
:
An Incremental-Charge-Based Digital Transmitter With Built-in Filtering. IEEE J. Solid State Circuits 50(12): 3065-3076 (2015) - [j35]Viki Szortyka, Kuba Raczkowski, Maarten Kuijk
, Piet Wambacq:
A Wideband Beamforming Lowpass Filter for 60 GHz Phased-Array Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(9): 2324-2333 (2015) - [j34]Chunshu Li, Min Li, Khaled Khalaf, André Bourdoux, Marian Verhelst
, Mark Ingels, Piet Wambacq, Jan Craninckx
, Liesbet Van der Perre
, Sofie Pollin
:
Opportunities and Challenges of Digital Signal Processing in Deeply Technology-Scaled Transceivers. J. Signal Process. Syst. 78(1): 5-19 (2015) - [c76]Bertrand Parvais
, Piet Wambacq, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Ken Sawada, Kazuki Nomoto, Tetsuya Oishi, Hiroaki Ammo:
A digital intensive circuit for low-frequency noise monitoring in 28nm CMOS. A-SSCC 2015: 1-4 - [c75]Qixian Shi, Davide Guermandi, Jan Craninckx
, Piet Wambacq:
Flicker noise upconversion mechanisms in K-band CMOS VCOs. A-SSCC 2015: 1-4 - [c74]Badr Malki, Bob Verbruggen, Ewout Martens, Piet Wambacq, Jan Craninckx
:
A 150 kHz-80 MHz BW DT analog baseband for SDR RX using a 5th-order IIR LPF, active FIR and 10b 300 MS/s ADC in 28nm CMOS. ESSCIRC 2015: 80-83 - [c73]Barend van Liempd, Saneaki Ariumi, Ewout Martens, Shih-Hung Chen, Piet Wambacq, Jan Craninckx
:
A 0.7-1.15GHz complementary common-gate LNA in 0.18μm SOI CMOS with +15dBm IIP3 and >1kV HBM ESD protection. ESSCIRC 2015: 164-167 - [c72]Barend van Liempd, Benjamin P. Hershberg, Björn Debaillie, Piet Wambacq, Jan Craninckx
:
An electrical-balance duplexer for in-band full-duplex with <-85dBm in-band distortion at +10dBm TX-power. ESSCIRC 2015: 176-179 - [c71]Khaled Khalaf, Vojkan Vidojkovic, John R. Long, Piet Wambacq:
A 6x-oversampling 10GS/s 60GHz polar transmitter with 15.3% average PA efficiency in 40nm CMOS. ESSCIRC 2015: 348-351 - [c70]Trong Huynh Bao
, Sushil Sakhare, Julien Ryckaert, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Voon-Yew Thean, Piet Wambacq:
Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM. ICICDT 2015: 1-4 - [c69]Kenichi Miyaguchi, Bertrand Parvais, Lars-Åke Ragnarsson, Piet Wambacq, Praveen Raghavan, Abdelkarim Mercha, Anda Mocuta, Diederik Verkest, Aaron Thean:
Modeling FinFET metal gate stack resistance for 14nm node and beyond. ICICDT 2015: 1-4 - [c68]Annachiara Spagnolo, Bob Verbruggen, Stefano D'Amico, Piet Wambacq:
High-speed analog-to-digital converters in downscaled CMOS. ICICDT 2015: 1-4 - [c67]Pedro Emiliano Paro Filho, Mark Ingels, Piet Wambacq, Jan Craninckx
:
9.3 A transmitter with 10b 128MS/S incremental-charge-based DAC achieving -155dBc/Hz out-of-band noise. ISSCC 2015: 1-3 - [c66]Davide Guermandi, Qixian Shi, Alaa Medra, Tomohiro Murata, Wim Van Thillo, André Bourdoux, Piet Wambacq, Vito Giannini
:
19.7 A 79GHz binary phase-modulated continuous-wave radar transceiver with TX-to-RX spillover cancellation in 28nm CMOS. ISSCC 2015: 1-3 - [c65]Piet Wambacq, Stefano Pellerano, Sven Mattisson, Shouhei Kousai, Ali Afsahi, Taizo Yamawaki:
F5: Advanced RF CMOS transmitter techniques. ISSCC 2015: 1-2 - 2014
- [j33]Badr Malki, Takaya Yamamoto, Bob Verbruggen, Piet Wambacq, Jan Craninckx
:
A 70 dB DR 10 b 0-to-80 MS/s Current-Integrating SAR ADC With Adaptive Dynamic Range. IEEE J. Solid State Circuits 49(5): 1173-1183 (2014) - [j32]Vito Giannini
, Davide Guermandi, Qixian Shi, Alaa Medra, Wim Van Thillo, André Bourdoux, Piet Wambacq:
A 79 GHz Phase-Modulated 4 GHz-BW CW Radar Transmitter in 28 nm CMOS. IEEE J. Solid State Circuits 49(12): 2925-2937 (2014) - [j31]Annachiara Spagnolo, Bob Verbruggen, Piet Wambacq, Stefano D'Amico
:
A 4.1-mW 3.5-GS/s 6-Bit Time-Interleaved ADC in 40-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 61-II(7): 466-470 (2014) - [c64]Julien Ryckaert, Praveen Raghavan, Rogier Baert, Marie Garcia Bardon, M. Dusa, Arindam Mallik, Sushil Sakhare, B. Vandewalle, Piet Wambacq, Bharani Chava
, Kris Croes, Morin Dehan, Doyoung Jang, P. Leray, T.-T. Liu, Kenichi Miyaguchi, Bertrand Parvais, P. Schuddinck, P. Weemaes, Abdelkarim Mercha, Jürgen Bömmels, N. Horiguchi, G. McIntyre, Aaron Thean, Zsolt Tökei, S. Cheng, Diederik Verkest, A. Steegen:
Design Technology co-optimization for N10. CICC 2014: 1-8 - [c63]Annachiara Spagnolo, Bob Verbruggen, Stefano D'Amico
, Piet Wambacq:
A 6.2mW 7b 3.5GS/s time interleaved 2-stage pipelined ADC in 40nm CMOS. ESSCIRC 2014: 75-78 - [c62]Nereo Markulic, Kuba Raczkowski, Piet Wambacq, Jan Craninckx
:
A 10-bit, 550-fs step Digital-to-Time Converter in 28nm CMOS. ESSCIRC 2014: 79-82 - [c61]Alaa Medra, Vito Giannini
, Davide Guermandi, Piet Wambacq:
A 79GHz variable gain low-noise amplifier and power amplifier in 28nm CMOS operating up to 125°C. ESSCIRC 2014: 183-186 - [c60]Badr Malki, Bob Verbruggen, Piet Wambacq, Kazuaki Deguchi, Masao Iriguchi, Jan Craninckx
:
A complementary dynamic residue amplifier for a 67 dB SNDR 1.36 mW 170 MS/s pipelined SAR ADC. ESSCIRC 2014: 215-218 - [c59]Trong Huynh Bao
, Dmitry Yakimets, Julien Ryckaert, Ivan Ciofi, Rogier Baert, Anabela Veloso, Jürgen Bömmels, Nadine Collaert, Philippe Roussel, S. Demuynck, Praveen Raghavan, Abdelkarim Mercha, Zsolt Tokei, Diederik Verkest, Aaron Thean, Piet Wambacq:
Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies. ESSDERC 2014: 102-105 - [c58]Vito Giannini
, Davide Guermandi, Qixian Shi, Kristof Vaesen, Bertrand Parvais, Wim Van Thillo, André Bourdoux, Charlotte Soens, Jan Craninckx
, Piet Wambacq:
14.2 A 79GHz phase-modulated 4GHz-BW CW radar TX in 28nm CMOS. ISSCC 2014: 250-251 - [c57]Viki Szortyka, Qixian Shi, Kuba Raczkowski, Bertrand Parvais, Maarten Kuijk, Piet Wambacq:
21.4 A 42mW 230fs-jitter sub-sampling 60GHz PLL in 40nm CMOS. ISSCC 2014: 366-367 - 2013
- [c56]Vojkan Vidojkovic, Viki Szortyka, Khaled Khalaf, Giovanni Mangraviti
, Bertrand Parvais, Kristof Vaesen, Steven Brebels, Annachiara Spagnolo, Michael Libois, John R. Long, Kuba Raczkowski, Praveen Raghavan, André Bourdoux, Min Li, Charlotte Soens, Vito Giannini
, Piet Wambacq:
CMOS low-power transceivers for 60GHz multi Gbit/s communications. CICC 2013: 1-8 - [c55]Vojkan Vidojkovic, Viki Szortyka, Khaled Khalaf, Giovanni Mangraviti
, Steven Brebels, Wim Van Thillo, Kristof Vaesen, Bertrand Parvais, Vadim Issakov
, Mike Libois, Michiaki Matsuo, John R. Long, Charlotte Soens, Piet Wambacq:
A low-power radio chipset in 40nm LP CMOS with beamforming for 60GHz high-data-rate wireless communication. ISSCC 2013: 236-237 - [c54]Boris Murmann, Jafar Savoj, Piet Wambacq, Jieh-Tsorng Wu:
F6: Mixed-signal/RF design and modeling in next-generation CMOS. ISSCC 2013: 510-511 - [c53]Min Li, Khaled Khalaf, Chunshu Li, Vojkan Vidojkovic, Mark Ingels, André Bourdoux, Piet Wambacq, Jan Craninckx, Liesbet Van der Perre:
Signal processing challenges for emerging digital intensive and digitally assisted transceivers with deeply scaled technology (Invited). SiPS 2013: 324-329 - 2012
- [c52]Wagdy M. Gaber, Piet Wambacq, Jan Craninckx
, Mark Ingels:
A CMOS IQ Digital Doherty Transmitter using modulated tuning capacitors. ESSCIRC 2012: 341-344 - [c51]Vojkan Vidojkovic, Giovanni Mangraviti
, Khaled Khalaf, Viki Szortyka, Kristof Vaesen, Wim Van Thillo, Bertrand Parvais, Mike Libois, Steven Thijs, John R. Long, Charlotte Soens, Piet Wambacq:
A low-power 57-to-66GHz transceiver in 40nm LP CMOS with -17dB EVM at 7Gb/s. ISSCC 2012: 268-270 - [c50]Badr Malki, Takaya Yamamoto, Bob Verbruggen, Piet Wambacq, Jan Craninckx
:
A 70dB DR 10b 0-to-80MS/s current-integrating SAR ADC with adaptive dynamic range. ISSCC 2012: 470-472 - 2011
- [c49]Wagdy M. Gaber, Piet Wambacq, Jan Craninckx
, Mark Ingels:
A CMOS IQ direct digital RF modulator with embedded RF FIR-based quantization noise filter. ESSCIRC 2011: 139-142 - 2010
- [j30]Bob Verbruggen, Jan Craninckx
, Maarten Kuijk, Piet Wambacq, Geert Van der Plas:
A 2.6 mW 6 bit 2.2 GS/s Fully Dynamic Pipeline ADC in 40 nm Digital CMOS. IEEE J. Solid State Circuits 45(10): 2080-2090 (2010) - [c48]Bertrand Parvais, Karen Scheir, Vojkan Vidojkovic, R. Vandebriel, Gerd Vandersteen, Charlotte Soens, Piet Wambacq:
A 40 nm LP CMOS PLL for high-speed mm-wave communication. ESSCIRC 2010: 254-257 - [c47]Piet Wambacq, Vito Giannini
, Karen Scheir, Wim Van Thillo, Yves Rolain:
A fifth-order 880MHz/1.76GHz active lowpass filter for 60GHz communications in 40nm digital CMOS. ESSCIRC 2010: 350-353 - [c46]Kuba Raczkowski, Walter De Raedt, Bart Nauwelaers
, Piet Wambacq:
A wideband beamformer for a phased-array 60GHz receiver in 40nm digital CMOS. ISSCC 2010: 40-41 - [c45]