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2020 – today
- 2024
[j107]Seunghyun Moon
, Han-Gyeol Mun, Hyunwoo Son, Jae-Yoon Sim:
Multipurpose Deep-Learning Accelerator for Arbitrary Quantization With Reduction of Storage, Logic, and Latency Waste. IEEE J. Solid State Circuits 59(1): 143-156 (2024)- [c66]Ho-Jin Lee, Kyeong-Jun Lee, Youngchang Choi, Kyongsu Lee, Seokhyeong Kang, Jae-Yoon Sim:
Trans-Net: Knowledge-Transferring Analog Circuit Optimizer with a Netlist-Based Circuit Representation. DATE 2024: 1-2 - 2023
- [j106]Han-Gyeol Mun, Seunghyun Moon, Byungjun Kim, Kyeong-Jun Lee, Jae-Yoon Sim:
Bottleneck-Stationary Compact Model Accelerator With Reduced Requirement on Memory Bandwidth for Edge Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 70(2): 772-782 (2023) - [j105]Jaehan Park, Jae-Yoon Sim:
A Reconfigurable LDO-Assisted Physically Unclonable Function Achieving a Zero-BER With 14% Masking. IEEE Trans. Circuits Syst. I Regul. Pap. 70(8): 3244-3253 (2023) - [j104]Jahyun Koo, Jae-Yoon Sim:
Corrections to "Low-Noise Distributed RC Oscillator". IEEE Trans. Very Large Scale Integr. Syst. 31(2): 286 (2023) - [j103]Seongun Bae, Minseob Lee, Sang-Min Yoo, Jae-Yoon Sim:
A Temperature Compensated Ring Oscillator With LC-Based Period Error Detection. IEEE Trans. Very Large Scale Integr. Syst. 31(12): 2152-2156 (2023) - [c65]Jaeho Lee, Kiseo Kang, Donggyu Minn, Jae-Yoon Sim:
A 7-10b Programmable Cryo-CMOS TI-SAR ADC for Multichannel Qubit Readout with On-Chip Background Inter-Channel Mismatch Calibrations. ESSCIRC 2023: 169-172 - [c64]Kyeong-Jun Lee, ByungJun Kim, Han-Gyeol Mun, Seunghyun Moon, Jae-Yoon Sim:
Joint Optimization of Cache Management and Graph Reordering for GCN Acceleration. ISLPED 2023: 1-6 - [c63]Seunghyun Moon, Han-Gyeol Mun, Hyunwoo Son, Jae-Yoon Sim:
A 127.8TOPS/W Arbitrarily Quantized 1-to-8b Scalable-Precision Accelerator for General-Purpose Deep Learning with Reduction of Storage, Logic and Latency Waste. ISSCC 2023: 330-331 - [c62]Kiseo Kang, Donggyu Minn, Jaeho Lee, Ho-Jin Song, Moonjoo Lee, Jae-Yoon Sim:
A Cryogenic Controller IC for Superconducting Qubits with DRAG Pulse Generation by Direct Synthesis without Using Memory. ISSCC 2023: 510-511 - [c61]Kyu-Jin Choi, Seungnam Choi, Jae-Yoon Sim:
A 110dB-TCMRR TDM-based 8-Channel Noncontact ECG Recording IC with Suppression of Motion-Induced Coupling in PP. VLSI Technology and Circuits 2023: 1-2 - [c60]Han-Gyeol Mun, Hyunwoo Son, Seunghyun Moon, Jaehyun Park, ByungJun Kim, Jae-Yoon Sim:
A 28 nm 66.8 TOPS/W Sparsity-Aware Dynamic-Precision Deep-Learning Processor. VLSI Technology and Circuits 2023: 1-2 - [c59]Jaehan Park, Cheonhoo Jeon, Donggyu Minn, Heesung Roh, Jae-Yoon Sim:
A 6.5nW, -73.5dBm Sensitivity, Cryptographic Wake-Up Receiver with a PUF-based OTP and Temperature-Insensitive Code Recovery. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j102]Jaehan Park, ByungJun Kim, Jae-Yoon Sim:
A BER-Suppressed PUF With an Amplification of Process Mismatch Effect in an Oscillator Collapse Topology. IEEE J. Solid State Circuits 57(7): 2208-2219 (2022) - [j101]Kiseo Kang, Donggyu Minn, Seongun Bae, Jaeho Lee, Seokhyeong Kang, Moonjoo Lee, Ho-Jin Song, Jae-Yoon Sim:
A 40-nm Cryo-CMOS Quantum Controller IC for Superconducting Qubit. IEEE J. Solid State Circuits 57(11): 3274-3287 (2022) - [j100]Kyu-Jin Choi, Jae-Yoon Sim:
An 18.6-$\mu $W/Ch TDM-Based 8-Channel Noncontact ECG Recording IC With Common-Mode Interference Suppression. IEEE Trans. Biomed. Circuits Syst. 16(6): 1021-1029 (2022) - [j99]Hwan-Seok Ku, Seungnam Choi, Jae-Yoon Sim:
A 12μs-Conversion, 20mK-Resolution Temperature Sensor Based on SAR ADC. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 789-793 (2022) - [j98]Heesung Roh, Youngwoo Ji, Jae-Yoon Sim:
An Auto-Configurable Dual-Mode MPPT for Energy Harvesting With 12 nW-180 mW Conversion Range. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 4053-4057 (2022) - [j97]Jaehan Park, Byungjun Kim, Jae-Yoon Sim:
A PVT-Tolerant Oscillation-Collapse-Based True Random Number Generator With an Odd Number of Inverter Stages. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 4058-4062 (2022) - [j96]Seunghyun Moon, Kyeong-Jun Lee, Han-Gyeol Mun, Byungjun Kim, Jae-Yoon Sim:
An 8.9-71.3 TOPS/W Deep Learning Accelerator for Arbitrarily Quantized Neural Networks. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 4148-4152 (2022) - [j95]Kyeong-Jun Lee, Seunghyun Moon, Jae-Yoon Sim:
A 384G Output NonZeros/J Graph Convolutional Neural Network Accelerator. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 4158-4162 (2022) - [j94]Jaeyun Kim, Yong Bum Kim, Dong-Yeop Seok, Seung Yeon Lee, Jae-Yoon Sim, Hyouk Ryeol Choi:
Performance Enhancement of Capacitive-Type Torque Sensor by Using Resonant Circuit. IEEE Trans. Ind. Electron. 69(1): 560-569 (2022) - [j93]Jahyun Koo, Jae-Yoon Sim:
Low-Noise Distributed RC Oscillator. IEEE Trans. Very Large Scale Integr. Syst. 30(2): 143-152 (2022) - [j92]Youngwoo Ji, Jae-Yoon Sim:
A 20.5-nW Resistor-Less Bandgap Voltage Reference With Self-Biased Compensation for Process Variations. IEEE Trans. Very Large Scale Integr. Syst. 30(6): 840-843 (2022) - [c58]Sunghye Park, Daeyeon Kim, Minhyuk Kweon, Jae-Yoon Sim, Seokhyeong Kang:
A fast and scalable qubit-mapping method for noisy intermediate-scale quantum computers. DAC 2022: 13-18 - [c57]ByungJun Kim, Jaehan Park, Seunghyun Moon, Kiseo Kang, Jae-Yoon Sim:
Configurable Energy-Efficient Lattice-Based Post-Quantum Cryptography Processor for IoT Devices. ESSCIRC 2022: 525-528 - [c56]Sunghye Park, Dohun Kim, Jae-Yoon Sim, Seokhyeong Kang:
MCQA: Multi-Constraint Qubit Allocation for Near-FTQC Device. ICCAD 2022: 108:1-108:9 - [c55]Kyu-Jin Choi, Jae-Yoon Sim:
A Time-Division Multiplexed 8-Channel Non-Contact ECG Recording IC with a Common-Mode Interference Tolerance of 20VPP. ISSCC 2022: 1-3 - [c54]Youngwoo Ji, Jiawei Liao, Sina Arjmandpour, Alessandro Novello, Jae-Yoon Sim, Taekwang Jang:
A Second-Order Temperature-Compensated On-Chip R-RC Oscillator Achieving 7.93ppm/°C and 3.3pJ/Hz in -40°C to 125°C Temperature Range. ISSCC 2022: 1-3 - [c53]Kiseo Kang, Donggyu Minn, Seunghun Bae, Jaeho Lee, Seongun Bae, Gichang Jung, Seokhyeong Kang, Moonjoo Lee, Ho-Jin Song, Jae-Yoon Sim:
A Cryo-CMOS Controller IC With Fully Integrated Frequency Generators for Superconducting Qubits. ISSCC 2022: 362-364 - [c52]Goeun Baek, Seunghun Bae, Minki Lee, Hyuncheol Park, Kangseop Lee, Jae-Yoon Sim, Moonjoo Lee, Ho-Jin Song:
13-K Tnoise Cryo-CMOS Parametric Amplifier at 80 mK for Quantum Computers. VLSI Technology and Circuits 2022: 236-237 - 2021
- [j91]Cheonhoo Jeon, Jae-Yoon Sim:
A 2.5-nW Radio Platform With an Internal Wake-Up Receiver for Smart Contact Lens Using a Single Loop Antenna. IEEE J. Solid State Circuits 56(9): 2668-2679 (2021) - [j90]Sooeun Lee, Jaeyoung Seo, Changyoon Han, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A DFE-Enhanced Phase-Difference Modulation Signaling for Multi-Drop Memory Interfaces. IEEE Trans. Circuits Syst. II Express Briefs 68(6): 1862-1866 (2021) - [j89]Seongun Bae, Minseob Lee, Hwasuk Cho, Jae-Yoon Sim:
A 26GHz Fractional-N Digital Frequency Synthesizer Leveraging Noise Profiles of Three Functional Stages. IEEE Trans. Circuits Syst. II Express Briefs 68(9): 3063-3067 (2021) - [c51]Jaehan Park, Jae-Yoon Sim:
A Physically Unclonable Function Combining a Process Mismatch Amplifier in an Oscillator Collapse Topology. ISSCC 2021: 504-506 - [c50]Kiseo Kang, ByungJun Kim, Gahyun Choi, Sun-Kyung Lee, Jisoo Choi, Jaeho Lee, Seokhyeong Kang, Moonjoo Lee, Ho-Jin Song, Yonuk Chong, Jae-Yoon Sim:
A 5.5mW/Channel 2-to-7 GHz Frequency Synthesizable Qubit-Controlling Cryogenic Pulse Modulator for Scalable Quantum Computers. VLSI Circuits 2021: 1-2 - 2020
- [j88]Ji-Hoon Lee, Jaehyun Ko, Kwangmin Kim, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A Body Channel Communication Technique Utilizing Decision Feedback Equalization. IEEE Access 8: 198468-198481 (2020) - [j87]Cheonhoo Jeon, Jahyun Koo, Kyongsu Lee, Minseob Lee, Su-Kyoung Kim, Sangbaie Shin, Sei Kwang Hahn, Jae-Yoon Sim:
A Smart Contact Lens Controller IC Supporting Dual-Mode Telemetry With Wireless-Powered Backscattering LSK and EM-Radiated RF Transmission Using a Single-Loop Antenna. IEEE J. Solid State Circuits 55(4): 856-867 (2020) - [j86]Jaehyeong Hong, Dong Hoon Baek, Hyunwoo Son, Cheolmin Ahn, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A pattern-dependent injection-locked CDR for clock-embedded signaling. Microelectron. J. 96: 104708 (2020) - [j85]Sooeun Lee, Jaeyoung Seo, Kyunghyun Lim, Jahyun Koo, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 7.8 Gb/s/pin, 1.96 pJ/b Transceiver With Phase-Difference-Modulation Signaling for Highly Reflective Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(6): 2114-2127 (2020) - [j84]Jaehan Park, Cheolmin Ahn, Jaehyeong Hong, Jae-Yoon Sim:
A Picosecond-Resolution Digitally-Controlled Timing Generator With One-Clock-Latency at Arbitrary Instantaneous Input. IEEE Trans. Circuits Syst. II Express Briefs 67-II(9): 1544-1548 (2020) - [j83]Bumjin Park, Youngwoo Ji, Jae-Yoon Sim:
A 490-pW SAR Temperature Sensor With a Leakage-Based Bandgap-Vth Reference. IEEE Trans. Circuits Syst. II Express Briefs 67-II(9): 1549-1553 (2020) - [j82]Seong-Eun Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
Low-Power Small-Area Inverter-Based DSM for MEMS Microphone. IEEE Trans. Circuits Syst. 67-II(11): 2392-2396 (2020) - [j81]Cheolmin Ahn, Jaehyeong Hong, Jongshin Shin, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
An 18-Gb/s NRZ Transceiver With a Channel-Included 2-UI Impulse-Response Filtering FFE and 1-Tap DFE Compensating up to 32-dB Loss. IEEE Trans. Circuits Syst. 67-II(12): 2863-2867 (2020) - [j80]Jaeyoung Seo, Jaehyun Ko, Kyunghyun Lim, Sooeun Lee, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 7.8-Gb/s 2.9-pJ/b Single-Ended Receiver With 20-Tap DFE for Highly Reflective Channels. IEEE Trans. Very Large Scale Integr. Syst. 28(3): 818-822 (2020) - [c49]Kyongsu Lee, Jae-Yoon Sim:
High-speed transceiver network for in-vehicle communication system. ISOCC 2020: 264-265
2010 – 2019
- 2019
- [j79]Kyongsu Lee, Jae-Yoon Sim:
A 2.5Gbps Transceiver and Channel Architecture for High-Speed Automotive Communication System. IEICE Trans. Electron. 102-C(10): 766-769 (2019) - [j78]Minseob Lee, Shinwoong Kim, Hong-June Park, Jae-Yoon Sim:
A 0.0043-mm2 0.3-1.2-V Frequency-Scalable Synthesized Fractional-N Digital PLL With a Speculative Dual-Referenced Interpolating TDC. IEEE J. Solid State Circuits 54(1): 99-108 (2019) - [j77]Hong-June Park, Jae-Yoon Sim, Robert Chen-Hao Chang:
Introduction to the Special Section on the 2018 Asian Solid-State Circuits Conference (A-SSCC). IEEE J. Solid State Circuits 54(10): 2635-2636 (2019) - [j76]Youngwoo Ji, Jungho Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 192-pW Voltage Reference Generating Bandgap- $V_{\text{th}}$ With Process and Temperature Dependence Compensation. IEEE J. Solid State Circuits 54(12): 3281-3291 (2019) - [j75]Hyunwoo Son, Hwasuk Cho, Jungho Lee, Seongun Bae, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Multilayer-Learning Current-Mode Neuromorphic System With Analog-Error Compensation. IEEE Trans. Biomed. Circuits Syst. 13(5): 986-998 (2019) - [j74]Jahyun Koo, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Quadrature RC Oscillator With Noise Reduction by Voltage Swing Control. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(8): 3077-3088 (2019) - [c48]Youngwoo Ji, Jungho Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 192pW Hybrid Bandgap-Vth Reference with Process Dependence Compensated by a Dimension-Induced Side-Effect. ISSCC 2019: 308-310 - [c47]Cheonhoo Jeon, Jahyun Koo, Kyongsu Lee, Su-Kyoung Kim, Sei Kwang Hahn, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 143nW Glucose-Monitoring Smart Contact Lens IC with a Dual-Mode Transmitter for Wireless-Powered Backscattering and RF-Radiated Transmission Using a Single Loop Antenna. VLSI Circuits 2019: 294- - 2018
- [j73]Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Time-Based Receiver With 2-Tap Decision Feedback Equalizer for Single-Ended Mobile DRAM Interface. IEEE J. Solid State Circuits 53(1): 144-154 (2018) - [j72]Seungnam Choi, Hwan-Seok Ku, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
An 84.6-dB-SNDR and 98.2-dB-SFDR Residue-Integrated SAR ADC for Low-Power Sensor Applications. IEEE J. Solid State Circuits 53(2): 404-417 (2018) - [j71]Minsoo Choi, Sooeun Lee, Myungguk Lee, Ji-Hoon Lee, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An FFE Transmitter Which Automatically and Adaptively Relaxes Impedance Matching. IEEE J. Solid State Circuits 53(6): 1780-1792 (2018) - [j70]Hwasuk Cho, Hyunwoo Son, Kihwan Seong, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
An On-Chip Learning Neuromorphic Autoencoder With Current-Mode Transposable Memory Read and Virtual Lookup Table. IEEE Trans. Biomed. Circuits Syst. 12(1): 161-170 (2018) - [j69]Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Study on Bandgap Reference Circuit With Leakage-Based PTAT Generation. IEEE Trans. Very Large Scale Integr. Syst. 26(11): 2310-2321 (2018) - [j68]Kwangmin Kim, Seokjoon Kang, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A Search Algorithm for the Worst Operation Scenario of a Cross-Point Phase-Change Memory Utilizing Particle Swarm Optimization. IEEE Trans. Very Large Scale Integr. Syst. 26(12): 2591-2598 (2018) - [c46]Youngwoo Ji, Cheonhoo Jeon, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 9.3 nW all-in-one bandgap voltage and current reference circuit using leakage-based PTAT generation and DIBL characteristic. ASP-DAC 2018: 309-310 - [c45]Ji-Hoon Lee, Kwangmin Kim, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 16.6-pJ/b 150-Mb/s body-channel communication transceiver with decision feedback equalization improving >200x area efficiency. ASP-DAC 2018: 311-312 - [c44]Hyunwoo Son, Hwasuk Cho, Jahyun Koo, Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A low-power wide dynamic-range current readout circuit for biosensors. ASP-DAC 2018: 325-326 - [c43]Minseob Lee, Shinwoong Kim, Hwasuk Cho, Jahyun Koo, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 0.3-to-1.2V frequency-scalable fractional-N ADPLL with a speculative dual-referenced interpolating TDC. ISSCC 2018: 122-124 - [c42]Sooeun Lee, Jaeyoung Seo, Kyunghyun Lim, Jaehyun Ko, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 7.8Gb/s/pin 1.96pJ/b compact single-ended TRX and CDR with phase-difference modulation for highly reflective memory interfaces. ISSCC 2018: 272-274 - 2017
- [j67]Yoon-Jee Kim, Sung-Eun Cho, Ji-Yong Um, Min-Kyun Chae, Jihoon Bang, Jongkeun Song, Taeho Jeon, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Single-Chip 64-Channel Ultrasound RX-Beamformer Including Analog Front-End and an LUT for Non-Uniform ADC-Sample-Clock Generation. IEEE Trans. Biomed. Circuits Syst. 11(1): 87-97 (2017) - [j66]Hyunwoo Son, Hwasuk Cho, Jahyun Koo, Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Low-Power Wide Dynamic-Range Current Readout Circuit for Ion-Sensitive FET Sensors. IEEE Trans. Biomed. Circuits Syst. 11(3): 523-533 (2017) - [j65]Seunghwan Hong, Shinwoong Kim, Seungnam Choi, Hwasuk Cho, Jaehyeong Hong, Young Hun Seo, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 250-µW 2.4-GHz Fast-Lock Fractional-N Frequency Generation for Ultralow-Power Applications. IEEE Trans. Circuits Syst. II Express Briefs 64-II(2): 106-110 (2017) - [j64]Young-Ho Choi, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Phase-Interpolator-Based Fractional Counter for All-Digital Fractional-N Phase-Locked Loop. IEEE Trans. Circuits Syst. II Express Briefs 64-II(3): 249-253 (2017) - [j63]Seungnam Choi, Yunjae Suh, Joohyun Lee, Jinkyu Kim, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Self-Biased Current-Mode Amplifier With an Application to 10-bit Pipeline ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(7): 1706-1717 (2017) - [j62]Jaeyoung Seo, Minsoo Choi, Sanquan Song, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An Approximate Transfer Function Model of Two Serially Connected Heterogeneous Transmission Lines. IEEE Trans. Circuits Syst. II Express Briefs 64-II(9): 1067-1071 (2017) - [j61]Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
All-Synthesizable Current-Mode Transmitter Driver for USB2.0 Interface. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 788-792 (2017) - [j60]Yelim Youn, Kwangmin Kim, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
Investigation on the Worst Read Scenario of a ReRAM Crossbar Array. IEEE Trans. Very Large Scale Integr. Syst. 25(9): 2402-2410 (2017) - [c41]Myungguk Lee, Seungho Han, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 10-GHz multi-purpose reconfigurable built-in self-test circuit for high-speed links. A-SSCC 2017: 73-76 - [c40]Jahyun Koo, Kyoung-Sik Moon, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
5.5 A quadrature relaxation oscillator with a process-induced frequency-error compensation loop. ISSCC 2017: 94-95 - [c39]Youngwoo Ji, Cheonhoo Jeon, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
5.8 A 9.3nW all-in-one bandgap voltage and current reference circuit. ISSCC 2017: 100-101 - [c38]Hwasuk Cho, Kihwan Seong, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
8.7 A 0.0047mm2 highly synthesizable TDC- and DCO-less fractional-N PLL with a seamless lock range of fREF to 1GHz. ISSCC 2017: 154-155 - [c37]Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
23.7 A time-based receiver with 2-tap DFE for a 12Gb/s/pin single-ended transceiver of mobile DRAM interface in 0.8V 65nm CMOS. ISSCC 2017: 400-401 - 2016
- [j59]Dong-Woo Jee, Yunjae Suh, Hong-June Park, Jae-Yoon Sim:
A Digitally Controlled Op-Amp with Level-Crossing-Based Approximation and its Application to a 10-bit Pipeline ADC. J. Circuits Syst. Comput. 25(12): 1650155:1-1650155:16 (2016) - [j58]Shinwoong Kim, Seunghwan Hong, Kapseok Chang, Hyungsik Ju, Jaewook Shin, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 2 GHz Synthesized Fractional-N ADPLL With Dual-Referenced Interpolating TDC. IEEE J. Solid State Circuits 51(2): 391-400 (2016) - [j57]Soo-Min Lee, Ji-Hoon Lim, Il-Min Yi, Young Jae Jang, Hae-Kang Jung, Kyunghoon Kim, Dae-Han Kwon, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Single-Ended Parallel Transceiver With Four-Bit Four-Wire Four-Level Balanced Coding for the Point-to-Point DRAM Interface. IEEE J. Solid State Circuits 51(8): 1890-1901 (2016) - [j56]Seungho Han, Sooeun Lee, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A Coefficient-Error-Robust Feed-Forward Equalizing Transmitter for Eye-Variation and Power Improvement. IEEE J. Solid State Circuits 51(8): 1902-1914 (2016) - [j55]Il-Min Yi, Soo-Min Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A 40 mV-Differential-Channel-Swing Transceiver Using a RX Current-Integrating TIA and a TX Pre-Emphasis Equalizer With a CML Driver at 9 Gb/s. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(1): 122-133 (2016) - [j54]Ji-Hoon Lim, Jun-Hyun Bae, Jaemin Jang, Hae-Kang Jung, Hyunbae Lee, Yongju Kim, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Delay Locked Loop With a Feedback Edge Combiner of Duty-Cycle Corrector With a 20%-80% Input Duty Cycle for SDRAMs. IEEE Trans. Circuits Syst. II Express Briefs 63-II(2): 141-145 (2016) - [j53]Seungnam Choi, Hyunwoo Son, Jongshin Shin, Sang-Hyun Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 0.65-to-10.5 Gb/s Reference-Less CDR With Asynchronous Baud-Rate Sampling for Frequency Acquisition and Adaptive Equalization. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(2): 276-287 (2016) - [j52]Kyongsu Lee, Jae-Yoon Sim:
A 0.8-to-6.5 Gb/s Continuous-Rate Reference-Less Digital CDR With Half-Rate Common-Mode Clock-Embedded Signaling. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(4): 482-493 (2016) - [j51]Yunjae Suh, Seungnam Choi, Jae-Yoon Sim:
A Low-Power Class-AB Gm-Based Amplifier With Application to an 11-bit Pipelined ADC. IEEE Trans. Very Large Scale Integr. Syst. 24(7): 2562-2569 (2016) - [c36]Young Jae Jang, Seong-Eun Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A low-power LDO circuit with a fast load regulation. APCCAS 2016: 47-49 - [c35]Young-Ho Choi, Kihwan Seong, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
All-synthesizable 6Gbps voltage-mode transmitter for serial link. A-SSCC 2016: 245-248 - [c34]Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
All-synthesizable transmitter driver and data recovery circuit for USB2.0 interface. ISOCC 2016: 63-64 - [c33]Il-Min Yi, Seung-Jun Bae, Min-Kyun Chae, Soo-Min Lee, Young Jae Jang, Young-Chul Cho, Young-Soo Sohn, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A low-EMI four-bit four-wire single-ended DRAM interface by using a three-level balanced coding scheme. VLSI Circuits 2016: 1-2 - 2015
- [j50]Dong-Woo Jee, Dennis Sylvester, David T. Blaauw, Jae-Yoon Sim:
Digitally Controlled Leakage-Based Oscillator and Fast Relocking MDLL for Ultra Low Power Sensor Platform. IEEE J. Solid State Circuits 50(5): 1263-1274 (2015) - [j49]Ji-Yong Um, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Single-Chip 32-Channel Analog Beamformer With 4-ns Delay Resolution and 768-ns Maximum Delay Range for Ultrasound Medical Imaging With a Linear Array Transducer. IEEE Trans. Biomed. Circuits Syst. 9(1): 138-151 (2015) - [j48]Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An Approximate Closed-Form Transfer Function Model for Diverse Differential Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(5): 1335-1344 (2015) - [c32]Inhee Lee, Wanyeong Jung, Hyunsoo Ha, Seokhyeon Jeong, Yejoong Kim, Gyouho Kim, Zhiyoong Foo, Jae-Yoon Sim, Dennis Sylvester, David T. Blaauw:
An ultra-low-power biomedical chip for injectable pressure monitor. BioCAS 2015: 1-4 - [c31]Sooeun Lee, Gunbok Lee, Jae-Yoon Sim, Hong-June Park, Wee Sang Park, Byungsub Kim:
A Sample Reduction Technique by Aliasing Channel Response for Fast Equalizing Transceiver Design. ICCAD 2015: 567-574 - [c30]Jongmi Lee, Youngwoo Ji, Seungnam Choi, Young-Chul Cho, Seong-Jin Jang, Joo-Sun Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
5.7 A 29nW bandgap reference circuit. ISSCC 2015: 1-3 - 2014
- [j47]Seokhyeon Jeong, Zhiyoong Foo, Yoonmyung Lee, Jae-Yoon Sim, David T. Blaauw, Dennis Sylvester:
A Fully-Integrated 71 nW CMOS Temperature Sensor for Low Power Wireless Sensor Nodes. IEEE J. Solid State Circuits 49(8): 1682-1693 (2014) - [j46]Seung-Hun Lee, Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
Current-Mode Transceiver for Silicon Interposer Channel. IEEE J. Solid State Circuits 49(9): 2044-2053 (2014) - [j45]Soo-Min Lee, Il-Min Yi, Hae-Kang Jung, Hyunbae Lee, Yong-Ju Kim, Yunsaing Kim, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
An 80 mV-Swing Single-Ended Duobinary Transceiver With a TIA RX Termination for the Point-to-Point DRAM Interface. IEEE J. Solid State Circuits 49(11): 2618-2630 (2014) - [j44]Ji-Yong Um, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Jongkeun Song, Bae-Hyung Kim, Seung-Hun Lee, Jihoon Bang, Youngil Kim, Kyungil Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
An Analog-Digital Hybrid RX Beamformer Chip With Non-Uniform Sampling for Ultrasound Medical Imaging With 2D CMUT Array. IEEE Trans. Biomed. Circuits Syst. 8(6): 799-809 (2014) - [j43]Hye-Jung Kwon, Jae-Seung Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
Analysis of an Open-Loop Time Amplifier With a Time Gain Determined by the Ratio of Bias Current. IEEE Trans. Circuits Syst. II Express Briefs 61-II(7): 481-485 (2014) - [j42]Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An Approximate Closed-Form Channel Model for Diverse Interconnect Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(10): 3034-3043 (2014)