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Hoi-Jun Yoo
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2020 – today
- 2024
- [j167]Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Jongjun Park, Hoi-Jun Yoo:
MetaVRain: A Mobile Neural 3-D Rendering Processor With Bundle-Frame-Familiarity-Based NeRF Acceleration and Hybrid DNN Computing. IEEE J. Solid State Circuits 59(1): 65-78 (2024) - [j166]Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Juhyoung Lee, Sangyeob Kim, Donghyeon Han, Hoi-Jun Yoo:
DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell. IEEE J. Solid State Circuits 59(1): 102-115 (2024) - [j165]Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Jiwon Choi, Hoi-Jun Yoo:
C-DNN: An Energy-Efficient Complementary Deep-Neural-Network Processor With Heterogeneous CNN/SNN Core Architecture. IEEE J. Solid State Circuits 59(1): 157-172 (2024) - [j164]Soyeon Um, Jaehyuk Lee, Hoi-Jun Yoo:
A 3.8-mW 1.9-mΩ/√Hz Electrical Impedance Tomography IC With High Input Impedance and Loading Effect Calibration for 3-D Early Breast Cancer Detect System. IEEE J. Solid State Circuits 59(7): 2019-2028 (2024) - [j163]Sangjin Kim, Soyeon Um, Wooyoung Jo, Jingu Lee, Sangwoo Ha, Zhiyong Li, Hoi-Jun Yoo:
Scaling-CIM: eDRAM In-Memory-Computing Accelerator With Dynamic-Scaling ADC and Adaptive Analog Operation. IEEE J. Solid State Circuits 59(8): 2694-2705 (2024) - [j162]Soyeon Um, Sangjin Kim, Seongyon Hong, Sangyeob Kim, Hoi-Jun Yoo:
LOG-CIM: An Energy-Efficient Logarithmic Quantization Computing-In-Memory Processor With Exponential Parallel Data Mapping and Zero-Aware 6T Dual-WL Cell. IEEE J. Solid State Circuits 59(10): 3330-3341 (2024) - [j161]Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Jongjun Park, Hoi-Jun Yoo:
A Low-Power Artificial-Intelligence-Based 3-D Rendering Processor With Hybrid Deep Neural Network Computing. IEEE Micro 44(1): 17-27 (2024) - [j160]Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Jiwon Choi, Donghyeon Han, Hoi-Jun Yoo:
COOL-NPU: Complementary Online Learning Neural Processing Unit. IEEE Micro 44(1): 28-37 (2024) - [j159]Sangjin Kim, Hoi-Jun Yoo:
An Overview of Computing-in-Memory Circuits With DRAM and NVM. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1626-1631 (2024) - [j158]Sanghyuk An, Junha Ryu, Gwangtae Park, Hoi-Jun Yoo:
A 8.81 TFLOPS/W Deep-Reinforcement-Learning Accelerator With Delta-Based Weight Sharing and Block-Mantissa Reconfigurable PE Array. IEEE Trans. Circuits Syst. II Express Briefs 71(5): 2529-2533 (2024) - [j157]Haoyang Sang, Wenao Xie, Gwangtae Park, Hoi-Jun Yoo:
An 2.31uJ/Inference Ultra-Low Power Always-on Event-Driven AI-IoT SoC With Switchable nvSRAM Compute-in-Memory Macro. IEEE Trans. Circuits Syst. II Express Briefs 71(5): 2534-2538 (2024) - [j156]Beomseok Kwon, Zhiyong Li, Sangjin Kim, Wooyoung Jo, Hoi-Jun Yoo:
A 92 fps and 2.56 mJ/Frame Computing-In-Memory-Based Human Pose Estimation Accelerator With Resource-Efficient Macro for Mobile Devices. IEEE Trans. Circuits Syst. II Express Briefs 71(6): 2921-2925 (2024) - [c302]Seongyon Hong, Sangyeob Kim, Soyeon Kim, Hoi-Jun Yoo:
DualNet: Efficient Integration of Artificial Neural Network and Spiking Neural Network with Equivalent Conversion. AICAS 2024: 100-104 - [c301]Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Sangyeob Kim, Hoi-Jun Yoo:
NoPIM: Functional Network-on-Chip Architecture for Scalable High-Density Processing-in-Memory-based Accelerator. COOL CHIPS 2024: 1-3 - [c300]Gwangtae Park, Seokchan Song, Haoyang Sang, Dongseok Im, Donghyeon Han, Sangyeob Kim, Hongseok Lee, Hoi-Jun Yoo:
A Low-power and Real-time Neural-Rendering Dense SLAM Processor with 3-Level Hierarchical Sparsity Exploitation. COOL CHIPS 2024: 1-3 - [c299]Junha Ryu, Hankyul Kwon, Wonhoon Park, Zhiyong Li, Beomseok Kwon, Donghyeon Han, Dongseok Im, Sangyeob Kim, Hyungnam Joo, Minsung Kim, Hoi-Jun Yoo:
A Low-Power Neural Graphics System for Instant 3D Modeling and Real-Time Rendering on Mobile AR/VR Devices. COOL CHIPS 2024: 1-3 - [c298]Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Soyeon Kim, Seongyon Hong, Nayeong Lee, Hoi-Jun Yoo:
A Low-Power Large-Language-Model Processor with Big-Little Network and Implicit-Weight-Generation for On-Device AI. HCS 2024: 1 - [c297]Junha Ryu, Hankyul Kwon, Wonhoon Park, Zhiyong Li, Beomseok Kwon, Donghyeon Han, Dongseok Im, Sangyeob Kim, Hyungnam Joo, Minsung Kim, Hoi-Jun Yoo:
NeuGPU: A Neural Graphics Processing Unit for Instant Modeling and Real-Time Rendering on Mobile AR/VR Devices. HCS 2024: 1 - [c296]Seokchan Song, Haoyang Sang, Dongseok Im, Donghyeon Han, Sangyeob Kim, Hongseok Lee, Hoi-Jun Yoo:
Space-Mate: A 303.5mW Real-Time NeRF SLAM Processor with Sparse-Mixture-of-Experts-based Acceleration. HCS 2024: 1 - [c295]Dongseok Im, Hoi-Jun Yoo:
LUTein: Dense-Sparse Bit-Slice Architecture With Radix-4 LUT-Based Slice-Tensor Processing Units. HPCA 2024: 747-759 - [c294]Jiwon Choi, Wooyoung Jo, Seongyon Hong, Beomseok Kwon, Wonhoon Park, Hoi-Jun Yoo:
A 28.6 mJ/iter Stable Diffusion Processor for Text-to-Image Generation with Patch Similarity-based Sparsity Augmentation and Text-based Mixed-Precision. ISCAS 2024: 1-5 - [c293]Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Hoi-Jun Yoo:
Two-Step Spike Encoding Scheme and Architecture for Highly Sparse Spiking-Neural-Network. ISCAS 2024: 1-5 - [c292]Jongjun Park, Seryeong Kim, Wonhoon Park, Seokchan Song, Hoi-Jun Yoo:
A 3.55 mJ/frame Energy-efficient Mixed-Transformer based Semantic Segmentation Accelerator for Mobile Devices. ISCAS 2024: 1-5 - [c291]Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Soyeon Kim, Seongyon Hong, Hoi-Jun Yoo:
20.5 C-Transformer: A 2.6-18.1μJ/Token Homogeneous DNN-Transformer/Spiking-Transformer Processor with Big-Little Network and Implicit Weight Generation for Large Language Models. ISSCC 2024: 368-370 - [c290]Junha Ryu, Hankyul Kwon, Wonhoon Park, Zhiyong Li, Beomseok Kwon, Donghyeon Han, Dongseok Im, Sangyeob Kim, Hyungnam Joo, Hoi-Jun Yoo:
20.7 NeuGPU: A 18.5mJ/Iter Neural-Graphics Processing Unit for Instant-Modeling and Real-Time Rendering with Segmented-Hashing Architecture. ISSCC 2024: 372-374 - [c289]Gwangtae Park, Seokchan Song, Haoyang Sang, Dongseok Im, Donghyeon Han, Sangyeob Kim, Hongseok Lee, Hoi-Jun Yoo:
20.8 Space-Mate: A 303.5mW Real-Time Sparse Mixture-of-Experts-Based NeRF-SLAM Processor for Mobile Spatial Computing. ISSCC 2024: 374-376 - [c288]Dongseok Im, Hoi-Jun Yoo:
CamPU: A Multi-Camera Processing Unit for Deep Learning-based 3D Spatial Computing Systems. MICRO 2024: 50-63 - [c287]Seongyon Hong, Wooyoung Jo, Sangjin Kim, Sangyeob Kim, Kyomin Sohn, Hoi-Jun Yoo:
Dyamond: A 1T1C DRAM In-memory Computing Accelerator with Compact MAC-SIMD and Adaptive Column Addition Dataflow. VLSI Technology and Circuits 2024: 1-2 - [c286]Seryeong Kim, Seokchan Song, Wonhoon Park, Junha Ryu, Sangyeob Kim, Gwangtae Park, Soyeon Kim, Hoi-Jun Yoo:
NeRF-Navi: A 93.6-202.9µJ/task Switchable Approximate-Accurate NeRF Path Planning Processor with Dual Attention Engine and Outlier Bit-Offloading Core. VLSI Technology and Circuits 2024: 1-2 - [i8]Kwantae Kim, Changhyeon Kim, Sungpill Choi, Hoi-Jun Yoo:
A 0.5V, 6.2μW, 0.059mm2 Sinusoidal Current Generator IC with 0.088% THD for Bio-Impedance Sensing. CoRR abs/2402.03533 (2024) - [i7]Jiwon Choi, Wooyoung Jo, Seongyon Hong, Beomseok Kwon, Wonhoon Park, Hoi-Jun Yoo:
A 28.6 mJ/iter Stable Diffusion Processor for Text-to-Image Generation with Patch Similarity-based Sparsity Augmentation and Text-based Mixed-Precision. CoRR abs/2403.04982 (2024) - 2023
- [j155]Sangyeob Kim, Hoi-Jun Yoo:
C-DNN V2: Complementary Deep-Neural-Network Processor With Full-Adder/OR-Based Reduction Tree and Reconfigurable Spatial Weight Reuse. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(4): 1026-1039 (2023) - [j154]Dongseok Im, Gwangtae Park, Junha Ryu, Zhiyong Li, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, Hoi-Jun Yoo:
DSPU: An Efficient Deep Learning-Based Dense RGB-D Data Acquisition With Sensor Fusion and 3-D Perception SoC. IEEE J. Solid State Circuits 58(1): 177-188 (2023) - [j153]Zhiyong Li, Sangjin Kim, Dongseok Im, Donghyeon Han, Hoi-Jun Yoo:
An Efficient Deep-Learning-Based Super-Resolution Accelerating SoC With Heterogeneous Accelerating and Hierarchical Cache. IEEE J. Solid State Circuits 58(3): 614-623 (2023) - [j152]Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Juhyoung Lee, Hoi-Jun Yoo:
SNPU: An Energy-Efficient Spike Domain Deep-Neural-Network Processor With Two-Step Spike Encoding and Shift-and-Accumulation Unit. IEEE J. Solid State Circuits 58(10): 2812-2825 (2023) - [j151]Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Kwantae Kim, Hoi-Jun Yoo:
Neuro-CIM: ADC-Less Neuromorphic Computing-in-Memory Processor With Operation Gating/Stopping and Digital-Analog Networks. IEEE J. Solid State Circuits 58(10): 2931-2945 (2023) - [j150]Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, Hoi-Jun Yoo:
A Mobile 3-D Object Recognition Processor With Deep-Learning-Based Monocular Depth Estimation. IEEE Micro 43(3): 74-82 (2023) - [c285]Jiwon Choi, Sangyeob Kim, Wonhoon Park, Wooyoung Jo, Hoi-Jun Yoo:
A Resource-Efficient Super-Resolution FPGA Processor with Heterogeneous CNN and SNN Core Architecture. A-SSCC 2023: 1-3 - [c284]Jingu Lee, Sangjin Kim, Wooyoung Jo, Hoi-Jun Yoo:
An Energy-Efficient Heterogeneous Fourier Transform-Based Transformer Accelerator with Frequency-Wise Dynamic Bit-Precision. A-SSCC 2023: 1-3 - [c283]Jongjun Park, Donghyeon Han, Junha Ryu, Dongseok Im, Gwangtae Park, Hoi-Jun Yoo:
A 33.6 FPS Embedding based Real-time Neural Rendering Accelerator with Switchable Computation Skipping Architecture on Edge Device. A-SSCC 2023: 1-3 - [c282]Soyeon Um, Sangjin Kim, Seongyon Hong, Sangyeob Kim, Hoi-Jun Yoo:
LOG-CIM: A 116.4 TOPS/W Digital Computing-In-Memory Processor Supporting a Wide Range of Logarithmic Quantization with Zero-Aware 6T Dual-WL Cell. A-SSCC 2023: 1-3 - [c281]Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Jongjun Park, Hoi-Jun Yoo:
A Low-power Neural 3D Rendering Processor with Bio-inspired Visual Perception Core and Hybrid DNN Acceleration. COOL CHIPS 2023: 1-3 - [c280]Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Jiwon Choi, Hoi-Jun Yoo:
COOL-NPU: Complementary Online Learning Neural Processing Unit with CNN-SNN Heterogeneous Core and Event-driven Backpropagation. COOL CHIPS 2023: 1-3 - [c279]Soyeon Um, Jaehyuk Lee, Hoi-Jun Yoo:
A 3.8 mW 1.9 m Ω/√Hz Electrical Impedance Tomography Imaging with 28.4 M Ω High Input Impedance and Loading Calibration. ESSCIRC 2023: 357-360 - [c278]Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Hoi-Jun Yoo:
Sibia: Signed Bit-slice Architecture for Dense DNN Acceleration with Slice-level Sparsity Exploitation. HPCA 2023: 69-80 - [c277]Seongyon Hong, Soyeon Um, Sangjin Kim, Sangyeob Kim, Wooyoung Jo, Hoi-Jun Yoo:
A 332 TOPS/W Input/Weight-Parallel Computing-in-Memory Processor with Voltage-Capacitance-Ratio Cell and Time-Based ADC. ISCAS 2023: 1-5 - [c276]Seryeong Kim, Soyeon Kim, Soyeon Um, Sangjin Kim, Zhiyong Li, Sangyeob Kim, Wooyoung Jo, Hoi-Jun Yoo:
A Reconfigurable 1T1C eDRAM-based Spiking Neural Network Computing-In-Memory Processor for High System-Level Efficiency. ISCAS 2023: 1-5 - [c275]Hankyul Kwon, Gwangtae Park, Junha Ryu, Wooyoung Jo, Hoi-Jun Yoo:
A 15.9 mW 96.5 fps Memory-Efficient 3D Reconstruction Processor with Dilation-based TSDF Fusion and Block-Projection Cache System. ISCAS 2023: 1-5 - [c274]Wonhoon Park, Junha Ryu, Sangjin Kim, Soyeon Um, Wooyoung Jo, Sangyoeb Kim, Hoi-Jun Yoo:
A 5.99 TFLOPS/W Heterogeneous CIM-NPU Architecture for an Energy Efficient Floating-Point DNN Acceleration. ISCAS 2023: 1-4 - [c273]Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Hoi-Jun Yoo:
MetaVRain: A 133mW Real-Time Hyper-Realistic 3D-NeRF Processor with 1D-2D Hybrid-Neural Engines for Metaverse on Mobile Devices. ISSCC 2023: 50-51 - [c272]Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Juhyoung Lee, Sangyeob Kim, Donghyeon Han, Hoi-Jun Yoo:
DynaPlasia: An eDRAM In-Memory-Computing-Based Reconfigurable Spatial Accelerator with Triple-Mode Cell for Dynamic Resource Switching. ISSCC 2023: 256-257 - [c271]Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Hoi-Jun Yoo:
C-DNN: A 24.5-85.8TOPS/W Complementary-Deep-Neural-Network Processor with Heterogeneous CNN/SNN Core Architecture and Forward-Gradient-Based Sparsity Generation. ISSCC 2023: 334-335 - [c270]Wooyoung Jo, Sangjin Kim, Juhyoung Lee, Donghyeon Han, Sangyeob Kim, Seungyoon Choi, Hoi-Jun Yoo:
NeRPIM: A 4.2 mJ/frame Neural Rendering Processing-in-memory Processor with Space Encoding Block-wise Mapping for Mobile Devices. VLSI Technology and Circuits 2023: 1-2 - [c269]Sangjin Kim, Soyeon Um, Wooyoung Jo, Jingu Lee, Sangwoo Ha, Zhiyong Li, Hoi-Jun Yoo:
Scaling-CIM: An eDRAM-based In-Memory-Computing Accelerator with Dynamic-Scaling ADC for SQNR-Boosting and Layer-wise Adaptive Bit-Truncation. VLSI Technology and Circuits 2023: 1-2 - [c268]Seokchan Song, Donghyeon Han, Sangjin Kim, Sangyeob Kim, Gwangtae Park, Hoi-Jun Yoo:
GPPU: A 330.4-μJ/ task Neural Path Planning Processor with Hybrid GNN Acceleration for Autonomous 3D Navigation. VLSI Technology and Circuits 2023: 1-2 - [c267]Wenao Xie, Haoyang Sang, Beomseok Kwon, Dongseok Im, Sangjin Kim, Sangyeob Kim, Hoi-Jun Yoo:
A 709.3 TOPS/W Event-Driven Smart Vision SoC with High-Linearity and Reconfigurable MRAM PIM. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j149]Kwantae Kim, Sangyeob Kim, Hoi-Jun Yoo:
Design of Sub-10-μW Sub-0.1% THD Sinusoidal Current Generator IC for Bio-Impedance Sensing. IEEE J. Solid State Circuits 57(2): 586-595 (2022) - [j148]Dongseok Im, Donghyeon Han, Sanghoon Kang, Hoi-Jun Yoo:
A Pipelined Point Cloud Based Neural Network Processor for 3-D Vision With Large-Scale Max Pooling Layer Prediction. IEEE J. Solid State Circuits 57(2): 661-670 (2022) - [j147]Juhyoung Lee, Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Ji-Hoon Kim, Donghyeon Han, Hoi-Jun Yoo:
OmniDRL: An Energy-Efficient Deep Reinforcement Learning Processor With Dual-Mode Weight Compression and Sparse Weight Transposer. IEEE J. Solid State Circuits 57(4): 999-1012 (2022) - [j146]Surin Gweon, Sanghoon Kang, Kwantae Kim, Hoi-Jun Yoo:
FlashMAC: A Time-Frequency Hybrid MAC Architecture With Variable Latency-Aware Scheduling for TinyML Systems. IEEE J. Solid State Circuits 57(10): 2944-2956 (2022) - [j145]Kwantae Kim, Chang Gao, Rui Graça, Ilya Kiselev, Hoi-Jun Yoo, Tobi Delbruck, Shih-Chii Liu:
A 23-μW Keyword Spotting IC With Ring-Oscillator-Based Time-Domain Feature Extraction. IEEE J. Solid State Circuits 57(11): 3298-3311 (2022) - [j144]Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, Hoi-Jun Yoo:
ECIM: Exponent Computing in Memory for an Energy-Efficient Heterogeneous Floating-Point DNN Training Processor. IEEE Micro 42(1): 99-107 (2022) - [j143]Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, Hoi-Jun Yoo:
A Mobile DNN Training Processor With Automatic Bit Precision Search and Fine-Grained Sparsity Exploitation. IEEE Micro 42(2): 16-25 (2022) - [j142]Sangyeob Kim, Juhyoung Lee, Sanghoon Kang, Donghyeon Han, Wooyoung Jo, Hoi-Jun Yoo:
TSUNAMI: Triple Sparsity-Aware Ultra Energy-Efficient Neural Network Training Accelerator With Multi-Modal Iterative Pruning. IEEE Trans. Circuits Syst. I Regul. Pap. 69(4): 1494-1506 (2022) - [j141]Sangjin Kim, Sangyeob Kim, Juhyoung Lee, Hoi-Jun Yoo:
A Low-Power Graph Convolutional Network Processor With Sparse Grouping for 3D Point Cloud Semantic Segmentation in Mobile Devices. IEEE Trans. Circuits Syst. I Regul. Pap. 69(4): 1507-1518 (2022) - [j140]Sangwoo Ha, Sangjin Kim, Donghyeon Han, Soyeon Um, Hoi-Jun Yoo:
A 36.2 dB High SNR and PVT/Leakage-Robust eDRAM Computing-In-Memory Macro With Segmented BL and Reference Cell Array. IEEE Trans. Circuits Syst. II Express Briefs 69(5): 2433-2437 (2022) - [j139]Seokchan Song, Soyeon Kim, Gwangtae Park, Donghyeon Han, Hoi-Jun Yoo:
A 49.5 mW Multi-Scale Linear Quantized Online Learning Processor for Real-Time Adaptive Object Detection. IEEE Trans. Circuits Syst. II Express Briefs 69(5): 2443-2447 (2022) - [c266]Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, Hoi-Jun Yoo:
A 0.95 mJ/frame DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation. AICAS 2022: 37-40 - [c265]Juhyoung Lee, Wooyoung Jo, Seong-Wook Park, Hoi-Jun Yoo:
Low-power Autonomous Adaptation System with Deep Reinforcement Learning. AICAS 2022: 300-303 - [c264]Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, Hoi-Jun Yoo:
A DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation. AICAS 2022: 501 - [c263]Zhiyong Li, Sangjin Kim, Dongseok Im, Donghyeon Han, Hoi-Jun Yoo:
An 0.92 mJ/frame High-quality FHD Super-resolution Mobile Accelerator SoC with Hybrid-precision and Energy-efficient Cache. CICC 2022: 1-2 - [c262]Dongseok Im, Gwangtae Park, Junha Ryu, Zhiyong Li, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, Hoi-Jun Yoo:
A Low-power and Real-time 3D Object Recognition Processor with Dense RGB-D Data Acquisition in Mobile Platforms. COOL CHIPS 2022: 1-3 - [c261]Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, Hoi-Jun Yoo:
HNPU-V2: A 46.6 FPS DNN Training Processor for Real-World Environmental Adaptation based Robust Object Detection on Mobile Devices. HCS 2022: 1-18 - [c260]Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, Hoi-Jun Yoo:
DSPU: A 281.6mW Real-Time Deep Learning-Based Dense RGB-D Data Acquisition with Sensor Fusion and 3D Perception System-on-Chip. HCS 2022: 1-25 - [c259]Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Kwantae Kim, Hoi-Jun Yoo:
Neuro-CIM: A 310.4 TOPS/W Neuromorphic Computing-in-Memory Processor with Low WL/BL activity and Digital-Analog Mixed-mode Neuron Firing. HCS 2022: 1-25 - [c258]Zhiyong Li, Sangjin Kim, Dongseok Im, Donghyeon Han, Hoi-Jun Yoo:
An Efficient High-quality FHD Super-resolution Mobile Accelerator SoC with Hybrid-precision and Energy-efficient Cache. HCS 2022: 1-26 - [c257]Wooyoung Jo, Sangjin Kim, Juhyeong Lee, Soyeon Um, Zhiyong Li, Hoi-Jun Yoo:
A 161.6 TOPS/W Mixed-mode Computing-in-Memory Processor for Energy-Efficient Mixed-Precision Deep Neural Networks. ISCAS 2022: 365-369 - [c256]Kwantae Kim, Chang Gao, Rui Graça, Ilya Kiselev, Hoi-Jun Yoo, Tobi Delbrück, Shih-Chii Liu:
A 23μW Solar-Powered Keyword-Spotting ASIC with Ring-Oscillator-Based Time-Domain Feature Extraction. ISSCC 2022: 1-3 - [c255]Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Hoi-Jun Yoo:
DSPU: A 281.6mW Real-Time Depth Signal Processing Unit for Deep Learning-Based Dense RGB-D Data Acquisition with Depth Fusion and 3D Bounding Box Extraction in Mobile Platforms. ISSCC 2022: 510-512 - [c254]Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Kwantae Kim, Hoi-Jun Yoo:
Neuro-CIM: A 310.4 TOPS/W Neuromorphic Computing-in-Memory Processor with Low WL/BL activity and Digital-Analog Mixed-mode Neuron Firing. VLSI Technology and Circuits 2022: 38-39 - [i6]Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Hoi-Jun Yoo:
Two-Step Spike Encoding Scheme and Architecture for Highly Sparse Spiking-Neural-Network. CoRR abs/2202.03601 (2022) - [i5]Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Hoi-Jun Yoo:
Energy-efficient Dense DNN Acceleration with Signed Bit-slice Architecture. CoRR abs/2203.07679 (2022) - [i4]Kwantae Kim, Chang Gao, Rui Graça, Ilya Kiselev, Hoi-Jun Yoo, Tobi Delbrück, Shih-Chii Liu:
A 23 μW Keyword Spotting IC with Ring-Oscillator-Based Time-Domain Feature Extraction. CoRR abs/2208.00693 (2022) - 2021
- [j138]Sanghoon Kang, Gwangtae Park, Sangjin Kim, Soyeon Kim, Donghyeon Han, Hoi-Jun Yoo:
An Overview of Sparsity Exploitation in CNNs for On-Device Intelligence With Software-Hardware Cross-Layer Optimizations. IEEE J. Emerg. Sel. Topics Circuits Syst. 11(4): 634-648 (2021) - [j137]Jaehyuk Lee, Surin Gweon, Kwonjoon Lee, Soyeon Um, Kyoung-Rog Lee, Hoi-Jun Yoo:
A 9.6-mW/Ch 10-MHz Wide-Bandwidth Electrical Impedance Tomography IC With Accurate Phase Compensation for Early Breast Cancer Detection. IEEE J. Solid State Circuits 56(3): 887-898 (2021) - [j136]Donghyeon Han, Jinsu Lee, Hoi-Jun Yoo:
DF-LNPU: A Pipelined Direct Feedback Alignment-Based Deep Neural Network Learning Processor for Fast Online Learning. IEEE J. Solid State Circuits 56(5): 1630-1640 (2021) - [j135]Jihee Lee, Kyoung-Rog Lee, Benjamin E. Eovino, Jeong Hoan Park, Luna Yue Liang, Liwei Lin, Hoi-Jun Yoo, Jerald Yoo:
A 36-Channel Auto-Calibrated Front-End ASIC for a pMUT-Based Miniaturized 3-D Ultrasound System. IEEE J. Solid State Circuits 56(6): 1910-1923 (2021) - [j134]Sanghoon Kang, Donghyeon Han, Juhyoung Lee, Dongseok Im, Sangyeob Kim, Soyeon Kim, Junha Ryu, Hoi-Jun Yoo:
GANPU: An Energy-Efficient Multi-DNN Training Processor for GANs With Speculative Dual-Sparsity Exploitation. IEEE J. Solid State Circuits 56(9): 2845-2857 (2021) - [j133]Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, Hoi-Jun Yoo:
HNPU: An Adaptive DNN Training Processor Utilizing Stochastic Dynamic Fixed-Point and Active Bit-Precision Searching. IEEE J. Solid State Circuits 56(9): 2858-2869 (2021) - [j132]Soyeon Kim, Sanghoon Kang, Donghyeon Han, Sangjin Kim, Sangyeob Kim, Hoi-Jun Yoo:
An Energy-Efficient GAN Accelerator With On-Chip Training for Domain-Specific Optimization. IEEE J. Solid State Circuits 56(10): 2968-2980 (2021) - [j131]Kwonjoon Lee, Hoi-Jun Yoo:
Simultaneous Electrical Bio-Impedance Plethysmography at Different Body Parts: Continuous and Non-Invasive Monitoring of Pulse Wave Velocity. IEEE Trans. Biomed. Circuits Syst. 15(5): 1027-1038 (2021) - [j130]Soyeon Um, Sangyeob Kim, Sangjin Kim, Hoi-Jun Yoo:
A 43.1TOPS/W Energy-Efficient Absolute-Difference-Accumulation Operation Computing-In-Memory With Computation Reuse. IEEE Trans. Circuits Syst. II Express Briefs 68(5): 1605-1609 (2021) - [j129]Soyeon Kim, Sangjin Kim, Sangyeob Kim, Donghyeon Han, Hoi-Jun Yoo:
A 64.1mW Accurate Real-Time Visual Object Tracking Processor With Spatial Early Stopping on Siamese Network. IEEE Trans. Circuits Syst. II Express Briefs 68(5): 1675-1679 (2021) - [j128]Junha Ryu, Gwangtae Park, Dongseok Im, Ji-Hoon Kim, Hoi-Jun Yoo:
A 0.82 μW CIS-Based Action Recognition SoC With Self-Adjustable Frame Resolution for Always-on IoT Devices. IEEE Trans. Circuits Syst. II Express Briefs 68(5): 1700-1704 (2021) - [c253]Juhyoung Lee, Changhyeon Kim, Donghyeon Han, Sangyeob Kim, Sangjin Kim, Hoi-Jun Yoo:
Energy-Efficient Deep Reinforcement Learning Accelerator Designs for Mobile Autonomous Systems. AICAS 2021: 1-4 - [c252]Surin Gweon, Sanghoon Kang, Donghyeon Han, Kyoung-Rog Lee, Kwantae Kim, Hoi-Jun Yoo:
FlashMAC: An Energy-Efficient Analog-Digital Hybrid MAC with Variable Latency-Aware Scheduling. A-SSCC 2021: 1-3 - [c251]Wooyoung Jo, Juhyoung Lee, Seunghyun Park, Hoi-Jun Yoo:
An Energy-Efficient Deep Reinforcement Learning FPGA Accelerator for Online Fast Adaptation with Selective Mixed-precision Re-training. A-SSCC 2021: 1-3 - [c250]Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, Hoi-Jun Yoo:
An Energy-Efficient Deep Neural Network Training Processor with Bit-Slice-Level Reconfigurability and Sparsity Exploitation. COOL CHIPS 2021: 1-3 - [c249]Sangjin Kim, Juhyoung Lee, Dongseok Im, Hoi-Jun Yoo:
PNNPU: A Fast and Efficient 3D Point Cloud-based Neural Network Processor with Block-based Point Processing for Regular DRAM Access. HCS 2021: 1-23 - [c248]Juhyoung Lee, Jihoon Kim, Wooyoung Jo,