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2020 – today
- 2020
[j84]Kento Watanabe
, Shintaro Izumi, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Heartbeat Interval Error Compensation Method for Low Sampling Rates Photoplethysmography Sensors. IEICE Trans. Commun. 103-B(6): 645-652 (2020)- [j83]Reiya Kawamoto, Masakazu Taichi, Masaya Kabuto, Daisuke Watanabe, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, Go Matsukawa, Toshio Goto, Motoshi Kojima:
A 1.15-TOPS 6.57-TOPS/W Neural Network Processor for Multi-Scale Object Detection With Reduced Convolutional Operations. IEEE J. Sel. Top. Signal Process. 14(4): 634-645 (2020) - [c112]Reiya Kawamoto, Masakazu Taichi, Masaya Kabuto, Daisuke Watanabe, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi:
A 1.15-TOPS 6.57-TOPS/W DNN Processor for Multi-Scale Object Detection. AICAS 2020: 203-207 - [c111]Daisuke Watanabe, Yuji Yano, Shintaro Izumi, Hiroshi Kawaguchi, Kiyoshi Takeuchi, Toshiro Hiramoto, Shoichi Iwai, Masami Murakata, Masahiko Yoshimoto:
An Architectural Study for Inference Coprocessor Core at the Edge in IoT Sensing. AICAS 2020: 305-309
2010 – 2019
- 2019
- [j82]Masahiko Yoshimoto, Shintaro Izumi:
Recent Progress of Biomedical Processor SoC for Wearable Healthcare Application: A Review. IEICE Trans. Electron. 102-C(4): 245-259 (2019) - [j81]Shintaro Izumi, Takaaki Okano, Daichi Matsunaga, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Non-Contact Instantaneous Heart Rate Extraction System Using 24-GHz Microwave Doppler Sensor. IEICE Trans. Commun. 102-B(6): 1088-1096 (2019) - [j80]Kento Watanabe, Shintaro Izumi, Kana Sasai, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Low-Noise Photoplethysmography Sensor Using Correlated Double Sampling for Heartbeat Interval Acquisition. IEEE Trans. Biomed. Circuits Syst. 13(6): 1552-1562 (2019) - [j79]Haruki Mori, Tomoki Nakagawa, Yuki Kitahara, Yuta Kawamoto, Kenta Takagi, Shusuke Yoshimoto, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 28-nm FD-SOI 8T Dual-Port SRAM for Low-Energy Image Processor With Selective Sourceline Drive Scheme. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(4): 1442-1453 (2019) - [j78]Seiya Yoshida, Shintaro Izumi, Koichi Kajihara, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Energy-Efficient Spectral Analysis Method Using Autoregressive Model-Based Approach for Internet of Things. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(10): 3896-3905 (2019) - [j77]Takaaki Okano, Shintaro Izumi, Takumi Katsuura, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Multimodal Cardiovascular Information Monitor Using Piezoelectric Transducers for Wearable Healthcare. J. Signal Process. Syst. 91(9): 1053-1062 (2019) - [c110]Yuji Yano, Seiya Yoshida, Shintaro Izumi, Hiroshi Kawaguchi, Tetsuya Hirose, Masaya Miyahara, Teruki Someya, Kenichi Okada, Ippei Akita, Yoshihiko Kurui, Hideyuki Tomizawa, Masahiko Yoshimoto:
An IoT Sensor Node SoC with Dynamic Power Scheduling for Sustainable Operation in Energy Harvesting Environment. A-SSCC 2019: 267-270 - [c109]Seiya Yoshida, Shintaro Izumi, Yuki Nishikawa, Kento Watanabe, Kana Sasai, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A Heartbeat Interval Error Compensation Method Using Multiple Linear Regression for Photoplethysmography Sensors. BioCAS 2019: 1-4 - [c108]Kana Sasai, Shintaro Izumi, Kento Watanabe, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A Low-Power Photoplethysmography Sensor using Correlated Double Sampling and Reference Readout Circuit. IEEE SENSORS 2019: 1-4 - 2018
- [j76]Go Matsukawa, Taisuke Kodama, Yuri Nishizumi, Koichi Kajihara, Chikako Nakanishi, Shintaro Izumi, Hiroshi Kawaguchi, Toshio Goto, Takeo Kato, Masahiko Yoshimoto:
A low power, VLSI object recognition processor using Sparse FIND feature for 60 fps HDTV resolution video [IEICE Electronics Express Vol. 14(2017) No. 15 pp. 20170668]. IEICE Electron. Express 15(12): 20188003 (2018) - [j75]Motofumi Nakanishi, Shintaro Izumi, Mio Tsukahara, Hiroshi Kawaguchi, Hiromitsu Kimura, Kyoji Marumoto, Takaaki Fuchikami, Yoshikazu Fujimori, Masahiko Yoshimoto:
A 11.3-µA Physical Activity Monitoring System Using Acceleration and Heart Rate. IEICE Trans. Electron. 101-C(4): 233-242 (2018) - [c107]Tetsuya Youkawa, Haruki Mori, Yuki Miyauchi, Kazuki Yamada, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi:
Delayed Weight Update for Faster Convergence in Data-Parallel Deep Learning. GlobalSIP 2018: 663-667 - [c106]Haruki Mori, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
28-nm FD-SOI Dual-Port SRAM with MSB-Based Inversion Logic for Low-Power Deep Learning. ICECS 2018: 161-164 - [c105]Yuki Miyauchi, Haruki Mori, Tetsuya Youkawa, Kazuki Yamada, Shintato Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, Atsuki Inoue:
Layer Skip Learning using LARS variables for 39% Faster Conversion Time and Lower Bandwidth. ICECS 2018: 673-676 - [c104]Yuki Nishikawa, Shintaro Izumi, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Sampling Rate Reduction for Wearable Heart Rate Variability Monitoring. ISCAS 2018: 1-5 - [c103]Kazuki Yamada, Haruki Mori, Tetsuya Youkawa, Yuki Miyauchi, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi:
Adaptive Learning Rate Adjustment with Short-Term Pre-Training in Data-Parallel Deep Learning. SiPS 2018: 100-105 - [c102]Koichi Kajihara, Shintaro Izumi, Seiya Yoshida, Yuji Yano, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Hardware Implementation of Autoregressive Model Estimation Using Burg's Method for Low-Energy Spectral Analysis. SiPS 2018: 199-204 - 2017
- [j74]Go Matsukawa, Taisuke Kodama, Yuri Nishizumi, Koichi Kajihara, Chikako Nakanishi, Shintaro Izumi, Hiroshi Kawaguchi, Toshio Goto, Takeo Kato, Masahiko Yoshimoto:
A low power, VLSI object recognition processor using Sparse FIND feature for 60 fps HDTV resolution video. IEICE Electron. Express 14(15): 20170668 (2017) - [c101]Mio Tsukahara, Shintaro Izumi, Motofumi Nakanishi, Hiroshi Kawaguchi, Masahiko Yoshimoto, Hiromitsu Kimura, Kyoji Marumoto, Takaaki Fuchikami, Yoshikazu Fujimori:
A 19-μA metabolic equivalents monitoring SoC using adaptive sampling. ASP-DAC 2017: 37-38 - [c100]Takumi Katsuura, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, Shusuke Yoshimoto, Tsuyoshi Sekitani:
Wearable pulse wave velocity sensor using flexible piezoelectric film array. BioCAS 2017: 1-4 - [c99]Yuki Nagasato, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Capacitively coupled ECG sensor system with digitally assisted noise cancellation for wearable application. BioCAS 2017: 1-4 - [c98]Takaaki Okano, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Non-contact biometric identification and authentication using microwave Doppler sensor. BioCAS 2017: 1-4 - [c97]Ryota Nakamura, Shintaro Izumi, Hiroshi Kawaguchi, Hidetoshi Ohta, Masahiko Yoshimoto:
A swallowable sensing device platform with wireless power feeding and chemical reaction actuator. EMBC 2017: 3040-3043 - [c96]Haruki Mori, Tetsuya Youkawa, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, Atsuki Inoue:
A layer-block-wise pipeline for memory and bandwidth reduction in distributed deep learning. MLSP 2017: 1-6 - [c95]Yuri Nishizumi, Go Matsukawa, Koichi Kajihara, Taisuke Kodama, Shintaro Izumi, Hiroshi Kawaguchi, Chikako Nakanishi, Toshio Goto, Takeo Kato, Masahiko Yoshimoto:
FPGA implementation of object recognition processor for HDTV resolution video using sparse FIND feature. SiPS 2017: 1-6 - [c94]Takaaki Okano, Shintaro Izumi, Takumi Katsuura, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Multimodal cardiovascular information monitor using piezoelectric transducers for wearable healthcare. SiPS 2017: 1-6 - 2016
- [j73]Go Matsukawa, Yuta Kimi, Shuhei Yoshida, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Error Propagation Analysis for Single Event Upset considering Masking Effects on Re-Convergent Path. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(6): 1198-1205 (2016) - [j72]Haruki Mori, Yohei Umeki, Shusuke Yoshimoto, Shintaro Izumi, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 28-nm 484-fJ/writecycle 650-fJ/readcycle 8T Three-Port FD-SOI SRAM for Image Processor. IEICE Trans. Electron. 99-C(8): 901-908 (2016) - [j71]Yohei Umeki, Koji Yanagida, Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, Koji Tsunoda, Toshihiro Sugii:
A Counter-based Read Circuit Tolerant to Process Variation for 0.4-V Operating STT-MRAM. IPSJ Trans. Syst. LSI Des. Methodol. 9: 79-83 (2016) - [c93]Yuta Kawamoto, Shintaro Izumi, Yoshito Tanaka, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Capacitively coupled ECG sensor using a single electrode with adaptive power-line noise cancellation. BHI 2016: 212-215 - [c92]Daichi Matsunaga, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Non-contact Instantaneous Heart Rate Monitoring Using Microwave Doppler Sensor and Time-Frequency Domain Analysis. BIBE 2016: 172-175 - [c91]Yoshito Tanaka, Shintaro Izumi, Yuta Kawamoto, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Adaptive noise cancellation method for capacitively coupled ECG sensor using single insulated electrode. BioCAS 2016: 296-299 - [c90]Mio Tsukahara, Motofumi Nakanishi, Shintaro Izumi, Yozaburo Nakai, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Low-power metabolic equivalents estimation algorithm using adaptive acceleration sampling. EMBC 2016: 1878-1881 - [c89]Ryota Nakamura, Shintaro Izumi, Hiroshi Kawaguchi, Hidetoshi Ohta, Masahiko Yoshimoto:
Swallowable sensing device for long-term gastrointestinal tract monitoring. EMBC 2016: 3039-3042 - [c88]Mio Tsukahara, Shintaro Izumi, Motofumi Nakanishi, Hiroshi Kawaguchi, Masahiko Yoshimoto, Hiromitsu Kimura, Kyoji Marumoto, Takaaki Fuchikami, Yoshikazu Fujimori:
A 15-μA metabolic equivalents monitoring system using adaptive acceleration sampling and normally off computing. ICECS 2016: 61-64 - [c87]Haruki Mori, Tomoki Nakagawa, Yuki Kitahara, Yuta Kawamoto, Kenta Takagi, Shusuke Yoshimoto, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
An low-energy 8T dual-port SRAM for image processor with selective sourceline drive scheme in 28-nm FD-SOI process technology. ICECS 2016: 532-535 - [c86]Shuhei Yoshida, Go Matsukawa, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
An soft error propagation analysis considering logical masking effect on re-convergent path. IOLTS 2016: 13-16 - 2015
- [j70]Go Matsukawa, Yohei Nakata, Yasuo Sugure, Shigeru Oho, Yuta Kimi, Masafumi Shimozawa, Shuhei Yoshida, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A Low-Latency DMR Architecture with Fast Checkpoint Recovery Scheme. IEICE Trans. Electron. 98-C(4): 333-339 (2015) - [j69]Shintaro Izumi, Masanao Nakano, Ken Yamashita, Yozaburo Nakai, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Noise Tolerant Heart Rate Extraction Algorithm Using Short-Term Autocorrelation for Wearable Healthcare Systems. IEICE Trans. Inf. Syst. 98-D(5): 1095-1103 (2015) - [j68]Keisuke Okuno, Toshihiro Konishi, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi:
An I/O-Sized ADC with Second-Order TDC and MOM Capacitor Voltage-to-Time Converter. IEICE Trans. Electron. 98-C(6): 489-495 (2015) - [j67]Keisuke Okuno, Toshihiro Konishi, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi:
Low-Jitter Design for Second-Order Time-to-Digital Converter Using Frequency Shift Oscillators. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 98-A(7): 1475-1481 (2015) - [j66]Keisuke Okuno, Shintaro Izumi, Kana Masaki, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A Fast Settling All Digital PLL Using Temperature Compensated Oscillator Tuning Word Estimation Algorithm. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 98-A(12): 2592-2599 (2015) - [j65]Shintaro Izumi, Ken Yamashita, Masanao Nakano, Shusuke Yoshimoto, Tomoki Nakagawa, Yozaburo Nakai, Hiroshi Kawaguchi, Hiromitsu Kimura, Kyoji Marumoto, Takaaki Fuchikami, Yoshikazu Fujimori, Hiroshi Nakajima, Toshikazu Shiga, Masahiko Yoshimoto:
Normally Off ECG SoC With Non-Volatile MCU and Noise Tolerant Heartbeat Detector. IEEE Trans. Biomed. Circuits Syst. 9(5): 641-651 (2015) - [j64]Shintaro Izumi, Ken Yamashita, Masanao Nakano, Hiroshi Kawaguchi, Hiromitsu Kimura, Kyoji Marumoto, Takaaki Fuchikami, Yoshikazu Fujimori, Hiroshi Nakajima, Toshikazu Shiga, Masahiko Yoshimoto:
A Wearable Healthcare System With a 13.7 µ A Noise Tolerant ECG Processor. IEEE Trans. Biomed. Circuits Syst. 9(5): 733-742 (2015) - [c85]Yohei Umeki, Koji Yanagida, Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, Koji Tsunoda, Toshihiro Sugii:
A negative-resistance sense amplifier for low-voltage operating STT-MRAM. ASP-DAC 2015: 8-9 - [c84]Yozaburo Nakai, Shintaro Izumi, Ken Yamashita, Masanao Nakano, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 14µA ECG processor with noise tolerant heart rate extractor and FeRAM for wearable healthcare systems. ASP-DAC 2015: 16-17 - [c83]Yuta Kimi, Go Matsukawa, Shuhei Yoshida, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Analysis of Soft Error Propagation Considering Masking Effects on Re-Convergent Path. ATS 2015: 139-144 - [c82]Haruki Mori, Tomoki Nakagawa, Yuki Kitahara, Yuta Kawamoto, Kenta Takagi, Shusuke Yoshimoto, Shintaro Izumi, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 298-fJ/writecycle 650-fJ/readcycle 8T three-port SRAM in 28-nm FD-SOI process technology for image processor. CICC 2015: 1-4 - [c81]Motofumi Nakanishi, Shintaro Izumi, Sho Nagayoshi, Hironori Sato, Hiroshi Kawaguchi, Masahiko Yoshimoto, Takafumi Ando, Satoshi Nakae, Chiyoko Usui, Tomoko Aoyama, Shigeho Tanaka:
Physical activity group classification algorithm using triaxial acceleration and heart rate. EMBC 2015: 510-513 - [c80]Taisuke Kodama, Shintaro Izumi, Kana Masaki, Hiroshi Kawaguchi, Kazusuke Maenaka, Masahiko Yoshimoto:
Large displacement haptic stimulus actuator using piezoelectric pump for wearable devices. EMBC 2015: 1172-1175 - [c79]Hidetoshi Ohta, Shintaro Izumi, Masahiko Yoshimoto:
A more acceptable endoluminal implantation for remotely monitoring ingestible sensors anchored to the stomach wall. EMBC 2015: 4089-4092 - [c78]Daichi Matsunaga, Shintaro Izumi, Keisuke Okuno, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Non-contact and noise tolerant heart rate monitoring using microwave doppler sensor and range imagery. EMBC 2015: 6118-6121 - [c77]Yuta Kimi, Go Matsukawa, Shuhei Yoshida, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
An accurate soft error propagation analysis technique considering temporal masking disablement. IOLTS 2015: 23-25 - [c76]Tomoki Nakagawa, Shintaro Izumi, Koji Yanagida, Yuki Kitahara, Shusuke Yoshimoto, Yohei Umeki, Haruki Mori, Hiroto Kitahara, Hiroshi Kawaguchi, Hiromitsu Kimura, Kyoji Marumoto, Takaaki Fuchikami, Yoshikazu Fujimori, Masahiko Yoshimoto:
A low power 6T-4C non-volatile memory using charge sharing and non-precharge techniques. ISCAS 2015: 2904-2907 - [c75]Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto, Hiromitsu Kimura, Takaaki Fuchikami, Kyoji Marumoto, Yoshikazu Fujimori:
A ferroelectric-based non-volatile flip-flop for wearable healthcare systems. NVMTS 2015: 1-4 - 2014
- [j63]Guangji He, Yuki Miyamoto, Kumpei Matsuda, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 54-mw 3×-real-time 60-kword continuous speech recognition processor VLSI. IEICE Electron. Express 11(2): 20130787 (2014) - [j62]Yohei Nakata, Yuta Kimi, Shunsuke Okumura, Jinwook Jung, Takuya Sawada, Taku Toshikawa, Makoto Nagata, Hirofumi Nakano, Makoto Yabuuchi, Hidehiro Fujiwara, Koji Nii, Hiroyuki Kawai, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 40-nm Resilient Cache Memory for Dynamic Variation Tolerance Delivering ×91 Failure Rate Improvement under 35% Supply Voltage Fluctuation. IEICE Trans. Electron. 97-C(4): 332-341 (2014) - [j61]Shusuke Yoshimoto, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Soft-Error Resilient and Margin-Enhanced N-P Reversed 6T SRAM Bitcell. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(9): 1945-1951 (2014) - [j60]Yohei Umeki, Koji Yanagida, Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi, Koji Tsunoda, Toshihiro Sugii:
STT-MRAM Operating at 0.38V Using Negative-Resistance Sense Amplifier. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(12): 2411-2417 (2014) - [j59]Kenta Takagi, Kotaro Tanaka, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A Real-time Scalable Object Detection System using Low-power HOG Accelerator VLSI. J. Signal Process. Syst. 76(3): 261-274 (2014) - [c74]Go Matsukawa, Yohei Nakata, Yuta Kimi, Yasuo Sugure, Masafumi Shimozawa, Shigeru Oho, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A Low-Latency DMR Architecture with Efficient Recovering Scheme Exploiting Simultaneously Copiable SRAM. ARCS Workshops 2014: 1-5 - [c73]Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto, Yoshikazu Fujimori:
Normally-off technologies for healthcare appliance. ASP-DAC 2014: 17-20 - [c72]Hiromitsu Kimura, Takaaki Fuchikami, Kyoji Marumoto, Yoshikazu Fujimori, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 2.4 pJ ferroelectric-based non-volatile flip-flop with 10-year data retention capability. A-SSCC 2014: 21-24 - [c71]Shintaro Izumi, Ken Yamashita, Masanao Nakano, Tomoki Nakagawa, Yuki Kitahara, Koji Yanagida, Shusuke Yoshimoto, Hiroshi Kawaguchi, Hiromitsu Kimura, Kyoji Marumoto, Takaaki Fuchikami, Yoshikazu Fujimori, Hiroshi Nakajima, Toshikazu Shiga, Masahiko Yoshimoto:
A 6.14µA normally-off ECG-SoC with noise tolerant heart rate extractor for wearable healthcare systems. BioCAS 2014: 280-283 - [c70]Yozaburo Nakai, Shintaro Izumi, Masanao Nakano, Ken Yamashita, Takahide Fujii, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Noise tolerant QRS detection using template matching with short-term autocorrelation. EMBC 2014: 34-37 - [c69]Keisuke Okuno, Kana Masaki, Shintaro Izumi, Toshihiro Konishi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 2.23 ps RMS jitter 3 μs fast settling ADPLL using temperature compensation PLL controller. ICECS 2014: 68-71 - [c68]Keisuke Okuno, Toshihiro Konishi, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi:
An 8-bit I/O-sized ADC with second-order TDC and MOM capacitor voltage-to-time converter. ICECS 2014: 223-226 - [c67]Tomoki Nakagawa, Shintaro Izumi, Shusuke Yoshimoto, Koji Yanagida, Yuki Kitahara, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 6T-4C shadow memory using plate line and word line boosting. ISCAS 2014: 2736-2739 - [c66]Yohei Nakata, Yuta Kimi, Shunsuke Okumura, Jinwook Jung, Takuya Sawada, Taku Toshikawa, Makoto Nagata, Hirofumi Nakano, Makoto Yabuuchi, Hidehiro Fujiwara, Koji Nii, Hiroyuki Kawai, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 40-nm resilient cache memory for dynamic variation tolerance with bit-enhancing memory and on-chip diagnosis structures delivering ×91 failure rate improvement. ISQED 2014: 16-23 - 2013
- [j58]Toshihiro Konishi, Keisuke Okuno, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi:
An Opampless Second-Order MASH ΔΣ ADC with Using Gated Ring Oscillator Time-to-Digital Converter. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(2): 434-442 (2013) - [j57]Masahiko Yoshimoto:
Foreword. IEICE Trans. Electron. 96-C(4): 403 (2013) - [j56]Kosuke Mizuno, Kenta Takagi, Yosuke Terachi, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A Sub-100 mW Dual-Core HOG Accelerator VLSI for Parallel Feature Extraction Processing for HDTV Resolution Video. IEICE Trans. Electron. 96-C(4): 433-443 (2013) - [j55]Guangji He, Takanobu Sugahara, Yuki Miyamoto, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 168-mW 2.4X-Real-Time 60-kWord Continuous Speech Recognition Processor VLSI. IEICE Trans. Electron. 96-C(4): 444-453 (2013) - [j54]Jinwook Jung, Yohei Nakata, Shunsuke Okumura, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Reconfiguring Cache Associativity: Adaptive Cache Design for Wide-Range Reliable Low-Voltage Operation Using 7T/14T SRAM. IEICE Trans. Electron. 96-C(4): 528-537 (2013) - [j53]Toshihiro Konishi, Keisuke Okuno, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi:
A Second-Order All-Digital TDC with Low-Jitter Frequency Shift Oscillators and Dynamic Flipflops. IEICE Trans. Electron. 96-C(4): 546-552 (2013) - [j52]Shusuke Yoshimoto, Shunsuke Okumura, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Multiple-Cell-Upset Tolerant 6T SRAM Using NMOS-Centered Cell Layout. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(7): 1579-1585 (2013) - [j51]Kosuke Mizuno, Yosuke Terachi, Kenta Takagi, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
An FPGA Implementation of a HOG-based Object Detection Processor. IPSJ Trans. Syst. LSI Des. Methodol. 6: 42-51 (2013) - [c65]Guangji He, Takanobu Sugahara, Tsuyoshi Fujinaga, Yuki Miyamoto, Hiroki Noguchi, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 40-nm 144-mW VLSI processor for real-time 60-kWord continuous speech recognition. ASP-DAC 2013: 71-72 - [c64]Shusuke Yoshimoto, Masaharu Terada, Shunsuke Okumura, Toshikazu Suzuki, Shinji Miyano, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 40-nm 0.5-V 12.9-pJ/Access 8T SRAM using low-power disturb mitigation technique. ASP-DAC 2013: 77-78 - [c63]Shunsuke Okumura, Shusuke Yoshimoto, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A physical unclonable function chip exploiting load transistors' variation in SRAM bitcells. ASP-DAC 2013: 79-80 - [c62]Shintaro Izumi, Masanao Nakano, Ken Yamashita, Takahide Fujii, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Low-power hardware implementation of noise tolerant heart rate extractor for a wearable monitoring system. BIBE 2013: 1-4 - [c61]Shusuke Yoshimoto, Shinji Miyano, Makoto Takamiya, Hirofumi Shinohara, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 40-nm 8T SRAM with selective source line control of read bitlines and address preset structure. CICC 2013: 1-4 - [c60]Takahide Fujii, Masanao Nakano, Ken Yamashita, Toshihiro Konishi, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Noise-tolerant instantaneous heart rate and R-peak detection using short-term autocorrelation for wearable healthcare systems. EMBC 2013: 7330-7333 - [c59]Shintaro Izumi, Ken Yamashita, Masanao Nakano, Toshihiro Konishi, Hiroshi Kawaguchi, Hiromitsu Kimura, Kyoji Marumoto, Takaaki Fuchikami, Yoshikazu Fujimori, Hiroshi Nakajima, Toshikazu Shiga, Masahiko Yoshimoto:
A 14 µA ECG processor with robust heart rate monitor for a wearable healthcare system. ESSCIRC 2013: 145-148 - [c58]Kenta Takagi, Kosuke Mizuno, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A sub-100-milliwatt dual-core HOG accelerator VLSI for real-time multiple object detection. ICASSP 2013: 2533-2537 - [c57]Jinwook Jung, Yohei Nakata, Masahiko Yoshimoto, Hiroshi Kawaguchi:
Energy-efficient Spin-Transfer Torque RAM cache exploiting additional all-zero-data flags. ISQED 2013: 216-222 - [c56]Keisuke Okuno, Shintaro Izumi, Toshihiro Konishi, Song Dae-Woo, Masahiko Yoshimoto, Hiroshi Kawaguchi:
Temperature compensation using least mean squares for fast settling all-digital phase-locked loop. NEWCAS 2013: 1-4 - [c55]Ken Yamashita, Shintaro Izumi, Masanao Nakano, Takahide Fujii, Toshihiro Konishi, Hiroshi Kawaguchi, Hiromitsu Kimura, Kyoji Marumoto, Takaaki Fuchikami, Yoshikazu Fujimori, Hiroshi Nakajima, Toshikazu Shiga, Masahiko Yoshimoto:
A 38 μA wearable biosignal monitoring system with near field communication. NEWCAS 2013: 1-4 - [c54]Guangji He, Yuki Miyamoto, Kumpei Matsuda, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 40-NM 54-MW 3×-real-time VLSI processor for 60-kWord continuous speech recognition. SiPS 2013: 147-152 - 2012
- [j50]Shunsuke Okumura, Yohei Nakata, Koji Yanagida, Yuki Kagiyama, Shusuke Yoshimoto, Hiroshi Kawaguchi, Masahiko Yoshimoto:
Low-energy block-level instantaneous comparison 7T SRAM for dual modular redundancy. IEICE Electron. Express 9(6): 470-476 (2012) - [j49]Shusuke Yoshimoto, Masaharu Terada, Shunsuke Okumura, Toshikazu Suzuki, Shinji Miyano, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 40-nm 256-Kb Half-Select Resilient 8T SRAM with Sequential Writing Technique. IEICE Electron. Express 9(12): 1023-1029 (2012) - [j48]Takashi Matsuda, Shintaro Izumi, Yasuharu Sakai, Takashi Takeuchi, Hidehiro Fujiwara, Hiroshi Kawaguchi, Chikara Ohta, Masahiko Yoshimoto:
Divided Static Random Access Memory for Data Aggregation in Wireless Sensor Nodes. IEICE Trans. Commun. 95-B(1): 178-188 (2012) - [j47]Masahiko Yoshimoto:
Foreword. IEICE Trans. Electron. 95-C(4): 413 (2012) - [j46]Yohei Nakata, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A Process-Variation-Adaptive Network-on-Chip with Variable-Cycle Routers and Variable-Cycle Pipeline Adaptive Routing. IEICE Trans. Electron. 95-C(4): 523-533 (2012) - [j45]Shusuke Yoshimoto, Masaharu Terada, Shunsuke Okumura, Toshikazu Suzuki, Shinji Miyano, Hiroshi Kawaguchi, Masahiko Yoshimoto:
A 40-nm 0.5-V 12.9-pJ/Access 8T SRAM Using Low-Energy Disturb Mitigation Scheme. IEICE Trans. Electron. 95-C(4): 572-578 (2012) - [j44]Shunsuke Okumura, Hidehiro Fujiwara, Kosuke Yamaguchi, Shusuke Yoshimoto, Masahiko Yoshimoto, Hiroshi Kawaguchi:
A 0.15-µm FD-SOI Substrate Bias Control SRAM with Inter-Die Variability Compensation Scheme. IEICE Trans. Electron. 95-C(4): 579-585 (2012) - [j43]Shusuke Yoshimoto, Takuro Amashita, Shunsuke Okumura, Koji Nii, Masahiko Yoshimoto, Hiroshi Kawaguchi:
Bit-Error and Soft-Error Resilient 7T/14T SRAM with 150-nm FD-SOI Process. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 95-A(8): 1359-1365 (2012) - [j42]