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Sara Choi
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2020 – today
- 2022
- [c2]Moosung Kim, Sung-Won Yun, Jungjune Park, Hyun Kook Park, Jungyu Lee, Yeong Seon Kim, Dae-Hoon Na, Sara Choi, Youngsun Song, Jonghoon Lee, Hyun-Jun Yoon, Kangbin Lee, Byunghoon Jeong, Sanglok Kim, Junhong Park, Cheon An Lee, Jaeyun Lee, Ji-Sang Lee, Jin Young Chun, Joonsuc Jang, Younghwi Yang, Seung Hyun Moon, Myung-Hoon Choi, Wontae Kim, Jungsoo Kim, Seok-Min Yoon, Pansuk Kwak, Myunghun Lee, Raehyun Song, Sunghoon Kim, Chiweon Yoon, Dongku Kang, Jin-Yub Lee, Jai Hyuk Song:
A 1Tb 3b/Cell 8th-Generation 3D-NAND Flash Memory with 164MB/s Write Throughput and a 2.4Gb/s Interface. ISSCC 2022: 136-137 - 2021
- [j6]Sara Choi
, Hong Keun Ahn
, Byungkyu Song, Seung-Hyuk Kang
, Seong-Ook Jung
:
Self-Referenced Single-Ended Resistance Monitoring Write Termination Scheme for STT-RAM Write Energy Reduction. IEEE Trans. Circuits Syst. I Regul. Pap. 68(6): 2481-2493 (2021) - 2020
- [j5]Giseok Kim
, Ki-Ryong Kim
, Sara Choi
, Hyo Jung Jang, Seong-Ook Jung
:
Area- and Energy-Efficient STDP Learning Algorithm for Spiking Neural Network SoC. IEEE Access 8: 216922-216932 (2020)
2010 – 2019
- 2019
- [j4]Byungkyu Song, Sara Choi
, Seung-Hyuk Kang
, Seong-Ook Jung
:
Offset-Cancellation Sensing-Circuit-Based Nonvolatile Flip-Flop Operating in Near-Threshold Voltage Region. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(8): 2963-2972 (2019) - [j3]Sara Choi
, Hong Keun Ahn
, Byungkyu Song, Jung Pill Kim, Seung-Hyuk Kang
, Seong-Ook Jung
:
A Decoder for Short BCH Codes With High Decoding Efficiency and Low Power for Emerging Memories. IEEE Trans. Very Large Scale Integr. Syst. 27(2): 387-397 (2019) - [j2]Taehui Na
, Byungkyu Song, Sara Choi
, Jung Pill Kim, Seung-Hyuk Kang
, Seong-Ook Jung
:
Offset-Canceling Single-Ended Sensing Scheme With One-Bit-Line Precharge Architecture for Resistive Nonvolatile Memory in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 27(11): 2548-2555 (2019) - 2016
- [j1]Sara Choi, Taehui Na
, Jisu Kim, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung:
Corner-Aware Dynamic Gate Voltage Scheme to Achieve High Read Yield in STT-RAM. IEEE Trans. Very Large Scale Integr. Syst. 24(9): 2851-2860 (2016) - [c1]Sara Choi, Taehui Na
, Seong-Ook Jung, Jung Pill Kim, Seung-Hyuk Kang:
Area-optimal sensing circuit designs in deep submicrometer STT-RAM. ISCAS 2016: 1246-1249
Coauthor Index

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