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ORCIDGerhard Knoblinger
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2020 – today
- 2021
[j4]Daniel Gruber
, Martin Clara, Ramón Sanchez-Perez, Yu-shan Wang, Christoph Duller, Gerald Rauter, Patrick Torta, Gerhard Knoblinger, Kamran Azadet:
A 12-b 16-GS/s RF-Sampling Capacitive DAC for Multi-Band Soft Radio Base-Station Applications With On-Chip Transmission-Line Matching Network in 16-nm FinFET. IEEE J. Solid State Circuits 56(12): 3655-3667 (2021)
2010 – 2019
- 2018
- [c17]Antonio Passamani, Davide Ponton, Andreas Wolter, Gerhard Knoblinger, Andrea Bevilacqua:
A 28nm Low-Voltage Digital Power-Amplifier for QAM-256 WIFI Applications in 0.5mm2 Area w/ 2D Digital-Pre-Distortion and Package Combiner. ICECS 2018: 21-24 - 2017
- [c16]Antonio Passamani, Davide Ponton, Edwin Thaller, Gerhard Knoblinger, Andrea Neviani, Andrea Bevilacqua:
13.9 A 1.1V 28.6dBm fully integrated digital power amplifier for mobile and wireless applications in 28nm CMOS technology with 35% PAE. ISSCC 2017: 232-233 - 2015
- [c15]Stefan Trampitsch, Gerhard Knoblinger, Mario Huemer:
Switched state-space model for a switched-capacitor power amplifier. ISCAS 2015: 1478-1481 - [c14]Antonio Passamani, Davide Ponton, Gerhard Knoblinger, Andrea Bevilacqua:
Analysis and design of a 1.1dB-IL third-order Matching Network for Switched-Capacitor PAs. NORCAS 2015: 1-4 - 2011
- [j3]Davide Ponton, Gerhard Knoblinger, Andreas Roithmeier, Federico Cernoia, Marc Tiebout, Michael Fulde, Pierpaolo Palestri:
LC-VCO in the 3.3- to 4-GHz Band Implemented in 32-nm Low-Power CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs 58-II(8): 467-471 (2011)
2000 – 2009
- 2009
- [j2]Davide Ponton, Pierpaolo Palestri, David Esseni, Luca Selmi, Marc Tiebout, Bertrand Parvais, Domagoj Siprak, Gerhard Knoblinger:
Design of Ultra-Wideband Low-Noise Amplifiers in 45-nm CMOS Technology: Comparison Between Planar Bulk and SOI FinFET Devices. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(5): 920-932 (2009) - [c13]Davide Ponton, Gerhard Knoblinger, Andreas Roithmeier, Marc Tiebout, Michael Fulde, Pierpaolo Palestri:
Assessment of the impact of technology scaling on the performance of LC-VCOs. ESSCIRC 2009: 364-367 - [c12]Michael Fulde, Martin Wirnshofer, Gerhard Knoblinger, Doris Schmitt-Landsiedel:
Design of Low-Voltage Bandgap Reference Circuits in Multi-Gate CMOS Technologies. ISCAS 2009: 2537-2540 - 2008
- [c11]Davide Ponton, Pierpaolo Palestri, David Esseni, Luca Selmi, Marc Tiebout, Bertrand Parvais, Gerhard Knoblinger:
Design of UWB LNA in 45nm CMOS technology: Planar bulk vs. FinFET. ISCAS 2008: 2701-2704 - 2007
- [c10]Michael Fulde, Abdelkarim Mercha, Cedric Gustin, Bertrand Parvais, Vaidyanathan Subramanian, Klaus von Arnim, Florian Bauer, Klaus Schruefer, Doris Schmitt-Landsiedel, Gerhard Knoblinger:
Analog design challenges and trade-offs using emerging materials and devices. ESSCIRC 2007: 123-126 - [c9]Michael Fulde, Klaus von Arnim, Christian Pacha, Florian Bauer, Christian Russ, Domagoj Siprak, Wade Xiong, Andrew Marshall, C. Rinn Cleavelin, Klaus Schruefer, Doris Schmitt-Landsiedel, Gerhard Knoblinger:
Advances in Multi-Gate MOSFET Circuit Design. ICECS 2007: 186-189 - [c8]Michael Fulde, Doris Schmitt-Landsiedel, Gerhard Knoblinger:
Transient Variations in Emerging SOI Technologies: Modeling and Impact on Analog/Mixed-Signal Circuits. ISCAS 2007: 1249-1252 - [c7]Gerhard Knoblinger:
Multi-Gate MOSFET Design. ISQED 2007: 3 - [c6]Gerhard Knoblinger, James W. Tschanz, Marcal Pol:
SUB-45nm Technology and Design Challenges. ISQED 2007: 3 - [c5]Andrew Marshall, C. Rinn Cleavelin, Weize Xiong, Christian Pacha, Gerhard Knoblinger, Klaus Von Armin, Thomas Schulz, Klaus Schruefer, Ken Matthews, Wolfgang Molzer, Paul Patruno, Christian Russ:
A merged MuGFET and planar SOI process. SoCC 2007: 39-42 - 2006
- [c4]Michael Kropfitsch, Philipp Riess, Gerhard Knoblinger, Dieter Draxelmayr:
Dielectric absorption of low-k materials: extraction, modelling and influence on SAR ADCs. ISCAS 2006 - [c3]Christian Pacha, Klaus von Arnim, Thomas Schulz, Weize Xiong, Michael Gostkowski, Gerhard Knoblinger, Andrew Marshall, Thomas Nirschl, Jörg Berthold, Christian Russ, Harald Gossner, Charvaka Duvvury, Paul Patruno, C. Rinn Cleavelin, Klaus Schruefer:
Circuit design issues in multi-gate FET CMOS technologies. ISSCC 2006: 1656-1665 - 2002
- [c2]Rainer Kraus, Gerhard Knoblinger:
Modeling the gate-related high-frequency and noise characteristics of deep-submicron MOSFETs. CICC 2002: 209-212 - 2001
- [j1]Gerhard Knoblinger, Peter Klein, Marc Tiebout:
A new model for thermal channel noise of deep-submicron MOSFETs and its application in RF-CMOS design. IEEE J. Solid State Circuits 36(5): 831-837 (2001) - [c1]Elmar Gondro, Oskar Kowarik, Gerhard Knoblinger, Peter Klein:
When do we need non-quasistatic CMOS RF-models? CICC 2001: 377-380
Coauthor Index
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