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ORCIDGiuseppe Cocorullo
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2020 – today
- 2022
[j24]Fabio Frustaci, Fanny Spagnolo
, Stefania Perri, Giuseppe Cocorullo, Pasquale Corsonello:
Robust and High-Performance Machine Vision System for Automatic Quality Inspection in Assembly Processes. Sensors 22(8): 2839 (2022)- 2021
- [c23]Sandro Rao, Elisa Demetra Mallemace, Giuseppe Cocorullo, Lakhdar Dehimi, Francesco Giuseppe Della Corte:
Junction Temperature Measurement in Optically-Controlled Power Mosfet. PHOTOPTICS 2021: 110-114
2010 – 2019
- 2019
- [j23]Giuseppe Cocorullo, Pasquale Corsonello, Fabio Frustaci, Lorena-de-los-Angeles Guachi-Guachi, Stefania Perri:
Multimodal background subtraction for high-performance embedded systems. J. Real Time Image Process. 16(5): 1407-1423 (2019) - 2018
- [c22]Antonio Cordopatri, Giuseppe Cocorullo:
A Smart Torque Control for a High Efficiency 4WD Electric Vehicle. ApplePies 2018: 213-219 - 2017
- [j22]Giuseppe Cocorullo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri:
Design of Efficient BCD Adders in Quantum-Dot Cellular Automata. IEEE Trans. Circuits Syst. II Express Briefs 64-II(5): 575-579 (2017) - 2016
- [j21]Giuseppe Cocorullo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri:
Design of efficient QCA multiplexers. Int. J. Circuit Theory Appl. 44(3): 602-615 (2016) - [j20]Giuseppe Cocorullo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri:
An efficient hardware-oriented stereo matching algorithm. Microprocess. Microsystems 46: 21-33 (2016) - 2014
- [j19]Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo:
Area-Delay Efficient Binary Adders in QCA. IEEE Trans. Very Large Scale Integr. Syst. 22(5): 1174-1179 (2014) - [c21]Lorena Guachi, Giuseppe Cocorullo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri:
A novel background subtraction method based on color invariants and grayscale levels. ICCST 2014: 1-5 - 2013
- [j18]Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo:
Adaptive Census Transform: A novel hardware-oriented stereovision algorithm. Comput. Vis. Image Underst. 117(1): 29-41 (2013) - 2012
- [j17]Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo:
Design approach for high-bandwidth low-power three-stage operational amplifiers. Int. J. Circuit Theory Appl. 40(3): 263-273 (2012) - [j16]Paolo Zicari, Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo:
Low-cost FPGA stereo vision system for real time disparity maps calculation. Microprocess. Microsystems 36(4): 281-288 (2012) - 2010
- [j15]Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo:
Analysis of op-amp phase margin impact on SC SigmaDelta modulator performance. Microelectron. J. 41(7): 440-446 (2010) - [j14]Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo:
Analysis of the Impact of High-Order Integrator Dynamics on SC Sigma-Delta Modulator Performances. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(3): 618-630 (2010) - [j13]Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo:
Corrections to "Settling Time Optimization for Three-Stage CMOS Amplifier Topologies" [Dec 09 2569-2582]. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(7): 1812-1813 (2010)
2000 – 2009
- 2009
- [j12]Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo:
Settling Time Optimization for Three-Stage CMOS Amplifier Topologies. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(12): 2569-2582 (2009) - [c20]Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo:
Effect of OP-amp Phase Margin on SC SigmaDelta Modulator Performances. ISCAS 2009: 3134-3137 - 2008
- [j11]Fabio Frustaci, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo:
High-performance noise-tolerant circuit techniques for CMOS dynamic logic. IET Circuits Devices Syst. 2(6): 537-548 (2008) - [j10]Paolo Zicari, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo:
A matrix product accelerator for field programmable systems on chip. Microprocess. Microsystems 32(2): 53-67 (2008) - [j9]Andrea Pugliese, Gregorio Cappuccino, Giuseppe Cocorullo:
Design Procedure for Settling Time Minimization in Three-Stage Nested-Miller Amplifiers. IEEE Trans. Circuits Syst. II Express Briefs 55-II(1): 1-5 (2008) - [c19]Fabio Frustaci, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo:
A New Dynamic Logic Circuit Design for an Effective Trade-Off between Noise-Immunity, Performance and Energy Dissipation. PATMOS 2008: 277-286 - [c18]Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo:
Settling-Optimization-Based Design Approach for Three-Stage Nested-Miller Amplifiers. PATMOS 2008: 318-327 - 2007
- [c17]Pasquale Corsonello, Stefania Perri, Giovanni Staino, Marco Lanuzza, Giuseppe Cocorullo:
Design and Implementation of a 90nm Low bit-rate Image Compression Core. DSD 2007: 383-389 - [c16]Andrea Pugliese, Gregorio Cappuccino, Giuseppe Cocorullo:
Design methodology of nested-Miller amplifiers for small capacitive loads. ECCTD 2007: 655-658 - [c15]Andrea Pugliese, Gregorio Cappuccino, Giuseppe Cocorullo:
Settling Time Minimization of Operational Amplifiers. PATMOS 2007: 107-116 - 2006
- [j8]Pasquale Corsonello, Stefania Perri, Giovanni Staino, Marco Lanuzza, Giuseppe Cocorullo:
Low bit rate image compression core for onboard space applications. IEEE Trans. Circuits Syst. Video Technol. 16(1): 114-128 (2006) - [j7]Fabio Frustaci, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo:
Techniques for Leakage Energy Reduction in Deep Submicrometer Cache Memories. IEEE Trans. Very Large Scale Integr. Syst. 14(11): 1238-1249 (2006) - [c14]Fabio Frustaci, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo:
Leakage energy reduction techniques in deep submicron cache memories: a comparative study. ISCAS 2006 - [c13]Andrea Pugliese, Gregorio Cappuccino, Giuseppe Cocorullo:
A Simple MOSFET Parasitic Capacitance Model and Its Application to Repeater Insertion Technique. PATMOS 2006: 311-318 - [c12]Andrea Pugliese, Gregorio Cappuccino, Giuseppe Cocorullo:
Correct Modelling of Nested Miller Compensated Amplifier for Discrete-Time Applications. PATMOS 2006: 524-531 - 2005
- [j6]Pasquale Corsonello, Stefania Perri, Paolo Zicari, Giuseppe Cocorullo:
Microprocessor-based FPGA implementation of SPIHT image compression subsystems. Microprocess. Microsystems 29(6): 299-305 (2005) - [j5]Stefania Perri, Marco Lanuzza, Pasquale Corsonello, Giuseppe Cocorullo:
A high-performance fully reconfigurable FPGA-based 2D convolution processor. Microprocess. Microsystems 29(8-9): 381-391 (2005) - [c11]Gregorio Cappuccino, Andrea Pugliese, Giuseppe Cocorullo:
Output Resistance Scaling Model for Deep-Submicron Cmos Buffers for Timing Performance Optimisation. PATMOS 2005: 329-336 - [c10]Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo:
Fast Low-Power 64-Bit Modular Hybrid Adder. PATMOS 2005: 609-617 - 2004
- [j4]Stefania Perri, Pasquale Corsonello, Maria Antonia Iachino, Marco Lanuzza, Giuseppe Cocorullo:
Variable precision arithmetic circuits for FPGA-based multimedia processors. IEEE Trans. Very Large Scale Integr. Syst. 12(9): 995-999 (2004) - 2003
- [j3]Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo:
A high-speed energy-efficient 64-bit reconfigurable binary adder. IEEE Trans. Very Large Scale Integr. Syst. 11(5): 939-943 (2003) - [c9]Pasquale Corsonello, Stefania Perri, Maria Antonia Iachino, Giuseppe Cocorullo:
Variable Precision Multipliers for FPGA-Based Reconfigurable Computing Systems. FPL 2003: 661-669 - 2002
- [j2]Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo:
VLSI circuits for low-power high-speed asynchronous addition. IEEE Trans. Very Large Scale Integr. Syst. 10(5): 608-613 (2002) - [c8]Gregorio Cappuccino, Giuseppe Cocorullo:
Operating Region Modelling and Timing Analysis of CMOS Gates Driving Transmission Lines. PATMOS 2002: 438-447 - 2001
- [c7]Gregorio Cappuccino, Giuseppe Cocorullo:
CMOS sizing rule for high performance long interconnects. DATE 2001: 817 - [c6]Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo, Gregorio Cappuccino, Giovanni Staino:
VLSI implementation of a fully static CMOS 56-bit self-timed adder using overlapped execution circuits. ICECS 2001: 723-727 - [c5]Gregorio Cappuccino, Pasquale Corsonello, Giuseppe Cocorullo, Stefania Perri, Giovanni Staino:
Dynamic power of CMOS gates driving lossy transmission lines. ICECS 2001: 1579-1582 - 2000
- [c4]Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo:
Designing High-Speed Asynchronous Pipelines. EUROMICRO 2000: 1394-1399 - [c3]Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo:
VLSI Implementation of a Low-Power High-Speed Self-Timed Adder. PATMOS 2000: 195-204
1990 – 1999
- 1999
- [c2]Gregorio Cappuccino, Giuseppe Cocorullo:
A Time-Domain Model for Power Dissipation of CMOS Buffers Driving Lossy Transmission Lines. EUROMICRO 1999: 1204-1208 - [c1]Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo:
A 56-bit self-timed adder for high speed asynchronous datapath. ICECS 1999: 37-41 - 1998
- [j1]Gregorio Cappuccino, Pasquale Corsonello, Giuseppe Cocorullo:
High performance VLSI modules for division and square root. Microprocess. Microsystems 22(5): 239-246 (1998)
Coauthor Index
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