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ORCIDIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 42
Volume 42, Number 1, January 2023
- Halima Najibi, Alexandre Levisse
, Giovanni Ansaloni, Marina Zapater, Miroslav Vasic, David Atienza:
Thermal and Voltage-Aware Performance Management of 3-D MPSoCs With Flow Cell Arrays and Integrated SC Converters. 2-15 - Mingye Fu, Nianhua Jiang, Jens Bornemann, Quanyuan Feng:
Accurate Simulation of High-Gain MMIC Amplifiers With Microstrip-Type Transistors. 16-26 - Pruthvy Yellu, Qiaoyan Yu:
Securing Approximate Computing Systems via Obfuscating Approximate-Precise Boundary. 27-40 - Zhijian He, Xueli Fan, Yun Peng, Zhaoyan Shen, Jianhao Jiao, Ming Liu:
EmPointMovSeg: Sparse Tensor-Based Moving-Object Segmentation in 3-D LiDAR Point Clouds for Autonomous Driving-Embedded System. 41-53 - Wei-Kai Liu, Benjamin Tan, Jason M. Fung, Ramesh Karri, Krishnendu Chakrabarty:
Hardware-Supported Patching of Security Bugs in Hardware IP Blocks. 54-67 - Kejun Chen, Orlando Arias, Xiaolong Guo, Qingxu Deng, Yier Jin:
IP-Tag: Tag-Based Runtime 3PIP Hardware Trojan Detection in SoC Platforms. 68-81 - Sebin Shaji Philip, Roberto Passerone, Kasim Sinan Yildirim, Davide Brunelli:
Intermittent Computing Emulation of Ultralow-Power Processors: Evaluation of Backup Strategies for RISC-V. 82-94 - Sivert T. Sliper, William Wang, Nikos Nikoleris, Alex S. Weddell, Anand Savanth, Pranay Prabhat, Geoff V. Merrett:
Pragmatic Memory-System Support for Intermittent Computing Using Emerging Nonvolatile Memory. 95-108 - Fengbin Tu, Yiqi Wang, Ling Liang, Yufei Ding, Leibo Liu, Shaojun Wei, Shouyi Yin, Yuan Xie:
SDP: Co-Designing Algorithm, Dataflow, and Architecture for In-SRAM Sparse NN Acceleration. 109-121 - Wei Zhao, Jie Xu, Xueliang Wei, Bing Wu, Chengning Wang, Weilin Zhu, Wei Tong, Dan Feng, Jingning Liu:
A Low-Latency and High-Endurance MLC STT-MRAM-Based Cache System. 122-135 - Zhe Zhou, Junlin Liu, Zhenyu Gu, Guangyu Sun:
Energon: Toward Efficient Acceleration of Transformers Using Dynamic Sparse Attention. 136-149 - Tao Yang, Dongyue Li, Fei Ma, Zhuoran Song, Yilong Zhao, Jiaxi Zhang, Fangxin Liu, Li Jiang:
PASGCN: An ReRAM-Based PIM Design for GCN With Adaptively Sparsified Graphs. 150-163 - Jingsong Chen, Jian Kuang, Guowei Zhao, Dennis J.-H. Huang, Evangeline F. Y. Young:
PROS 2.0: A Plug-In for Routability Optimization and Routed Wirelength Estimation Using Deep Learning. 164-177 - Hao Geng, Tinghuan Chen, Yuzhe Ma, Binwu Zhu, Bei Yu:
PTPT: Physical Design Tool Parameter Tuning via Multi-Objective Bayesian Optimization. 178-189 - Kai Huang, Bowen Li, Siang Chen, Luc Claesen, Wei Xi, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong, Xiaolang Yan:
Structured Term Pruning for Computational Efficient Neural Networks Inference. 190-203 - Fangxin Liu, Zongwu Wang, Yongbiao Chen, Zhezhi He, Tao Yang, Xiaoyao Liang, Li Jiang:
SoBS-X: Squeeze-Out Bit Sparsity for ReRAM-Crossbar-Based Neural Network Accelerator. 204-217 - Wenze Yao, Haojie Zhao, Chengyang Hou, Wei Liu, Hongcheng Xu, Xin Zhang, Jing Xiao, Jie Liu:
Efficient Proximity Effect Correction Using Fast Multipole Method With Unequally Spaced Grid for Electron Beam Lithography. 218-228 - Nikita Mirchandani, Yuqing Zhang, Safaa A. Abdelfattah, Marvin Onabajo, Aatmesh Shrivastava:
Modeling and Simulation of Circuit-Level Nonidealities for an Analog Computing Design Approach With Application to EEG Feature Extraction. 229-242 - Jianwang Zhai, Chen Bai, Binwu Zhu, Yici Cai, Qiang Zhou, Bei Yu:
McPAT-Calib: A RISC-V BOOM Microarchitecture Power Modeling Framework. 243-256 - Tong Wu, Jing Guo:
A Multiscale Simulation Approach for Germanium-Hole-Based Quantum Processor. 257-265 - Abhishek Patyal, Hung-Ming Chen, Mark Po-Hung Lin, Guan-Qi Fang, Simon Yi-Hung Chen:
Pole-Aware Analog Layout Synthesis Considering Monotonic Current Flows and Wire Crossings. 266-279 - Jinghan Zhang, Aly Sultan, Mehrshad Zandigohar, Gunar Schirner:
Generating Unified Platforms Using Multigranularity Domain DSE (MG-DmDSE) Exploiting Application Similarities. 280-293 - Manobendra Nath Mondal, Susmita Sur-Kolay, Bhargab B. Bhattacharya:
Test Optimization in Memristor Crossbars Based on Path Selection. 294-307 - Youngkwang Lee, Donghyun Han, Sooryeong Lee, Sungho Kang:
Novel Error-Tolerant Voltage-Divider-Based Through-Silicon-Via Test Architecture. 308-321 - Zhaohui Chen, Yuan Ma, Jiwu Jing:
Low-Cost Shuffling Countermeasures Against Side-Channel Attacks for NTT-Based Post-Quantum Cryptography. 322-326 - Xing Huang, Youlin Pan, Zhen Chen, Wenzhong Guo, Lu Wang, Qingshan Li, Robert Wille, Tsung-Yi Ho, Ulf Schlichtmann:
Design Automation for Continuous-Flow Lab-on-a-Chip Systems: A One-Pass Paradigm. 327-331 - Youngbeom Jung, Hyeonuk Kim, Seungkyu Choi, Jaekang Shin, Lee-Sup Kim:
Energy-Efficient CNN Personalized Training by Adaptive Data Reformation. 332-336 - Girish Pahwa, Ayushi Sharma, Ravi Goel, Garima Gill, Harshit Agarwal, Yogesh Singh Chauhan, Chenming Hu:
Robust Compact Model of High-Voltage MOSFET's Drift Region. 337-340 - Irith Pomeranz:
Topping Off Test Sets Under Bounded Transparent Scan. 341-345
Volume 42, Number 2, February 2023
- Biao He, Shuhan Zhang, Yifan Wang, Tianning Gao, Fan Yang, Changhao Yan, Dian Zhou, Zhaori Bi, Xuan Zeng:
A Batched Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-Fidelity Modeling. 347-359 - Zhengqi Gao, Fa Wang, Jun Tao, Yangfeng Su, Xuan Zeng, Xin Li:
Correlated Bayesian Model Fusion: Efficient High-Dimensional Performance Modeling of Analog/RF Integrated Circuits Over Multiple Corners. 360-370 - Jingbo Zhou, Xinmiao Zhang:
Algorithmic Obfuscation for LDPC Decoders. 371-383 - Animesh Basak Chowdhury, Anushree Mahapatra, Deepraj Soni, Ramesh Karri:
Fuzzing+Hardware Performance Counters-Based Detection of Algorithm Subversion Attacks on Postquantum Signature Schemes. 384-396 - Aritra Bhattacharyay, Shuo Yang, Jonathan Cruz, Prabuddha Chakraborty, Swarup Bhunia, Tamzidul Hoque:
An Automated Framework for Board-Level Trojan Benchmarking. 397-410 - Sheel Sindhu Manohar, Hemangee K. Kapoor:
CAPMIG: Coherence-Aware Block Placement and Migration in Multiretention STT-RAM Caches. 411-422 - Chenlin Ma, Hao Yang, Shangyu Wu, Yi Wang, Rui Mao:
Tidal-Tree-Mem: Toward Read-Intensive Key-Value Stores With Tidal Structure Based on LSM-Tree. 423-436 - Xiangzhen Zhou, Yuan Feng, Sanjiang Li:
Supervised Learning Enhanced Quantum Circuit Transformation. 437-447 - Wujian Ye, Yuehai Chen, Yijun Liu:
The Implementation and Optimization of Neuromorphic Hardware for Supporting Spiking Neural Networks With MLP and CNN Topologies. 448-461 - Christian Pilato, Luca Collini, Luca Cassano, Donatella Sciuto, Siddharth Garg, Ramesh Karri:
Optimizing the Use of Behavioral Locking for High-Level Synthesis. 462-472 - Yu-Shan Huang, Jie-Hong R. Jiang, Alan Mishchenko:
Quantized Neural Network Synthesis for Direct Logic Circuit Implementation. 473-482 - Shayan Hassantabar, Prerit Terway, Niraj K. Jha:
TUTOR: Training Neural Networks Using Decision Rules as Model Priors. 483-496 - Renjian Pan, Xin Li, Krishnendu Chakrabarty:
Unsupervised Two-Stage Root-Cause Analysis With Transfer Learning for Integrated Systems. 497-508 - Tao Yang, Fei Ma, Xiaoling Li, Fangxin Liu, Yilong Zhao, Zhezhi He, Li Jiang:
DTATrans: Leveraging Dynamic Token-Based Quantization With Accuracy Compensation Mechanism for Efficient Transformer Architecture. 509-520 - Sugil Lee, Mohammed E. Fouda, Jongeun Lee, Ahmed M. Eltawil, Fadi J. Kurdahi:
Offline Training-Based Mitigation of IR Drop for ReRAM-Based Deep Neural Network Accelerators. 521-532 - Philipp Ebner, Gerold Fink, Robert Wille:
Channel Routing for Microfluidic Devices: A Comprehensive and Accessible Design Tool. 533-543 - Tianshu Hou, Peining Zhen, Ngai Wong, Quan Chen, Guoyong Shi, Shuqi Wang, Hai-Bao Chen:
Multilayer Perceptron-Based Stress Evolution Analysis Under DC Current Stressing for Multisegment Wires. 544-557 - Seokki Son, Camilla La Torre, Andreas Kindsmüller, Vikas Rana, Stephan Menzel:
A Study of the Electroforming Process in 1T1R Memory Arrays. 558-568 - Yun-Jhe Jiang, Shao-Yun Fang:
COALA: Concurrently Assigning Wire Segments to Layers for 2-D Global Routing. 569-582 - Shiju Lin, Jinwei Liu, Evangeline F. Y. Young, Martin D. F. Wong:
GAMER: GPU-Accelerated Maze Routing. 583-593 - Ziyang Yu, Guojin Chen, Yuzhe Ma, Bei Yu:
A GPU-Enabled Level-Set Method for Mask Optimization. 594-605 - Irina Alam, Tianmu Li, Sean Brock, Puneet Gupta:
DRDebug: Automated Design Rule Debugging. 606-615 - An Zou, Yehan Ma, Karthik Garimella, Benjamin Lee, Christopher D. Gill, Xuan Zhang:
F-LEMMA: Fast Learning-Based Energy Management for Multi-/Many-Core Processors. 616-629 - Jihe Wang, Hao Chen, Danghui Wang, Kuizhi Mei, Shengbing Zhang, Xiaoya Fan:
A Noise-Driven Heterogeneous Stochastic Computing Multiplier for Heuristic Precision Improvement in Energy-Efficient DNNs. 630-643 - Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui:
Tight Compression: Compressing CNN Through Fine-Grained Pruning and Weight Permutation for Efficient Implementation. 644-657 - Martin Kumm, Anastasia Volkova, Silviu-Ioan Filip:
Design of Optimal Multiplierless FIR Filters With Minimal Number of Adders. 658-671 - Xingyu Meng, Kshitij Raj, Sandip Ray, Kanad Basu:
SeVNoC: Security Validation of System-on-Chip Designs With NoC Fabrics. 672-682 - Marleson Graf, Gabriel A. G. Andrade, Luiz C. V. dos Santos:
EveCheck: An Event-Driven, Scalable Algorithm for Coherent Shared Memory Verification. 683-696
Volume 42, Number 3, March 2023
- Xiaohan Gao, Haoyi Zhang, Mingjie Liu, Linxiao Shen, David Z. Pan, Yibo Lin, Runsheng Wang, Ru Huang:
Interactive Analog Layout Editing With Instant Placement and Routing Legalization. 698-711 - Zahra Ebrahimi, Muhammad Zaid, Mark Wijtvliet, Akash Kumar:
RAPID: Approximate Pipelined Soft Multipliers and Dividers for High Throughput and Energy Efficiency. 712-725 - Rana Elnaggar, Jayeeta Chaudhuri, Ramesh Karri, Krishnendu Chakrabarty:
Learning Malicious Circuits in FPGA Bitstreams. 726-739 - Yang-Lin Zheng, Wei-Yi Yang, Ya-Shu Chen, Ding-Hung Han:
An Energy-Efficient Inference Engine for a Configurable ReRAM-Based Neural Network Accelerator. 740-753 - Jie Zou, Xiaotian Dai, John A. McDermid:
reTSN: Resilient and Efficient Time-Sensitive Network for Automotive In-Vehicle Communication. 754-767 - Jinhua Cui, Zhimin Zeng, Jianhang Huang, Weiqi Yuan, Laurence T. Yang:
Improving 3-D NAND SSD Read Performance by Parallelizing Read-Retry. 768-780 - Shien Zhu, Luan H. K. Duong, Hui Chen, Di Liu, Weichen Liu:
FAT: An In-Memory Accelerator With Fast Addition for Ternary Weight Neural Networks. 781-794 - Rui-Xuan Zheng, Ya-Cheng Ko, Tsung-Te Liu:
A Speculative Computation Approach for Energy-Efficient Deep Neural Network. 795-806 - Jiaqi Gu, Chenghao Feng, Hanqing Zhu, Zheng Zhao, Zhoufeng Ying, Mingjie Liu, Ray T. Chen, David Z. Pan:
SqueezeLight: A Multi-Operand Ring-Based Optical Neural Network With Cross-Layer Scalability. 807-819 - Hanqing Zhu, Jiaqi Gu, Chenghao Feng, Mingjie Liu, Zixuan Jiang, Ray T. Chen, David Z. Pan:
ELight: Toward Efficient and Aging-Resilient Photonic In-Memory Neurocomputing. 820-833 - Yuhang Zhang, Guanghui He, Kea-Tiong Tang, Yongfu Li, Guoxing Wang:
GEM: A Generalized Memristor Device Modeling Framework Based on Neural Network for Transient Circuit Simulation. 834-846 - Rui Xu, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Yuhong Song, Han Wang, Liang Shi:
Optimizing Data Placement for Hybrid SRAM+Racetrack Memory SPM in Embedded Systems. 847-859 - Thomas Grurl, Jürgen Fuß, Robert Wille:
Noise-Aware Quantum Circuit Simulation With Decision Diagrams. 860-873 - Chen Yin, Naifeng Jing, Jianfei Jiang, Qin Wang, Zhigang Mao:
A Reschedulable Dataflow-SIMD Execution for Increased Utilization in CGRA Cross-Domain Acceleration. 874-886 - Dekui Wang, Jun Feng, Wei Zhou, Xingxing Hao, Xiaodan Zhang:
FCRoute: A Fast FPGA Connection Router Using Soft Routing-Space Pruning Algorithm. 887-899 - Nan Wu, Yuan Xie, Cong Hao:
IronMan-Pro: Multiobjective Design Space Exploration in HLS via Reinforcement Learning and Graph Neural Network-Based Modeling. 900-913 - Shubham Rai, Alessandro Tempia Calvino, Heinz Riener, Giovanni De Micheli, Akash Kumar:
Utilizing XMG-Based Synthesis to Preserve Self-Duality for RFET-Based Circuits. 914-927 - Xiaohui Wei, Bingyi Sun, Jiaxu Cui, Meikang Qiu:
Location-and-Preference Joint Prediction for Task Assignment in Spatial Crowdsourcing. 928-941 - Hairong Lin, Chunhua Wang, Cong Xu, Xin Zhang, Herbert H. C. Iu:
A Memristive Synapse Control Method to Generate Diversified Multistructure Chaotic Attractors. 942-955 - Junwei Sun, Jianling Yang, Peng Liu, Yanfeng Wang:
Design of General Flux-Controlled and Charge-Controlled Memristor Emulators Based on Hyperbolic Functions. 956-967 - Nithin Thomas Abraham, Gajendranath Chowdary, Dhanaraj Kakkanattu Jagalchandran:
State Separate Modular Modeling Methodology of Multioutput DC-DC Converters. 968-977 - Mourina Ghosh, Pulak Mondal, Shekhar Suman Borah, Santosh Kumar:
Resistorless Memristor Emulators: Floating and Grounded Using OTA and VDBA for High-Frequency Applications. 978-986 - Daijoon Hyun, Younggwang Jung, Youngsoo Shin:
Airgap Insertion and Layer Reassignment Under Setup and Hold Timing Constraints. 987-999 - Hao-Chiang Shao, Hsing-Lei Ping, Kuo-Shiuan Chen, Weng-Tai Su, Chia-Wen Lin, Shao-Yun Fang, Pin-Yian Tsai, Yan-Hsiu Liu:
Keeping Deep Lithography Simulators Updated: Global-Local Shape-Based Novelty Detection and Active Learning. 1000-1014 - Hao Zhang, Weifeng He, Yanan Sun, Mingoo Seok:
A DFT-Compatible In-Situ Timing Error Detection and Correction Structure Featuring Low Area and Test Overhead. 1015-1028
Volume 42, Number 4, April 2023
- Qing Zhang, Xinzi Xu, Yuhang Zhang, Wei Lu, Yongfu Li:
CompressKey - Near Lossless Layout Compression and Encryption Using Convolutional Auto-Encoder Model and Expansion-Reduction Pattern Techniques. 1030-1043 - Leon Li, Alex Orailoglu:
Redundancy Attack: Breaking Logic Locking Through Oracleless Rationality Analysis. 1044-1057 - Zelin Du, Qianling Zhang, Mao Lin, Shiqing Li, Xin Li, Lei Ju:
A Comprehensive Memory Management Framework for CPU-FPGA Heterogenous SoCs. 1058-1071 - Zhuo Su, Dongyan Wang, Zehong Yu, Yixiao Yang, Yu Jiang, Rui Wang, Wanli Chang, Wen Li, Aiguo Cui, Jia-Guang Sun:
PHCG: Optimizing Simulink Code Generation for Embedded System With SIMD Instructions. 1072-1084 - Ayush Arunachalam, Shamik Kundu, Arnab Raha, Suvadeep Banerjee, Suriyaprakash Natarajan, Kanad Basu:
A Novel Low-Power Compression Scheme for Systolic Array-Based Deep Learning Accelerators. 1085-1098 - Xunzhao Yin, Yu Qian, Mohsen Imani, Kai Ni, Chao Li, Grace Li Zhang, Bing Li, Ulf Schlichtmann, Cheng Zhuo:
Ferroelectric Ternary Content Addressable Memories for Energy-Efficient Associative Search. 1099-1112 - Lukas Burgholzer, Alexander Ploier, Robert Wille:
Simulation Paths for Quantum Circuit Simulation With Decision Diagrams What to Learn From Tensor Networks, and What Not. 1113-1122 - Sakari Lahti, Matti Rintala, Timo D. Hämäläinen:
Leveraging Modern C++ in High-Level Synthesis. 1123-1132 - Sayandip De, Muhammad Shafique, Henk Corporaal:
Delay Prediction for ASIC HLS: Comparing Graph-Based and Nongraph-Based Learning Models. 1133-1146 - Elbruz Ozen, Alex Orailoglu:
Unleashing the Potential of Sparse DNNs Through Synergistic Hardware-Sparsity Co-Design. 1147-1160 - Haoran Xu, Haoran Fan, Bo Jiang, Jianfei Chen, Qiaoling Tong, Xuecheng Zou:
ML-Accelerated Yield Analysis Framework Using Regularization for Sparsity in High-Sigma and High-Dimensional Scenarios. 1161-1170 - Zhiyao Xie, Jingyu Pan, Chen-Chia Chang, Jiang Hu, Yiran Chen:
The Dark Side: Security and Reliability Concerns in Machine Learning for EDA. 1171-1184 - Huming Qiu, Hua Ma, Zhi Zhang, Yansong Gao, Yifeng Zheng, Anmin Fu, Pan Zhou, Derek Abbott, Said F. Al-Sarawi:
RBNN: Memory-Efficient Reconfigurable Deep Binary Neural Network With IP Protection for Internet of Things. 1185-1198 - Ran Chen, Shoubo Hu, Zhitang Chen, Shengyu Zhu, Bei Yu, Pengyun Li, Cheng Chen, Yu Huang, Jianye Hao:
A Unified Framework for Layout Pattern Analysis With Deep Causal Estimation. 1199-1211 - Mahmoud Elfar, Yi-Chen Chang, Harrison Hao-Yu Ku, Tung-Che Liang, Krishnendu Chakrabarty, Miroslav Pajic:
Deep Reinforcement Learning-Based Approach for Efficient and Reliable Droplet Routing on MEDA Biochips. 1212-1222 - Shan Shen, Peng Cao, Ming Ling, Longxing Shi:
A Timing Yield Model for SRAM Cells at Sub/Near-Threshold Voltages Based on a Compact Drain Current Model. 1223-1234 - Ying Zhang, Zhiqiang Zhao, Zhuo Feng:
SF-SGL: Solver-Free Spectral Graph Learning From Linear Measurements. 1235-1249 - JiaHao Wei, Haihua Wang, Tian Zhao, Yu-Long Jiang, Jing Wan:
A New Compact MOSFET Model Based on Artificial Neural Network With Unique Data Preprocessing and Sampling Techniques. 1250-1254 - Yu-Jin Xie, Wai-Kei Mak:
Drain-to-Drain Abutment-Aware Detailed Placement Refinement for Power Staple Insertion Optimization. 1255-1267 - A. K. Thasreefa, Abhishek Patyal, Hao-Yu Chi, Mark Po-Hung Lin, Hung-Ming Chen:
On Reducing LDE Variations in Modern Analog Placement. 1268-1279 - Fengkai Yuan, Kai Wang, Jiameng Ying, Rui Hou, Lutan Zhao, Peinan Li, Yifan Zhu, Zhenzhou Ji, Dan Meng:
Architecting the Autocuckoo Filter to Defend Against Cross-Core Cache Attacks. 1280-1294 - Anthony Agnesina, Kyungwook Chang, Sung Kyu Lim:
Parameter Optimization of VLSI Placement Through Deep Reinforcement Learning. 1295-1308 - Dimitrios Mangiras, David G. Chinnery, Giorgos Dimitrakopoulos:
Task-Based Parallel Programming for Gate Sizing. 1309-1322 - Tong-Yu Hsieh, Chun-Chao Cheng, Wei-Ji Chao, Pin-Xuan Wu:
On Development of Reliable Machine Learning Systems Based on Machine Error Tolerance of Input Images. 1323-1335 - Irith Pomeranz:
Functionally Possible Scan-Based Test Set as a Dual of a Compressed Multicycle Test Set. 1336-1345