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Rijoy Mukherjee
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2020 – today
- 2024
- [i2]Sneha Swaroopa, Rijoy Mukherjee, Anushka Debnath, Rajat Subhra Chakraborty:
Evaluating Large Language Models for Automatic Register Transfer Logic Generation via High-Level Synthesis. CoRR abs/2408.02793 (2024) - 2023
- [j6]Rijoy Mukherjee, Rajat Subhra Chakraborty:
Attacks on Recent DNN IP Protection Techniques and Their Mitigation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3642-3650 (2023) - 2022
- [j5]Rijoy Mukherjee, Rajat Subhra Chakraborty:
Novel Hardware Trojan Attack on Activation Parameters of FPGA-Based DNN Accelerators. IEEE Embed. Syst. Lett. 14(3): 131-134 (2022) - [j4]Rijoy Mukherjee, Sree Ranjani Rajendran, Rajat Subhra Chakraborty:
A comprehensive survey of physical and logic testing techniques for Hardware Trojan detection and prevention. J. Cryptogr. Eng. 12(4): 495-522 (2022) - 2021
- [c4]Pranesh Santikellur, Rijoy Mukherjee, Rajat Subhra Chakraborty:
APUF-BNN: An Automated Framework for Efficient Combinational Logic Based Implementation of Arbiter PUF through Binarized Neural Network. ACM Great Lakes Symposium on VLSI 2021: 89-94 - 2020
- [j3]Rijoy Mukherjee, Vidya Govindan, Sandhya Koteshwara, Amitabh Das, Keshab K. Parhi, Rajat Subhra Chakraborty:
Probabilistic Hardware Trojan Attacks on Multiple Layers of Reconfigurable Network Infrastructure. J. Hardw. Syst. Secur. 4(4): 343-360 (2020) - [c3]Sree Ranjani Rajendran, Rijoy Mukherjee, Rajat Subhra Chakraborty:
SoK: Physical and Logic Testing Techniques for Hardware Trojan Detection. ASHES@CCS 2020: 103-116
2010 – 2019
- 2017
- [j2]Mrinal Goswami, Bibhash Sen, Rijoy Mukherjee, Biplab K. Sikdar:
Design of Testable Adder in Quantum-dot Cellular Automata with Fault Secure Logic. Microelectron. J. 60: 1-12 (2017) - 2016
- [j1]Bibhash Sen, Yashraj Sahu, Rijoy Mukherjee, Rajdeep Kumar Nath, Biplab K. Sikdar:
On the reliability of majority logic structure in quantum-dot cellular automata. Microelectron. J. 47: 7-18 (2016) - [c2]Bibhash Sen, Rajdeep Kumar Nath, Rijoy Mukherjee, Yashraj Sahu, Biplab K. Sikdar:
Towards Designing Reliable Universal QCA Logic in the Presence of Cell Deposition Defect. VLSID 2016: 575-576 - [i1]Pritam P. Chougule, Bibhash Sen, Rijoy Mukherjee, Vijay C. Karade, P. S. Patil, Tukaram D. Dongale, Rajanish K. Kamat:
A Processing In-Memory Realization Using QCA: Proposal and Implementation. CoRR abs/1602.02249 (2016) - 2014
- [c1]Bibhash Sen, Rijoy Mukherjee, Rajdeep Kumar Nath, Biplab K. Sikdar:
Design of Fault Tolerant Universal Logic in QCA. ISED 2014: 166-170
Coauthor Index
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