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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 38
Volume 38, Number 1, January 2019
- Weichen Liu
, Juan Yi
, Mengquan Li
, Peng Chen, Lei Yang:
Energy-Efficient Application Mapping and Scheduling for Lifetime Guaranteed MPSoCs. 1-14 - Fuyang Li
, Keni Qiu, Mengying Zhao
, Jingtong Hu, Yongpan Liu
, Yong Guan, Chun Jason Xue:
Checkpointing-Aware Loop Tiling for Energy Harvesting Powered Nonvolatile Processors. 15-28 - Yen-Ting Chen
, Ming-Chang Yang
, Yuan-Hao Chang
, Tseng-Yi Chen
, Hsin-Wen Wei
, Wei-Kuan Shih
:
Co-Optimizing Storage Space Utilization and Performance for Key-Value Solid State Drives. 29-42 - Luan H. K. Duong
, Peng Yang, Zhifei Wang
, Yi-Shing Chang, Jiang Xu, Zhehui Wang
, Xuanqi Chen
:
Crosstalk Noise Reduction Through Adaptive Power Control in Inter/Intra-Chip Optical Networks. 43-56 - Jianlei Yang
, Xueyan Wang
, Qiang Zhou, Zhaohao Wang
, Hai Li
, Yiran Chen
, Weisheng Zhao:
Exploiting Spin-Orbit Torque Devices As Reconfigurable Logic for Circuit Obfuscation. 57-69 - Deepashree Sengupta
, Farhana Sharmin Snigdha
, Jiang Hu, Sachin S. Sapatnekar
:
An Analytical Approach for Error PMF Characterization in Approximate Circuits. 70-83 - Tianchen Wang
, Sandeep Kumar Samal
, Sung Kyu Lim
, Yiyu Shi:
Entropy Production-Based Full-Chip Fatigue Analysis: From Theory to Mobile Applications. 84-95 - Ioannis Seitanidis, Chrysostomos Nicopoulos
, Giorgos Dimitrakopoulos
:
Automatic Generation of Peak-Power Traffic for Networks-on-Chip. 96-108 - Jong Hwan Ko
, Duckhwan Kim
, Taesik Na
, Saibal Mukhopadhyay:
Design and Analysis of a Neural Network Inference Engine Based on Adaptive Weight Compression. 109-121 - Eric Schneider
, Hans-Joachim Wunderlich
:
SWIFT: Switch-Level Fault Simulation on GPUs. 122-135 - Shih-An Hsieh, Ying-Hsu Wang, Ting-Yu Shen, Kuan-Yen Huang, Chia-Cheng Pai, Tsai-Chieh Chen
, James Chien-Mo Li
:
DR-Scan: Dual-Rail Asynchronous Scan DfT and ATPG. 136-148 - Xuanle Ren
, Francisco Pimentel Torres
, Ronald D. Blanton
, Vítor Grade Tavares
:
IC Protection Against JTAG-Based Attacks. 149-162 - Yangdi Lyu
, Xiaoke Qin, Mingsong Chen
, Prabhat Mishra
:
Directed Test Generation for Validation of Cache Coherence Protocols. 163-176 - Amina Qureshi
, Osman Hasan
:
Formal Probabilistic Analysis of Low Latency Approximate Adders. 177-189 - Jaewon Jang, Minho Cheong
, Sungho Kang
:
TSV Repair Architecture for Clustered Faults. 190-194
Volume 38, Number 2, February 2019
- Philip Brisk
, Suman Chakraborty, Claudionor Coelho, Abdoulaye Gamatié, Swaroop Ghosh, Xun Jiao:
TCAD EIC Message: February 2019. 197-198 - Yang Xie
, Ankur Srivastava
:
Anti-SAT: Mitigating SAT Attack on Logic Locking. 199-207 - Hai Huang, Leibo Liu
, Qihuan Huang, Yingjie Chen, Shouyi Yin
, Shaojun Wei
:
Low Area-Overhead Low-Entropy Masking Scheme (LEMS) Against Correlation Power Analysis Attack. 208-219 - Da-Wei Chang
, Ing-Chao Lin
, Yi-Chiao Lin, Wen-Zhi Huang:
OCMAS: Online Page Clustering for Multibank Scratchpad Memory. 220-233 - Yi Wang
, Jiangfan Huang, Jing Yang, Tao Li:
A Temperature-Aware Reliability Enhancement Strategy for 3-D Charge-Trap Flash Memory. 234-244 - Bijan Alizadeh
, Seyyed Reza Sharafinejad
:
Incremental SAT-Based Accurate Auto-Correction of Sequential Circuits Through Automatic Test Pattern Generation. 245-252 - Sudip Poddar
, Sukanta Bhattacharjee
, Subhas C. Nandy, Krishnendu Chakrabarty
, Bhargab B. Bhattacharya:
Optimization of Multi-Target Sample Preparation On-Demand With Digital Microfluidic Biochips. 253-266 - Yu-Hsuan Su, Yao-Wen Chang
:
DSA-Compliant Routing for 2-D Patterns Using Block Copolymer Lithography. 267-280 - Guoqi Xie
, Gang Zeng
, Ryo Kurachi
, Hiroaki Takada
, Zhetao Li
, Renfa Li
, Keqin Li
:
WCRT Analysis and Evaluation for Sporadic Message-Processing Tasks in Multicore Automotive Gateways. 281-294 - Farhana Sharmin Snigdha
, Deepashree Sengupta
, Jiang Hu, Sachin S. Sapatnekar
:
Dynamic Approximation of JPEG Hardware. 295-308 - Kuen-Jong Lee
, Bo-Ren Chen
, Michael Andreas Kochte
:
On-Chip Self-Test Methodology With All Deterministic Compressed Test Patterns Recorded in Scan Chains. 309-321 - Matthew Layne Beckler
, Ronald D. Blanton
:
On-Chip Diagnosis of Generalized Delay Failures Using Compact Fault Dictionaries. 322-334 - Irith Pomeranz
:
Diagnostic Test Generation That Addresses Diagnostic Holes. 335-344 - Irith Pomeranz
:
LFSR-Based Test Generation for Path Delay Faults. 345-353 - Cunxi Yu
, Maciej J. Ciesielski:
Formal Analysis of Galois Field Arithmetic Circuits-Parallel Verification and Reverse Engineering. 354-365 - Yu-Yun Dai
, Robert K. Brayton
:
Verification and Synthesis of Clock-Gated Circuits. 366-379 - Gianpiero Cabodi
, Paolo Camurati
, Marco Palena
, Paolo Pasini
, Danilo Vendraminetto
:
Logic Synthesis for Interpolant Circuit Compaction. 380-384 - Xiaowen Wang
, William H. Robinson
:
Error Estimation and Error Reduction With Input-Vector Profiling for Timing Speculation in Digital Circuits. 385-389
Volume 38, Number 3, March 2019
- Siqi Wang
, Gayathri Ananthanarayanan
, Tulika Mitra
:
OPTiC: Optimizing Collaborative CPU-GPU Computing on Mobile Devices With Thermal Constraints. 393-406 - Max Willsey
, Vincent T. Lee
, Alvin Cheung
, Rastislav Bodík, Luis Ceze
:
Iterative Search for Reconfigurable Accelerator Blocks With a Compiler in the Loop. 407-418 - Mustafa Efendioglu, Alper Sen
, Yavuz Köroglu
:
Bug Prediction of SystemC Models Using Machine Learning. 419-429 - Joydeb Mandal
, Mrinal Kanti Mandal
:
Computer-Aided Design of a Switchable True Time Delay (TTD) Line With Shunt Open-Stubs. 430-438 - Anteneh Gebregiorgis
, Rajendra Bishnoi
, Mehdi Baradaran Tahoori:
A Comprehensive Reliability Analysis Framework for NTC Caches: A System to Device Approach. 439-452 - JuHyung Hong
, Jeongbin Kim
, Sangwoo Han, Eui-Young Chung
:
A Locality-Aware Compression Scheme for Highly Reliable Embedded Systems. 453-465 - Sajjad Tamimi
, Zahra Ebrahimi
, Behnam Khaleghi
, Hossein Asadi
:
An Efficient SRAM-Based Reconfigurable Architecture for Embedded Processors. 466-479 - Scott C. Wolfson
, Fat D. Ho:
2-D Modeling of Dual-Gate MOSFET Devices Using Quintic Splines. 480-488 - Feilong Zhang
, Chenkun Wang
, Fei Lu
, Qi Chen
, Cheng Li, X. Shawn Wang
, Daguang Li, Albert Z. Wang
:
A Full-Chip ESD Protection Circuit Simulation and Fast Dynamic Checking Method Using SPICE and ESD Behavior Models. 489-498 - Jaime Octavio Guerra-Pulido
, Pablo Roberto Pérez-Alcázar
:
Time-Domain Numerical Simulation of Electronic Circuits and Surface Acoustic Wave Devices Using Their Admittance Parameters. 499-511 - Jin-Tai Yan
:
Layer Assignment of Buses and Nets With Via-Count Constraint in High-Speed PCB Designs. 512-525 - Dawon Park
, Younghyun Kim
:
Fast Pareto Front Exploration for Design of Reconfigurable Energy Storage. 526-537 - Mathieu Da Silva
, Marie-Lise Flottes
, Giorgio Di Natale
, Bruno Rouzeyre:
Preventing Scan Attacks on Secure Circuits Through Scan Chain Encryption. 538-550 - Keewon Cho
, Young-Woo Lee, Sungyoul Seo
, Sungho Kang
:
An Efficient BIRA Utilizing Characteristics of Spare Pivot Faults. 551-561 - Gurgen Harutyunyan
, Samvel K. Shoukourian, Yervant Zorian:
Fault Awareness for Memory BIST Architecture Shaped by Multidimensional Prediction Mechanism. 562-575 - Utkarsh Gupta
, Priyank Kalla
, Vikas Rao:
Boolean Gröbner Basis Reductions on Finite Field Datapath Circuits Using the Unate Cube Set Algebra. 576-588
Volume 38, Number 4, April 2019
- Jack Tang
, Mohamed Ibrahim
, Krishnendu Chakrabarty
, Ramesh Karri
:
Toward Secure and Trustworthy Cyberphysical Microfluidic Biochips. 589-603 - Anirban Sengupta
, Deepak Kachave
, Dipanjan Roy
:
Low Cost Functional Obfuscation of Reusable IP Ores Used in CE Hardware Through Robust Locking. 604-616 - Yi Wang
, Mingxu Zhang, Xuan Yang, Tao Li:
A Thermal-Aware Physical Space Reallocation for Open-Channel SSD With 3-D Flash Memory. 617-627 - Mohsen Imani
, Saransh Gupta
, Sahil Sharma, Tajana Simunic Rosing:
NVQuery: Efficient Query Processing in Nonvolatile Memory. 628-639 - Guohao Dai
, Tianhao Huang, Yuze Chi, Jishen Zhao, Guangyu Sun, Yongpan Liu
, Yu Wang
, Yuan Xie
, Huazhong Yang:
GraphH: A Processing-in-Memory Architecture for Large-Scale Graph Processing. 640-653 - Ananya Singla, Varsha Agarwal
, Sudip Roy
, Arijit Mondal:
Reliability Analysis of Mixture Preparation Using Digital Microfluidic Biochips. 654-667 - Nitin Rathi
, Priyadarshini Panda
, Kaushik Roy:
STDP-Based Pruning of Connections and Weight Quantization in Spiking Neural Networks for Energy-Efficient Recognition. 668-677 - Shouyi Yin
, Shibin Tang, Xinhan Lin, Peng Ouyang, Fengbin Tu
, Leibo Liu
, Shaojun Wei
:
A High Throughput Acceleration for Hybrid Neural Networks With Efficient Resource Management on FPGA. 678-691 - Jody Maick Matos
, Jordi Carrabina
, André Inácio Reis:
Efficiently Mapping VLSI Circuits With Simple Cells. 692-704 - Grace Li Zhang
, Bing Li
, Yiyu Shi, Jiang Hu, Ulf Schlichtmann
:
EffiTest2: Efficient Delay Test and Prediction for Post-Silicon Clock Skew Configuration Under Process Variations. 705-718 - Kevin E. Murray
, Andrea Suardi, Vaughn Betz, George A. Constantinides:
Calculated Risks: Quantifying Timing Error Probability With Extended Static Timing Analysis. 719-732 - Francisco E. Rangel-Patino
, José Ernesto Rayas-Sánchez
, Andres Viveros-Wacher
, José Luis Chavez-Hurtado
, Edgar-Andrei Vega-Ochoa, Nagib Hakim:
Post-Silicon Receiver Equalization Metamodeling by Artificial Neural Networks. 733-740 - Georgios Zacharopoulos
, Lorenzo Ferretti
, Emanuele Giaquinta
, Giovanni Ansaloni
, Laura Pozzi
:
RegionSeeker: Automatically Identifying and Selecting Accelerators From Application Source Code. 741-754 - Maoxiang Yi
, Jingchang Bian
, Tianming Ni, Cuiyun Jiang, Hao Chang
, Huaguo Liang:
A Pulse Shrinking-Based Test Solution for Prebond Through Silicon via in 3-D ICs. 755-766 - Yun Cheng
, Huawei Li
, Ying Wang
, Xiaowei Li
:
Cluster Restoration-Based Trace Signal Selection for Post-Silicon Debug. 767-779 - Wenhui Zhang
, Qiang Cao
, Zhonghai Lu
:
Bit-Flipping Schemes Upon MLC Flash: Investigation, Implementation, and Evaluation. 780-784
Volume 38, Number 5, May 2019
- Xiaowei Xu
, Feng Lin
, Wenyao Xu
, Xinwei Yao
, Yiyu Shi, Dewen Zeng, Yu Hu:
MDA: A Reconfigurable Memristor-Based Distance Accelerator for Time Series Mining on Data Centers. 785-797 - Christian Pilato
, Kaijie Wu, Siddharth Garg, Ramesh Karri
, Francesco Regazzoni
:
TaintHLS: High-Level Synthesis for Dynamic Information Flow Tracking. 798-808 - Yuanwen Huang
, Prabhat Mishra
:
Vulnerability-Aware Energy Optimization for Reconfigurable Caches in Multitasking Systems. 809-821 - Suzhen Wu, Haijun Li, Bo Mao
, Xiaoxi Chen, Kuan-Ching Li
:
Overcome the GC-Induced Performance Variability in SSD-Based RAIDs With Request Redirection. 822-833 - Ming Cheng
, Lixue Xia
, Zhenhua Zhu, Yi Cai, Yuan Xie
, Yu Wang
, Huazhong Yang
:
TIME: A Training-in-Memory Architecture for RRAM-Based Deep Neural Networks. 834-847 - Alwin Zulehner
, Robert Wille
:
Advanced Simulation of Quantum Computations. 848-859 - Han-Yi Lin, Jen-Wei Hsieh
:
Revive Bad Flash-Memory Pages by HLC Scheme. 860-873 - Sukanta Bhattacharjee
, Ansuman Banerjee
, Tsung-Yi Ho
, Krishnendu Chakrabarty
, Bhargab B. Bhattacharya:
Efficient Generation of Dilution Gradients With Digital Microfluidic Biochips. 874-887 - Sugil Lee
, Daewoo Kim, Dong Nguyen, Jongeun Lee
:
Double MAC on a DSP: Boosting the Performance of Convolutional Neural Networks on FPGAs. 888-897 - Sakari Lahti
, Panu Sjovall
, Jarno Vanne
, Timo D. Hämäläinen
:
Are We There Yet? A Study on the State of High-Level Synthesis. 898-911 - Leandro de Souza Rosa
, Christos-Savvas Bouganis
, Vanderlei Bonato
:
Scaling Up Modulo Scheduling for High-Level Synthesis. 912-925 - Augusto Neutzling
, Jody Maick Matos
, Alan Mishchenko, André Inácio Reis, Renato P. Ribas
:
Effective Logic Synthesis for Threshold Logic Circuit Design. 926-937 - Suhyeong Choi
, Seongbo Shim
, Youngsoo Shin
:
Neural Network Classifier-Based OPC With Imbalanced Training Data. 938-948 - Song Chen
, Qi Xu
, Bei Yu
:
Adaptive 3D-IC TSV Fault Tolerance Structure Generation. 949-960 - Wei-Ming Chen
, Sheng-Wei Cheng
, Pi-Cheng Hsiu
:
A User-Centric CPU-GPU Governing Framework for 3-D Mobile Games. 961-974 - Zois-Gerasimos Tasoulas
, Iraklis Anagnostopoulos
, Lazaros Papadopoulos
, Dimitrios Soudris
:
A Message-Passing Microcoded Synchronization for Distributed Shared Memory Architectures. 975-979 - Antara Ain
, Pallab Dasgupta
:
Interpreting Local Variables in AMS Assertions During Simulation. 980-984
Volume 38, Number 6, June 2019
- Ricardo Martins
, Nuno Lourenço
, Fábio Passos
, Ricardo Povoa
, António Canelas
, Elisenda Roca
, Rafael Castro-López
, Javier J. Sieiro
, Francisco V. Fernández
, Nuno Horta
:
Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop. 989-1002 - Adib Nahiyan
, Farimah Farahmandi
, Prabhat Mishra
, Domenic Forte
, Mark M. Tehranipoor:
Security-Aware FSM Design Flow for Identifying and Mitigating Vulnerabilities to Fault Attacks. 1003-1016 - Bo Mao
, Jindong Zhou
, Suzhen Wu, Hong Jiang
, Xiao Chen, Weijian Yang:
Improving Flash Memory Performance and Reliability for Smartphones With I/O Deduplication. 1017-1027 - Elham K. Moghaddam
, Nilanjan Mukherjee, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer
, Justyna Zawada:
Logic BIST With Capture-Per-Clock Hybrid Test Points. 1028-1041 - Daniele Jahier Pagliari
, Yves Durand, David Coriat, Edith Beigné
, Enrico Macii
, Massimo Poncino
:
Fine-Grain Back Biasing for the Design of Energy-Quality Scalable Operators. 1042-1055 - Keith A. Campbell
, Chen-Hsuan Lin
, Deming Chen:
Cost-Effective Error Detection Through Mersenne Modulo Shadow Datapaths. 1056-1069 - Tsung-Wei Huang
, Chun-Xun Lin, Martin D. F. Wong
:
DtCraft: A High-Performance Distributed Execution Engine at Scale. 1070-1083 - Shiping Wen, Shuixin Xiao, Yin Yang
, Zheng Yan
, Zhigang Zeng
, Tingwen Huang
:
Adjusting Learning Rate of Memristor-Based Multilayer Neural Networks via Fuzzy Method. 1084-1094 - Satyajit Das
, Kevin J. M. Martin
, Davide Rossi
, Philippe Coussy
, Luca Benini
:
An Energy-Efficient Integrated Programmable Array Accelerator and Compilation Flow for Near-Sensor Ultralow Power Processing. 1095-1108 - Xuebing Cao
, Liyi Xiao
, Jie Li, Rongsheng Zhang
, Shanshan Liu
, Jinxiang Wang
:
A Layout-Based Soft Error Vulnerability Estimation Approach for Combinational Circuits Considering Single Event Multiple Transients (SEMTs). 1109-1122 - Abdullah Yesil
, Yunus Babacan, Firat Kaçar
:
Design and Experimental Evolution of Memristor With Only One VDTA and One Capacitor. 1123-1132 - Kenneth O'Neal
, Philip Brisk
, Emily Shriver, Michael Kishinevsky:
Hardware-Assisted Cross-Generation Prediction of GPUs Under Design. 1133-1146 - Derong Liu
, Bei Yu
, Vinicius S. Livramento
, Salim Chowdhury, Duo Ding, Huy Vo, Akshay Sharma, David Z. Pan
:
Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups. 1147-1160 - Rickard Ewetz
, Cheng-Kok Koh:
Scalable Construction of Clock Trees With Useful Skew and High Timing Quality. 1161-1174 - Haoyu Yang
, Jing Su, Yi Zou, Yuzhe Ma
, Bei Yu
, Evangeline F. Y. Young:
Layout Hotspot Detection With Feature Tensor Generation and Deep Biased Learning. 1175-1187
Volume 38, Number 7, July 2019
- Kun Cao
, Junlong Zhou
, Peijin Cong
, Liying Li, Tongquan Wei
, Mingsong Chen
, Shiyan Hu
, Xiaobo Sharon Hu
:
Affinity-Driven Modeling and Scheduling for Makespan Optimization in Heterogeneous Multiprocessor Systems. 1189-1202 - Zhongyuan Tian
, Zhe Wang, Jiang Xu
, Haoran Li
, Peng Yang
, Rafael Kioji Vivas Maeda:
Collaborative Power Management Through Knowledge Sharing Among Multiple Devices. 1203-1215 - Andreas Grimmer
, Werner Haselmayr
, Robert Wille
:
Automated Dimensioning of Networked Labs-on-Chip. 1216-1225 - Alwin Zulehner
, Alexandru Paler, Robert Wille
:
An Efficient Methodology for Mapping Quantum Circuits to the IBM QX Architectures. 1226-1236 - Mohamed Ibrahim
, Krishnendu Chakrabarty
, Ulf Schlichtmann
:
Synthesis of a Cyberphysical Hybrid Microfluidic Platform for Single-Cell Analysis. 1237-1250 - Zhijing Li
, Zhao Chen
, Yili Zhang, Zixin Huang
, Weikang Qian
:
Simultaneous Area and Latency Optimization for Stochastic Circuits by D Flip-Flop Insertion. 1251-1264 - Leibo Liu
, Wenping Zhu
, Shouyi Yin, Shaojun Wei
:
A Binary-Feature-Based Object Recognition Accelerator With 22 M-Vector/s Throughput and 0.68 G-Vector/J Energy-Efficiency for Full-HD Resolution. 1265-1277 - Weijun Zhu
, Gang Dong
, Yintang Yang
:
Thermal-Aware Modeling and Analysis for a Power Distribution Network Including Through-Silicon-Vias in 3-D ICs. 1278-1290 - Cheng Zhuo
, Kassan Unda, Yiyu Shi, Wei-Kai Shih:
From Layout to System: Early Stage Power Delivery and Architecture Co-Exploration. 1291-1304 - Huimei Cheng
, Hsiao-Lun Wang, Minghe Zhang, Dylan Hand, Peter A. Beerel
:
Automatic Retiming of Two-Phase Latch-Based Resilient Circuits. 1305-1316 - Nasibeh Teimouri
, Hamed Tabkhi, Gunar Schirner
:
Alleviating Scalability Limitation of Accelerator-Based Platforms. 1317-1330 - Shi Jin
, Zhaobo Zhang, Krishnendu Chakrabarty
, Xinli Gu:
Changepoint-Based Anomaly Detection for Prognostic Diagnosis in a Core Router System. 1331-1344 - Keith A. Campbell
, David Lin, Leon He
,