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2020 – today
- 2024
[c8]Dongha Lee, Seki Kim, Takahiro Nomiyama, Dong-Hoon Jung, Dongsu Kim, Jongwoo Lee, Sungung Kwak:
14.6 A 10A Computational Digital LDO Achieving 263A/mm2 Current Density with Distributed Power-Gating Switches and Time-Based Fast-Transient Controller for Mobile SoC Application in 3nm GAAFET. ISSCC 2024: 264-266- 2023
- [j17]Dong-Hoon Jung
, Ki-Deok Lee, Jae-Kwang Lee:
A Study on Design Method of Synchronous Reluctance Motor Based on Nonlinear MEC Using Newton-Raphson Method. IEEE Access 11: 10723-10729 (2023) - [j16]Dong-Hoon Jung, Jong Suk Lim:
A Study on the Control Method of 6-DOF Magnetic Levitation System Using Non-Contact Position Sensors. Sensors 23(2): 905 (2023) - 2021
- [c7]Dong-Hoon Jung, Tae-Hwang Kong, Jun-Hyeok Yang, SangHo Kim, Kwangho Kim, Jeongpyo Park, Michael Choi, Jongshin Shin:
29.6 A Distributed Digital LDO with Time-Multiplexing Calibration Loop Achieving 40A/mm2 Current Density and 1mA-to-6.4A Ultra-Wide Load Range in 5nm FinFET CMOS. ISSCC 2021: 414-416
2010 – 2019
- 2019
- [c6]Dong-Hoon Jung, Jieun Kim, Jeong-Gu Lee, Hoi Jeong Yang, Hokyoung Ryu:
Lessons Learned from an Auditory-vibrotactile Sensory Experience in the Museum. ISS 2019: 373-378 - 2018
- [j15]Dong-Hoon Jung, Ki-Ryong Kim, Sunghwan Jo, Seong-Ook Jung:
0.293-mm2 Fast Transient Response Hysteretic Quasi-V2 DC-DC Converter With Area-Efficient Time-Domain-Based Controller in 0.35-µm CMOS. IEEE J. Solid State Circuits 53(6): 1844-1855 (2018) - [j14]Dong-Hoon Jung, Kyungho Ryu, Jung-Hyun Park, Seong-Ook Jung:
All-Digital Process-Variation-Calibrated Timing Generator for ATE With 1.95-ps Resolution and Maximum 1.2-GHz Test Rate. IEEE Trans. Very Large Scale Integr. Syst. 26(6): 1015-1025 (2018) - 2017
- [j13]Jung-Hyun Park, Dong-Hoon Jung, Seong-Ook Jung:
GRO-TDC with gate-switch-based delay cell halving resolution limit. Int. J. Circuit Theory Appl. 45(12): 2211-2225 (2017) - 2016
- [j12]Dong-Hoon Jung, Ki-Ryong Kim, Seong-Ook Jung:
Thermal and solar energy harvesting boost converter with time-multiplexing MPPT algorithm. IEICE Electron. Express 13(12): 20160287 (2016) - [j11]Dong-Hoon Jung, Kyungho Ryu, Jung-Hyun Park, Seong-Ook Jung:
All-Digital 90° Phase-Shift DLL With Dithering Jitter Suppression Scheme. IEEE Trans. Very Large Scale Integr. Syst. 24(3): 1015-1024 (2016) - [j10]Kyungho Ryu, Jiwan Jung, Dong-Hoon Jung, Jin Hyuk Kim, Seong-Ook Jung:
High-Speed, Low-Power, and Highly Reliable Frequency Multiplier for DLL-Based Clock Generator. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1484-1492 (2016) - [j9]Young-Jae An, Dong-Hoon Jung, Kyungho Ryu, Hyuck-Sang Yim, Seong-Ook Jung:
All-Digital ON-Chip Process Sensor Using Ratioed Inverter-Based Ring Oscillator. IEEE Trans. Very Large Scale Integr. Syst. 24(11): 3232-3242 (2016) - 2015
- [j8]Dong-Hoon Jung, Young-Jae An, Kyungho Ryu, Jung-Hyun Park, Seong-Ook Jung:
All-Digital Fast-Locking Delay-Locked Loop Using a Cyclic-Locking Loop for DRAM. IEEE Trans. Circuits Syst. II Express Briefs 62-II(11): 1023-1027 (2015) - [j7]Jung-Hyun Park, Heechai Kang, Dong-Hoon Jung, Kyungho Ryu, Seong-Ook Jung:
Level-Converting Retention Flip-Flop for Reducing Standby Power in ZigBee SoCs. IEEE Trans. Very Large Scale Integr. Syst. 23(3): 413-421 (2015) - [j6]Young-Jae An, Dong-Hoon Jung, Kyungho Ryu, Seung-Han Woo, Seong-Ook Jung:
An Energy-Efficient All-Digital Time-Domain-Based CMOS Temperature Sensor for SoC Thermal Management. IEEE Trans. Very Large Scale Integr. Syst. 23(8): 1508-1517 (2015) - 2014
- [j5]Kyungho Ryu, Dong-Hoon Jung, Seong-Ook Jung:
Process-Variation-Calibrated Multiphase Delay Locked Loop With a Loop-Embedded Duty Cycle Corrector. IEEE Trans. Circuits Syst. II Express Briefs 61-II(1): 1-5 (2014) - 2013
- [j4]Jung-Hyun Park, Dong-Hoon Jung, Kyungho Ryu, Seong-Ook Jung:
ADDLL for Clock-Deskew Buffer in High-Performance SoCs. IEEE Trans. Very Large Scale Integr. Syst. 21(7): 1368-1373 (2013) - [c5]Dong-Hoon Jung, Kyungho Ryu, Jung-Hyun Park, Won Lee, Seong-Ook Jung:
All-digital 90° phase-shift DLL with a dithering jitter suppression scheme. CICC 2013: 1-4 - [c4]Kyungho Ryu, Dong-Hoon Jung, Seong-Ook Jung:
All-digital process-variation-calibrated timing generator for ATE with 1.95-ps resolution and a maximum 1.2-GHz test rate. ESSCIRC 2013: 41-44 - [c3]Young-Jae An, Kyungho Ryu, Dong-Hoon Jung, Seung-Han Woo, Seong-Ook Jung:
A 0.67nJ/S time-domain temperature sensor for low power on-chip thermal management. ICCE 2013: 572-573 - 2012
- [j3]Kyungho Ryu, Dong-Hoon Jung, Seong-Ook Jung:
A DLL With Dual Edge Triggered Phase Detector for Fast Lock and Low Jitter Clock Generator. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(9): 1860-1870 (2012) - [j2]Heechai Kang, Kyungho Ryu, Dong-Hoon Jung, Donghwan Lee, Won Lee, SuHo Kim, JongRyun Choi, Seong-Ook Jung:
Process Variation Tolerant All-Digital 90° Phase Shift DLL for DDR3 Interface. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(10): 2186-2196 (2012) - [c2]Dong-Hoon Jung, Kyungho Ryu, Jung-Hyun Park, Seong-Ook Jung:
A low-power and small-area all-digital delay-locked loop with closed-loop duty-cycle correction. ESSCIRC 2012: 181-184 - [c1]Jaeseok Park, Ingeol Lee, Young-Seok Park, Sung-Geun Kim, Kyungho Ryu, Dong-Hoon Jung, Kangwook Jo, Choong Keun Lee, Hongil Yoon, Seong-Ook Jung, Woo-Young Choi, Sungho Kang:
Integration of dual channel timing formatter system for high speed memory test equipment. ISOCC 2012: 185-187 - 2010
- [j1]Dong-Hoon Jung, Kyungho Ryu, Seong-Ook Jung:
A 90° phase-shift DLL with closed-loop DCC for high-speed mobile DRAM interface. IEEE Trans. Consumer Electron. 56(4): 2400-2405 (2010)
Coauthor Index
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