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Kyungho Ryu
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2020 – today
- 2024
- [j21]Kyungho Ryu, Wooseong Kim:
Energy efficient deployment of aerial base stations for mobile users in multi-hop UAV networks. Ad Hoc Networks 157: 103463 (2024) - 2023
- [c10]Kyungho Ryu, Ji-Yong Jeong, Jung-Pil Lim, Kil-Hoon Lee, Kyongho Kim, Yongil Kwon, Seongjong Yoo, Siwoo Kim, Hyun-Wook Lim, Jae-Youl Lee:
A Source-Driver IC Including Power-Switching Fast-Slew-Rate Buffer and 8Gb/s Effective 3-Tap DFE Receiver Achieving 4.9mV DVRMS and 17V/ps Slew Rate for 8K Displays and Beyond. ISSCC 2023: 382-383 - 2021
- [j20]Kyungho Ryu, Wooseong Kim:
Multi-Objective Optimization of Energy Saving and Throughput in Heterogeneous Networks Using Deep Reinforcement Learning. Sensors 21(23): 7925 (2021) - 2020
- [j19]Kyungho Ryu, Wooseong Kim, Eun-Kyu Lee:
payGo: Incentive-Comparable Payment Routing Based on Contract Theory. IEEE Access 8: 70095-70110 (2020) - [j18]Kyungho Ryu, Kil-Hoon Lee, Jung-Pil Lim, Jinho Kim, Han Su Pae, Junho Park, Hyun-Wook Lim, Jae-Youl Lee:
An Analytical Jitter Tolerance Model for DLL-Based Clock and Data Recovery Circuits. IEEE Trans. Very Large Scale Integr. Syst. 28(11): 2257-2267 (2020)
2010 – 2019
- 2018
- [j17]Dong-Hoon Jung, Kyungho Ryu, Jung-Hyun Park, Seong-Ook Jung:
All-Digital Process-Variation-Calibrated Timing Generator for ATE With 1.95-ps Resolution and Maximum 1.2-GHz Test Rate. IEEE Trans. Very Large Scale Integr. Syst. 26(6): 1015-1025 (2018) - 2016
- [j16]Dong-Hoon Jung, Kyungho Ryu, Jung-Hyun Park, Seong-Ook Jung:
All-Digital 90° Phase-Shift DLL With Dithering Jitter Suppression Scheme. IEEE Trans. Very Large Scale Integr. Syst. 24(3): 1015-1024 (2016) - [j15]Kyungho Ryu, Jiwan Jung, Dong-Hoon Jung, Jin Hyuk Kim, Seong-Ook Jung:
High-Speed, Low-Power, and Highly Reliable Frequency Multiplier for DLL-Based Clock Generator. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1484-1492 (2016) - [j14]Young-Jae An, Dong-Hoon Jung, Kyungho Ryu, Hyuck-Sang Yim, Seong-Ook Jung:
All-Digital ON-Chip Process Sensor Using Ratioed Inverter-Based Ring Oscillator. IEEE Trans. Very Large Scale Integr. Syst. 24(11): 3232-3242 (2016) - 2015
- [j13]Dong-Hoon Jung, Young-Jae An, Kyungho Ryu, Jung-Hyun Park, Seong-Ook Jung:
All-Digital Fast-Locking Delay-Locked Loop Using a Cyclic-Locking Loop for DRAM. IEEE Trans. Circuits Syst. II Express Briefs 62-II(11): 1023-1027 (2015) - [j12]Jung-Hyun Park, Heechai Kang, Dong-Hoon Jung, Kyungho Ryu, Seong-Ook Jung:
Level-Converting Retention Flip-Flop for Reducing Standby Power in ZigBee SoCs. IEEE Trans. Very Large Scale Integr. Syst. 23(3): 413-421 (2015) - [j11]Young-Jae An, Dong-Hoon Jung, Kyungho Ryu, Seung-Han Woo, Seong-Ook Jung:
An Energy-Efficient All-Digital Time-Domain-Based CMOS Temperature Sensor for SoC Thermal Management. IEEE Trans. Very Large Scale Integr. Syst. 23(8): 1508-1517 (2015) - 2014
- [j10]Youngdon Jung, Jisu Kim, Kyungho Ryu, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung:
An MTJ-based non-volatile flip-flop for high-performance SoC. Int. J. Circuit Theory Appl. 42(4): 394-406 (2014) - [j9]Kyungho Ryu, Dong-Hoon Jung, Seong-Ook Jung:
Process-Variation-Calibrated Multiphase Delay Locked Loop With a Loop-Embedded Duty Cycle Corrector. IEEE Trans. Circuits Syst. II Express Briefs 61-II(1): 1-5 (2014) - [j8]Jisu Kim, Kyungho Ryu, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung:
STT-MRAM Sensing Circuit With Self-Body Biasing in Deep Submicron Technologies. IEEE Trans. Very Large Scale Integr. Syst. 22(7): 1630-1634 (2014) - [c9]Taehui Na, Kyungho Ryu, Jisu Kim, Seong-Ook Jung, Jung Pill Kim, Seung-Hyuk Kang:
High-performance low-power magnetic tunnel junction based non-volatile flip-flop. ISCAS 2014: 1953-1956 - 2013
- [j7]Jung-Hyun Park, Dong-Hoon Jung, Kyungho Ryu, Seong-Ook Jung:
ADDLL for Clock-Deskew Buffer in High-Performance SoCs. IEEE Trans. Very Large Scale Integr. Syst. 21(7): 1368-1373 (2013) - [c8]Dong-Hoon Jung, Kyungho Ryu, Jung-Hyun Park, Won Lee, Seong-Ook Jung:
All-digital 90° phase-shift DLL with a dithering jitter suppression scheme. CICC 2013: 1-4 - [c7]Kyungho Ryu, Dong-Hoon Jung, Seong-Ook Jung:
All-digital process-variation-calibrated timing generator for ATE with 1.95-ps resolution and a maximum 1.2-GHz test rate. ESSCIRC 2013: 41-44 - [c6]Young-Jae An, Kyungho Ryu, Dong-Hoon Jung, Seung-Han Woo, Seong-Ook Jung:
A 0.67nJ/S time-domain temperature sensor for low power on-chip thermal management. ICCE 2013: 572-573 - [c5]Taehui Na, Kyungho Ryu, Jisu Kim, Seung-Hyuk Kang, Seong-Ook Jung:
A comparative study of STT-MTJ based non-volatile flip-flops. ISCAS 2013: 109-112 - 2012
- [j6]Kyungho Ryu, Dong-Hoon Jung, Seong-Ook Jung:
A DLL With Dual Edge Triggered Phase Detector for Fast Lock and Low Jitter Clock Generator. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(9): 1860-1870 (2012) - [j5]Heechai Kang, Kyungho Ryu, Dong-Hoon Jung, Donghwan Lee, Won Lee, SuHo Kim, JongRyun Choi, Seong-Ook Jung:
Process Variation Tolerant All-Digital 90° Phase Shift DLL for DDR3 Interface. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(10): 2186-2196 (2012) - [j4]Jisu Kim, Kyungho Ryu, Seung-Hyuk Kang, Seong-Ook Jung:
A Novel Sensing Circuit for Deep Submicron Spin Transfer Torque MRAM (STT-MRAM). IEEE Trans. Very Large Scale Integr. Syst. 20(1): 181-186 (2012) - [j3]Kyungho Ryu, Jisu Kim, Jiwan Jung, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung:
A Magnetic Tunnel Junction Based Zero Standby Leakage Current Retention Flip-Flop. IEEE Trans. Very Large Scale Integr. Syst. 20(11): 2044-2053 (2012) - [c4]Dong-Hoon Jung, Kyungho Ryu, Jung-Hyun Park, Seong-Ook Jung:
A low-power and small-area all-digital delay-locked loop with closed-loop duty-cycle correction. ESSCIRC 2012: 181-184 - [c3]Jaeseok Park, Ingeol Lee, Young-Seok Park, Sung-Geun Kim, Kyungho Ryu, Dong-Hoon Jung, Kangwook Jo, Choong Keun Lee, Hongil Yoon, Seong-Ook Jung, Woo-Young Choi, Sungho Kang:
Integration of dual channel timing formatter system for high speed memory test equipment. ISOCC 2012: 185-187 - 2011
- [c2]Youngdon Jung, Jisu Kim, Kyungho Ryu, Seong-Ook Jung, Jung Pill Kim, Seung-Hyuk Kang:
MTJ based non-volatile flip-flop in deep submicron technology. ISOCC 2011: 424-427 - 2010
- [j2]Kyungho Ryu, Dong Hun Jung, Seong-Ook Jung:
A DLL based clock generator for low-power mobile SoCs. IEEE Trans. Consumer Electron. 56(3): 1950-1956 (2010) - [j1]Dong-Hoon Jung, Kyungho Ryu, Seong-Ook Jung:
A 90° phase-shift DLL with closed-loop DCC for high-speed mobile DRAM interface. IEEE Trans. Consumer Electron. 56(4): 2400-2405 (2010) - [c1]Heechai Kang, Kyungho Ryu, Donghwan Lee, Won Lee, SuHo Kim, JongRyun Choi, Seong-Ook Jung:
Process variation tolerant all-digital multiphase DLL for DDR3 interface. CICC 2010: 1-4
Coauthor Index
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last updated on 2024-07-16 20:47 CEST by the dblp team
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