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ORCIDKen-ichi Okada
Kenichi Okada
This is just a disambiguation page, and is not intended to be the bibliography of an actual person. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
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2020 – today
- 2023
[j110]Yudai Yamazaki, Joshua Alvin, Jian Pang, Atsushi Shirane, Kenichi Okada:
A 28GHz High-Accuracy Phase and Amplitude Detection Circuit for Dual-Polarized Phased-Array Calibration. IEICE Trans. Electron. 106(4): 149-156 (2023)- [j109]Zheng Li
, Jian Pang, Yi Zhang, Yudai Yamazaki, Qiaoyu Wang, Peng Luo, Weichu Chen, Yijing Liao, Minzhe Tang, Yun Wang, Xi Fu, Dongwon You, Naoki Oshima, Shinichi Hori, Jeehoon Park, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada:
A 39-GHz CMOS Bidirectional Doherty Phased- Array Beamformer Using Shared-LUT DPD With Inter-Element Mismatch Compensation Technique for 5G Base Station. IEEE J. Solid State Circuits 58(4): 901-914 (2023) - [c238]Dingxin Xu, Yuncheng Zhang, Hongye Huang, Zheng Sun, Bangan Liu, Ashbir Aviat Fadila, Junjun Qiu, Zezheng Liu, Wenqian Wang, Yuang Xiong, Waleed Madany, Atsushi Shirane, Kenichi Okada:
A 6.5-to-8GHz Cascaded Dual-Fractional-N Digital PLL Achieving -63.7dBc Fractional Spurs with 50MHz Reference. CICC 2023: 1-2 - [c237]Junjun Qiu, Wenqian Wang, Zheng Sun, Bangan Liu, Yuncheng Zhang, Dingxin Xu, Hongye Huang, Ashbir Aviat Fadila, Zezheng Liu, Waleed Madany, Yuang Xiong, Atsushi Shirane, Kenichi Okada:
A 32kHz-Reference 2.4GHz Fractional-N Nonuniform Oversampling PLL with Gain-Boosted PD and Loop-Gain Calibration. ISSCC 2023: 80-81 - [c236]Xi Fu, Dongwon You, Xiaolin Wang, Michihiro Ide, Yuncheng Zhang, Jun Sakamaki, Ashbir Aviat Fadila, Zheng Li, Yun Wang, Jumpei Sudo, Makoto Higaki, Soichiro Inoue, Takashi Eishima, Takashi Tomura, Jian Pang, Hiroyuki Sakai, Kenichi Okada, Atsushi Shirane:
A 2.95mW/element Ka-band CMOS Phased-Array Receiver Utilizing On-Chip Distributed Radiation Sensors in Low-Earth-Orbit Small Satellite Constellation. ISSCC 2023: 296-297 - [c235]Dongwon You, Xi Fu, Xiaolin Wang, Yuan Gao, Wenqian Wang, Jun Sakamaki, Hans Herdian, Sena Kato, Michihiro Ide, Yuncheng Zhang, Ashbir Aviat Fadila, Zheng Li, Chun Wang, Yun Wang, Jumpei Sudo, Makoto Higaki, Nahoka Kawaguchi, Masaya Nitta, Soichiro Inoue, Takashi Eishima, Takashi Tomura, Jian Pang, Hiroyuki Sakai, Kenichi Okada, Atsushi Shirane:
A Small-Satellite-Mounted 256-Element Ka-Band CMOS Phased-Array Transmitter Achieving 63.8dBm EIRP Under 26.6W Power Consumption Using Single/Dual Circular Polarization Active Coupler. ISSCC 2023: 298-299 - 2022
- [j108]Junjun Qiu, Bangan Liu, Yuncheng Zhang, Atsushi Shirane, Kenichi Okada:
A low-power digital baseband circuit for GMSK demodulation in sub-GHz application. IEICE Electron. Express 19(12): 20220201 (2022) - [j107]Hiro Tamura, Kiyoshi Yanagisawa, Atsushi Shirane, Kenichi Okada:
Performance Evaluation of Classification and Verification with Quadrant IQ Transition Image. IEICE Trans. Commun. 105-B(5): 580-587 (2022) - [j106]Jian Pang, Xueting Luo, Zheng Li, Atsushi Shirane, Kenichi Okada:
A Compact and High-Resolution CMOS Switch-Type Phase Shifter Achieving 0.4-dB RMS Gain Error for 5G n260 Band. IEICE Trans. Electron. 105-C(3): 102-109 (2022) - [j105]Ibrahim Abdo, Korkut Kaan Tokgoz, Atsushi Shirane, Kenichi Okada:
F-band Frequency Multipliers with Fundamental and Harmonic Rejection for Improved Conversion Gain and Output Power. IEICE Trans. Electron. 105-C(3): 118-125 (2022) - [j104]Yuncheng Zhang, Bangan Liu, Teruki Someya, Rui Wu, Junjun Qiu, Atsushi Shirane, Kenichi Okada:
A 0.37mm2 Fully-Integrated Wide Dynamic Range Sub-GHz Receiver Front-End without Off-Chip Matching Components. IEICE Trans. Electron. 105-C(7): 334-342 (2022) - [j103]Xi Fu, Yun Wang, Xiaolin Wang, Xiaofan Gu, Xueting Luo, Zheng Li, Jian Pang, Atsushi Shirane, Kenichi Okada:
An 8.5-dB Insertion Loss and 0.8° RMS Phase Error Ka-Band CMOS Hybrid Phase Shifter Featuring Nonuniform Matching for Satellite Communication. IEICE Trans. Electron. 105-C(10): 552-560 (2022) - [j102]Yun Wang, Dongwon You, Xi Fu, Takeshi Nakamura, Ashbir Aviat Fadila, Teruki Someya, Atsuhiro Kawaguchi, Junjun Qiu, Jian Pang, Kiyoshi Yanagisawa, Bangan Liu, Yuncheng Zhang, Haosheng Zhang, Rui Wu, Shunichiro Masaki, Daisuke Yamazaki, Atsushi Shirane, Kenichi Okada:
A Ka-Band SATCOM Transceiver in 65-nm CMOS With High-Linearity TX and Dual-Channel Wide-Dynamic-Range RX for Terrestrial Terminal. IEEE J. Solid State Circuits 57(2): 356-370 (2022) - [j101]Michihiro Ide, Atsushi Shirane, Kiyoshi Yanagisawa, Dongwon You, Jian Pang, Kenichi Okada:
A 28-GHz Phased-Array Relay Transceiver for 5G Network Using Vector-Summing Backscatter With 24-GHz Wireless Power and LO Transfer. IEEE J. Solid State Circuits 57(4): 1211-1223 (2022) - [j100]Ibrahim Abdo, Carrel da Gomez, Chun Wang, Kota Hatano, Qi Li, Chenxin Liu, Kiyoshi Yanagisawa, Ashbir Aviat Fadila, Takuya Fujimura, Tsuyoshi Miura, Korkut Kaan Tokgoz, Jian Pang, Hiroshi Hamada, Hideyuki Nosaka, Atsushi Shirane, Kenichi Okada:
A Bi-Directional 300-GHz-Band Phased-Array Transceiver in 65-nm CMOS With Outphasing Transmitting Mode and LO Emission Cancellation. IEEE J. Solid State Circuits 57(8): 2292-2308 (2022) - [j99]Yi Zhang, Jian Pang, Zheng Li, Minzhe Tang, Yijing Liao, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada:
A Power-Efficient CMOS Multi-Band Phased-Array Receiver Covering 24-71-GHz Utilizing Harmonic-Selection Technique With 36-dB Inter-Band Blocker Tolerance for 5G NR. IEEE J. Solid State Circuits 57(12): 3617-3630 (2022) - [c234]Kenichi Okada:
Maximizing Energy Efficiency in Sub-THz Radio Communication and Prospective toward 6G. BCICTS 2022: 1-4 - [c233]Teruo Jyo, Hiroshi Hamada, Munehiko Nagatani, Hitoshi Wakita, Ibrahim Abdo, Miwa Mutoh, Yuta Shiratori, Kenichi Okada, Atsushi Shirane, Hiroyuki Takahashi:
A 220-294 GHz Power Amplifier with 10-dBm Psat and 2.2% PAE in 250-nm InP DHBT. BCICTS 2022: 152-155 - [c232]Minzhe Tang, Yi Zhang, Jian Pang, Atsushi Shirane, Kenichi Okada:
A 28GHz Area-Efficient CMOS Vector-Summing Phase Shifter Utilizing Phase-Inverting Type-I Poly-Phase Filter for 5G New Radio. ESSCIRC 2022: 333-336 - [c231]Sena Kato, Keito Yuasa, Michihiro Ide, Atsushi Shirane, Kenichi Okada:
A CMOS Full-Wave Switching Rectifier with Frequency Up-Down Conversion for 5G NR Wirelessly-Powered Relay Transceivers. ESSCIRC 2022: 345-348 - [c230]Yudai Yamazaki, Jian Pang, Atsushi Shirane, Kenichi Okada:
A 1.8-67GHz Divide-by-4 ILFD Using Area-Efficient Transformer-Based Injection-Enhancing Technique. ESSCIRC 2022: 393-396 - [c229]Xi Fu, Yun Wang, Dongwon You, Xiaolin Wang, Ashbir Aviat Fadila, Yi Zhang, Sena Kato, Chun Wang, Zheng Li, Jian Pang, Atsushi Shirane, Kenichi Okada:
A 3.4mW/element Radiation-Hardened Ka-Band CMOS Phased-Array Receiver Utilizing Magnetic-Tuning Phase Shifter for Small Satellite Constellation. ISSCC 2022: 90-92 - [c228]Jian Pang, Yi Zhang, Zheng Li, Minzhe Tang, Yijing Liao, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada:
A Power-Efficient 24-to-71 GHz CMOS Phased-Array Receiver Utilizing Harmonic-Selection Technique Supporting 36dB Inter-Band Blocker Rejection for 5G NR. ISSCC 2022: 434-436 - [c227]Kenichi Okada, Jian Pang, Atsushi Shirane, Zheng Li, Yi Zhang, Naoki Oshima, Shinichi Hori, Kazuaki Kunihiro:
Millimeter-Wave CMOS Phased-Array Transceivers for 5G and Beyond. PIMRC 2022: 1-6 - [c226]Michihiro Ide, Yuasa Keito, Sena Kato, Dongwon You, Ashbir Aviat Fadila, Jian Pang, Atsushi Shirane, Kenichi Okada:
A 28-GHz Fully-Passive Retro-Reflective Phased-Array Backscattering Transceiver for 5G Network with 24-GHz Beam-Steered Wireless Power Transfer. VLSI Technology and Circuits 2022: 96-97 - [c225]Zheng Li, Jian Pang, Yi Zhang, Yudai Yamazaki, Qiaoyu Wang, Peng Luo, Weichu Chen, Yijing Liao, Minzhe Tang, Zhengyan Guo, Yun Wang, Xi Fu, Dongwon You, Naoki Oshima, Shinichi Hori, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada:
A 39-GHz CMOS Bi-Directional Doherty Phased-Array Beamformer Using Shared-LUT DPD with Inter-Element Mismatch Compensation Technique for 5G Base-Station. VLSI Technology and Circuits 2022: 98-99 - 2021
- [j98]Ibrahim Abdo, Hiroshi Hamada, Hideyuki Nosaka, Atsushi Shirane, Kenichi Okada:
64QAM wireless link with 300GHz InP-CMOS hybrid transceiver. IEICE Electron. Express 18(17): 20210314 (2021) - [j97]Jian Pang, Zheng Li, Xueting Luo, Joshua Alvin, Rattanan Saengchan, Ashbir Aviat Fadila, Kiyoshi Yanagisawa, Yi Zhang, Zixin Chen, Zhongliang Huang, Xiaofan Gu, Rui Wu, Yun Wang, Dongwon You, Bangan Liu, Zheng Sun, Yuncheng Zhang, Hongye Huang, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada:
A CMOS Dual-Polarized Phased-Array Beamformer Utilizing Cross-Polarization Leakage Cancellation for 5G MIMO Systems. IEEE J. Solid State Circuits 56(4): 1310-1326 (2021) - [j96]Junjun Qiu, Zheng Sun, Bangan Liu, Wenqian Wang, Dingxin Xu, Hans Herdian, Hongye Huang, Yuncheng Zhang, Yun Wang, Jian Pang, Hanli Liu, Masaya Miyahara, Atsushi Shirane, Kenichi Okada:
A 32-kHz-Reference 2.4-GHz Fractional-N Oversampling PLL With 200-kHz Loop Bandwidth. IEEE J. Solid State Circuits 56(12): 3741-3755 (2021) - [j95]Zheng Sun, Hanli Liu, Hongye Huang, Dexian Tang, Dingxin Xu, Tohru Kaneko, Zheng Li, Jian Pang, Rui Wu, Wei Deng, Atsushi Shirane, Kenichi Okada:
A 0.85mm2 BLE Transceiver Using an On-Chip Harmonic-Suppressed RFIO Circuitry With T/R Switch. IEEE Trans. Circuits Syst. I Regul. Pap. 68(1): 196-209 (2021) - [j94]Bangan Liu, Yuncheng Zhang, Junjun Qiu, Huy Cu Ngo, Wei Deng, Kengo Nakata, Toru Yoshioka, Jun Emmei, Jian Pang, Aravind Tharayil Narayanan, Haosheng Zhang, Teruki Someya, Atsushi Shirane, Kenichi Okada:
A Fully Synthesizable Fractional-N MDLL With Zero-Order Interpolation-Based DTC Nonlinearity Calibration and Two-Step Hybrid Phase Offset Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. 68(2): 603-616 (2021) - [c224]Yuncheng Zhang, Bangan Liu, Xiaofan Gu, Chun Wang, Atsushi Shirane, Kenichi Okada:
A DSM-based Polar Transmitter with 23.8% System Efficiency. ASP-DAC 2021: 1-2 - [c223]Ibrahim Abdo, Takuya Fujimura, Tsuyoshi Miura, Korkut Kaan Tokgoz, Atsushi Shirane, Kenichi Okada:
A 0.41W 34Gb/s 300GHz CMOS Wireless Transceiver. ASP-DAC 2021: 3-4 - [c222]Yi Zhang, Jian Pang, Kiyoshi Yanagizawa, Atsushi Shirane, Kenichi Okada:
28GHz Phase Shifter with Temperature Compensation for 5G NR Phased-array Transceiver. ASP-DAC 2021: 7-8 - [c221]Joshua Alvin, Jian Pang, Atsushi Shirane, Kenichi Okada:
A High Accuracy Phase and Amplitude Detection Circuit for Calibration of 28GHz Phased Array Beamformer System. ASP-DAC 2021: 93-94 - [c220]Zheng Sun, Dingxin Xu, Junjun Qiu, Zezheng Liu, Yuncheng Zhang, Hongye Huang, Hanli Liu, Bangan Liu, Zheng Li, Jian Pang, Atsushi Shirane, Kenichi Okada:
A 0.25 mm2 BLE Transmitter with Direct Antenna Interface and 19% System Efficiency Using Duty-Cycled Edge-Timing Calibration. ESSCIRC 2021: 499-502 - [c219]Hans Herdian, Takeshi Inoue, Takuichi Hirano, Masatsugu Sogabe, Atsushi Shirane, Kenichi Okada:
Dual-Layer Proton Irradiation for Creating Thermally-Stable High-Resistivity Region in Si CMOS Substrate. ESSDERC 2021: 191-194 - [c218]Ibrahim Abdo, Carrel da Gomez, Chun Wang, Kota Hatano, Qi Li, Chenxin Liu, Kiyoshi Yanagisawa, Ashbir Aviat Fadila, Jian Pang, Hiroshi Hamada, Hideyuki Nosaka, Atsushi Shirane, Kenichi Okada:
22.2 A 300GHz-Band Phased-Array Transceiver Using Bi-Directional Outphasing and Hartley Architecture in 65nm CMOS. ISSCC 2021: 316-318 - [c217]Junjun Qiu, Zheng Sun, Bangan Liu, Wenqian Wang, Dingxin Xu, Hans Herdian, Hongye Huang, Yuncheng Zhang, Yun Wang, Atsushi Shirane, Kenichi Okada:
32.7 A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth. ISSCC 2021: 454-456 - [c216]Michihiro Ide, Atsushi Shirane, Kiyoshi Yanagisawa, Dongwon You, Jian Pang, Kenichi Okada:
A 28-GHz Phased-Array Relay Transceiver for 5G Network Using Vector-Summing Backscatter with 24-GHz Wireless Power and LO Transfer. VLSI Circuits 2021: 1-2 - [c215]Jian Pang, Zheng Li, Xueting Luo, Joshua Alvin, Kiyoshi Yanagisawa, Yi Zhang, Zixin Chen, Zhongliang Huang, Xiaofan Gu, Weichu Chen, Yun Wang, Dongwon You, Zheng Sun, Yuncheng Zhang, Hongye Huang, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada:
A Fast-Beam-Switching 28-GHz Phased-Array Transceiver Supporting Cross-Polarization Leakage Self-Cancellation. VLSI Circuits 2021: 1-2 - 2020
- [j93]Jian Pang, Ryo Kubozoe, Zheng Li, Masaru Kawabuchi, Atsushi Shirane, Kenichi Okada:
A 28-GHz CMOS Vector-Summing Phase Shifter Featuring I/Q Imbalance Calibration Supporting 11.2Gb/s in 256QAM for 5G New Radio. IEICE Trans. Electron. 103-C(2): 39-47 (2020) - [j92]Zheng Sun, Dingxin Xu, Hongye Huang, Zheng Li, Hanli Liu, Bangan Liu, Jian Pang, Teruki Someya, Atsushi Shirane, Kenichi Okada:
A Compact TF-Based LC-VCO with Ultra-Low-Power Operation and Supply Pushing Reduction for IoT Applications. IEICE Trans. Electron. 103-C(10): 505-513 (2020) - [j91]Yun Wang, Rui Wu, Jian Pang, Dongwon You, Ashbir Aviat Fadila, Rattanan Saengchan, Xi Fu, Daiki Matsumoto, Takeshi Nakamura, Ryo Kubozoe, Masaru Kawabuchi, Bangan Liu, Haosheng Zhang, Junjun Qiu, Hanli Liu, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada:
A 39-GHz 64-Element Phased-Array Transceiver With Built-In Phase and Amplitude Calibrations for Large-Array 5G NR in 65-nm CMOS. IEEE J. Solid State Circuits 55(5): 1249-1269 (2020) - [j90]Hiroshi Hamada, Takuya Tsutsumi, Hideaki Matsuzaki, Takuya Fujimura, Ibrahim Abdo, Atsushi Shirane, Kenichi Okada, Go Itami, Ho-Jin Song, Hiroki Sugiyama, Hideyuki Nosaka:
300-GHz-Band 120-Gb/s Wireless Front-End Based on InP-HEMT PAs and Mixers. IEEE J. Solid State Circuits 55(9): 2316-2335 (2020) - [j89]Jian Pang, Zheng Li, Ryo Kubozoe, Xueting Luo, Rui Wu, Yun Wang, Dongwon You, Ashbir Aviat Fadila, Rattanan Saengchan, Takeshi Nakamura, Joshua Alvin, Daiki Matsumoto, Bangan Liu, Aravind Tharayil Narayanan, Junjun Qiu, Hanli Liu, Zheng Sun, Hongye Huang, Korkut Kaan Tokgoz, Keiichi Motoi, Naoki Oshima, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada:
A 28-GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR. IEEE J. Solid State Circuits 55(9): 2371-2386 (2020) - [c214]Zheng Li, Jian Pang, Ryo Kubozoe, Xueting Luo, Rui Wu, Yun Wang, Dongwon You, Ashbir Aviat Fadila, Joshua Alvin, Bangan Liu, Zheng Sun, Hongye Huang, Atsushi Shirane, Kenichi Okada:
A 28GHz CMOS Differential Bi-Directional Amplifier for 5G NR. ASP-DAC 2020: 5-6 - [c213]Kenichi Okada, Jian Pang:
Millimeter-Wave CMOS Phased-Array Transceiver Supporting Dual-Polarized MIMO for 5G NR. CICC 2020: 1-8 - [c212]Hiro Tamura, Kiyoshi Yanagisawa, Atsushi Shirane, Kenichi Okada:
Wireless Devices Identification with Light-Weight Convolutional Neural Network Operating on Quadrant IQ Transition Image. NEWCAS 2020: 106-109 - [c211]Jian Pang, Zheng Li, Xueting Luo, Joshua Alvin, Rattanan Saengchan, Ashbir Aviat Fadila, Kiyoshi Yanagisawa, Yi Zhang, Zixin Chen, Zhongliang Huang, Xiaofan Gu, Rui Wu, Yun Wang, Dongwon You, Bangan Liu, Zheng Sun, Yucheng Zhang, Hongye Huang, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada:
A 28-GHz CMOS Phased-Array Beamformer Supporting Dual-Polarized MIMO with Cross-Polarization Leakage Cancellation. VLSI Circuits 2020: 1-2 - [c210]Yuncheng Zhang, Bangan Liu, Xiaofan Gu, Chun Wang, Kiyoshi Yanagisawa, Junjun Qiu, Yun Wang, Jian Pang, Atsushi Shirane, Kenichi Okada:
A 29% PAE 1.5Bit-DSM-Based Polar Transmitter with Spur-Mitigated Injection-Locked PLL. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [j88]Haosheng Zhang, Aravind Tharayil Narayanan, Hans Herdian, Bangan Liu, Rui Wu, Atsushi Shirane, Kenichi Okada:
A Power-Efficient Pulse-VCO for Chip-Scale Atomic Clock. IEICE Trans. Electron. 102-C(4): 276-286 (2019) - [j87]Zule Xu, Anugerah Firdauzi, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa:
Type-I Digital Ring-Based PLL Using Loop Delay Compensation and ADC-Based Sampling Phase Detector. IEICE Trans. Electron. 102-C(7): 520-529 (2019) - [j86]Aravind Tharayil Narayanan, Kenichi Okada:
A Pulse-Tail-Feedback LC-VCO with 700Hz Flicker Noise Corner and -195dBc FoM. IEICE Trans. Electron. 102-C(7): 595-606 (2019) - [j85]Jian Pang, Rui Wu, Yun Wang, Masato Dome, Hisashi Kato, Hongye Huang, Aravind Tharayil Narayanan, Hanli Liu, Bangan Liu, Takeshi Nakamura, Takuya Fujimura, Masaru Kawabuchi, Ryo Kubozoe, Tsuyoshi Miura, Daiki Matsumoto, Zheng Li, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada:
A 28-GHz CMOS Phased-Array Transceiver Based on LO Phase-Shifting Architecture With Gain Invariant Phase Tuning for 5G New Radio. IEEE J. Solid State Circuits 54(5): 1228-1242 (2019) - [j84]Yun Wang, Bangan Liu, Rui Wu, Hanli Liu, Aravind Tharayil Narayanan, Jian Pang, Ning Li, Toru Yoshioka, Yuki Terashima, Haosheng Zhang, Dexian Tang, Makihiko Katsuragi, Daeyoung Lee, Sung Tae Choi, Kenichi Okada, Akira Matsuzawa:
A 60-GHz 3.0-Gb/s Spectrum Efficient BPOOK Transceiver for Low-Power Short-Range Wireless in 65-nm CMOS. IEEE J. Solid State Circuits 54(5): 1363-1374 (2019) - [j83]Jian Pang, Shotaro Maki, Seitarou Kawai, Noriaki Nagashima, Yuuki Seo, Masato Dome, Hisashi Kato, Makihiko Katsuragi, Kento Kimura, Satoshi Kondo, Yuki Terashima, Hanli Liu, Teerachot Siriburanon, Aravind Tharayil Narayanan, Nurul Fajri, Tohru Kaneko, Toru Yoshioka, Bangan Liu, Yun Wang, Rui Wu, Ning Li, Korkut Kaan Tokgoz, Masaya Miyahara, Atsushi Shirane, Kenichi Okada:
A 50.1-Gb/s 60-GHz CMOS Transceiver for IEEE 802.11ay With Calibration of LO Feedthrough and I/Q Imbalance. IEEE J. Solid State Circuits 54(5): 1375-1390 (2019) - [j82]Haosheng Zhang, Hans Herdian, Aravind Tharayil Narayanan, Atsushi Shirane, Mitsuru Suzuki, Kazuhiro Harasaka, Kazuhiko Adachi, Shigeyoshi Goka, Shinya Yanagimachi, Kenichi Okada:
ULPAC: A Miniaturized Ultralow-Power Atomic Clock. IEEE J. Solid State Circuits 54(11): 3135-3148 (2019) - [j81]Hanli Liu, Atsushi Shirane, Kenichi Okada, Zheng Sun, Hongye Huang, Wei Deng, Teerachot Siriburanon, Jian Pang, Yun Wang, Rui Wu, Teruki Someya:
A 265- $\mu$ W Fractional- ${N}$ Digital PLL With Seamless Automatic Switching Sub-Sampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65-nm CMOS. IEEE J. Solid State Circuits 54(12): 3478-3492 (2019) - [c209]Yuji Yano, Seiya Yoshida, Shintaro Izumi, Hiroshi Kawaguchi, Tetsuya Hirose, Masaya Miyahara, Teruki Someya, Kenichi Okada, Ippei Akita, Yoshihiko Kurui, Hideyuki Tomizawa, Masahiko Yoshimoto:
An IoT Sensor Node SoC with Dynamic Power Scheduling for Sustainable Operation in Energy Harvesting Environment. A-SSCC 2019: 267-270 - [c208]Hiroshi Hamada, Takuya Tsutsumi, Go Itami, Hiroki Sugiyama, Hideaki Matsuzaki, Kenichi Okada, Hideyuki Nosaka:
300-GHz 120-Gb/s Wireless Transceiver with High-Output-Power and High-Gain Power Amplifier Based on 80-nm InP-HEMT Technology. BCICTS 2019: 1-4 - [c207]Kenichi Okada:
Millimeter-Wave CMOS Phased-Array Transceiver Toward 1Tbps Wireless Communication. BCICTS 2019: 1-6 - [c206]Bangan Liu, Yuncheng Zhang, Junjun Qiu, Wei Deng, Zule Xu, Haosheng Zhang, Jian Pang, Yun Wang, Rui Wu, Teruki Someya, Atsushi Shirane, Kenichi Okada:
An HDL-described Fully-synthesizable Sub-GHz IoT Transceiver with Ring Oscillator based Frequency Synthesizer and Digital Background EVM Calibration. CICC 2019: 1-4 - [c205]Korkut Kaan Tokgoz, Kenichi Okada:
Millimeter-Wave CMOS Transceiver Toward 1Tbps Wireless Communication. ISCAS 2019: 1-4 - [c204]Hanli Liu, Zheng Sun, Hongye Huang, Wei Deng, Teerachot Siriburanon, Jian Pang, Yun Wang, Rui Wu, Teruki Someya, Atsushi Shirane, Kenichi Okada:
A 265μW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS. ISSCC 2019: 256-258 - [c203]Jian Pang, Zheng Li, Ryo Kubozoe, Xueting Luo, Rui Wu, Yun Wang, Dongwon You, Ashbir Aviat Fadila, Rattanan Saengchan, Takeshi Nakamura, Joshua Alvin, Daiki Matsumoto, Aravind Tharayil Narayanan, Bangan Liu, Junjun Qiu, Hanli Liu, Zheng Sun, Hongye Huang, Korkut Kaan Tokgoz, Keiichi Motoi, Naoki Oshima, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada:
A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR. ISSCC 2019: 344-346 - [c202]Haosheng Zhang, Hans Herdian, Aravind Tharayil Narayanan, Atsushi Shirane, Mitsuru Suzuki, Kazuhiro Harasaka, Kazuhiko Adachi, Shinya Yanagimachi, Kenichi Okada:
Ultra-Low-Power Atomic Clock for Satellite Constellation with 2.2×10-12 Long-Term Allan Deviation Using Cesium Coherent Population Trapping. ISSCC 2019: 462-464 - [c201]Haosheng Zhang, Aravind Tharayil Narayanan, Hans Herdian, Bangan Liu, Yun Wang, Atsushi Shirane, Kenichi Okada:
0.2mW 70Fsrms-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur. VLSI Circuits 2019: 38- - 2018
- [j80]Korkut Kaan Tokgoz, Seitaro Kawai, Kenichi Okada, Akira Matsuzawa:
Design of low-loss 60 GHz integrated antenna switch in 65 nm CMOS. IEICE Electron. Express 15(7): 20180067 (2018) - [j79]Bangan Liu, Yun Wang, Jian Pang, Haosheng Zhang, Dongsheng Yang, Aravind Tharayil Narayanan, Dae Young Lee, Sung Tae Choi, Rui Wu, Kenichi Okada, Akira Matsuzawa:
A Low-Power Pulse-Shaped Duobinary ASK Modulator for IEEE 802.11ad Compliant 60GHz Transmitter in 65nm CMOS. IEICE Trans. Electron. 101-C(2): 126-134 (2018) - [j78]Hanli Liu, Teerachot Siriburanon, Kengo Nakata, Wei Deng, Ju Ho Son, Dae Young Lee, Kenichi Okada, Akira Matsuzawa:
A 28-GHz Fractional-N Frequency Synthesizer with Reference and Frequency Doublers for 5G Mobile Communications in 65nm CMOS. IEICE Trans. Electron. 101-C(4): 187-196 (2018) - [j77]Kenichi Okada:
Foreword. IEICE Trans. Electron. 101-C(7): 430-431 (2018) - [j76]Hanli Liu, Dexian Tang, Zheng Sun, Wei Deng, Huy Cu Ngo, Kenichi Okada:
A Sub-mW Fractional-N ADPLL With FOM of -246 dB for IoT Applications. IEEE J. Solid State Circuits 53(12): 3540-3552 (2018) - [j75]Hanli Liu, Zheng Sun, Dexian Tang, Hongye Huang, Tohru Kaneko, Zhijie Chen, Wei Deng, Rui Wu, Kenichi Okada:
A DPLL-Centric Bluetooth Low-Energy Transceiver With a 2.3-mW Interference-Tolerant Hybrid-Loop Receiver in 65-nm CMOS. IEEE J. Solid State Circuits 53(12): 3672-3687 (2018) - [c200]Jian Pang, Korkut Kaan Tokgoz, Shotaro Maki, Zheng Li, Xueting Luo, Ibrahim Abdo, Seitarou Kawai, Hanli Liu, Bangan Liu, Makihiko Katsuragi, Kento Kimura, Atsushi Shirane, Kenichi Okada:
A 28.16-Gb/s Area-Efficient 60GHz CMOS Bi-Directional Transceiver for IEEE 802.11ay. A-SSCC 2018: 77-78 - [c199]Bangan Liu, Huy Cu Ngo, Kengo Nakata, Wei Deng, Yuncheng Zhang, Junjun Qiu, Toru Yoshioka, Jun Emmei, Haosheng Zhang, Jian Pang, Aravind Tharayil Narayanan, Dongsheng Yang, Hanli Liu, Kenichi Okada, Akira Matsuzawa:
A 1.2ps-jitter fully-synthesizable fully-calibrated fractional-N injection-locked PLL using true arbitrary nonlinearity calibration technique. CICC 2018: 1-4 - [c198]Zheng Sun, Hanli Liu, Dexian Tang, Hongye Huang, Tohru Kaneko, Rui Wu, Wei Deng, Kenichi Okada:
A 0.85mm2 BLE Transceiver with Embedded T/R Switch, 2.6mW Fully-Passive Harmonic Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver. ESSCIRC 2018: 310-313 - [c197]Korkut Kaan Tokgoz, Shotaro Maki, Jian Pang, Noriaki Nagashima, Ibrahim Abdo, Seitaro Kawai, Takuya Fujimura, Yoichi Kawano, Toshihide Suzuki, Taisuke Iwai, Kenichi Okada, Akira Matsuzawa:
A 120Gb/s 16QAM CMOS millimeter-wave wireless transceiver. ISSCC 2018: 168-170 - [c196]Hanli Liu, Dexian Tang, Zheng Sun, Wei Deng, Huy Cu Ngo, Kenichi Okada, Akira Matsuzawa:
A 0.98mW fractional-N ADPLL using 10b isolated constant-slope DTC with FOM of -246dB for IoT applications in 65nm CMOS. ISSCC 2018: 246-248 - [c195]Hanli Liu, Zheng Sun, Dexian Tang, Hongye Huang, Tohru Kaneko, Wei Deng, Rui Wu, Kenichi Okada, Akira Matsuzawa:
An ADPLL-centric bluetooth low-energy transceiver with 2.3mW interference-tolerant hybrid-loop receiver and 2.9mW single-point polar transmitter in 65nm CMOS. ISSCC 2018: 444-446 - [c194]Masaya Miyahara, Yukiya Endo, Kenichi Okada, Akira Matsuzawa:
A 64μs Start-Up 26/40MHz Crystal Oscillator with Negative Resistance Boosting Technique Using Reconfigurable Multi-Stage Amplifier. VLSI Circuits 2018: 115-116 - 2017
- [j74]Aravind Tharayil Narayanan, Wei Deng, Dongsheng Yang, Rui Wu, Kenichi Okada, Akira Matsuzawa:
A Fully-Synthesizable 10.06Gbps 16.1mW Injection-Locked CDR in 28nm FDSOI. IEICE Trans. Electron. 100-C(3): 259-267 (2017) - [j73]Takuichi Hirano, Ning Li, Kenichi Okada:
Analysis of Effective Material Properties of Metal Dummy Fills in a CMOS Chip. IEICE Trans. Commun. 100-B(5): 793-798 (2017) - [j72]Yun Wang, Makihiko Katsuragi, Kenichi Okada, Akira Matsuzawa:
A 20-GHz Differential Push-Push VCO for 60-GHz Frequency Synthesizer toward 256 QAM Wireless Transmission in 65-nm CMOS. IEICE Trans. Electron. 100-C(6): 568-575 (2017) - [j71]Rui Wu, Ryo Minami, Yuuki Tsukui, Seitaro Kawai, Yuuki Seo, Shinji Sato, Kento Kimura, Satoshi Kondo, Tomohiro Ueno, Nurul Fajri, Shoutarou Maki, Noriaki Nagashima, Yasuaki Takeuchi, Tatsuya Yamaguchi, Ahmed Musa, Korkut Kaan Tokgoz, Teerachot Siriburanon, Bangan Liu, Yun Wang, Jian Pang, Ning Li, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa:
64-QAM 60-GHz CMOS Transceivers for IEEE 802.11ad/ay. IEEE J. Solid State Circuits 52(11): 2871-2891 (2017) - [c193]Rui Wu, Ryo Minami, Yuuki Tsukui, Seitaro Kawai, Yuuki Seo, Shinji Sato, Kento Kimura, Satoshi Kondo, Tomohiro Ueno, Nurul Fajri, Shoutarou Maki, Noriaki Nagashima, Yasuaki Takeuchi, Tatsuya Yamaguchi, Ahmed Musa, Korkut Kaan Tokgoz, Teerachot Siriburanon, Bangan Liu, Yun Wang, Jian Pang, Ning Li, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa:
Ultra-high-data-rate 60-GHz CMOS transceiver for future radio access network. ASICON 2017: 1025-1028 - [c192]Korkut Kaan Tokgoz, Shotaro Maki, Seitarou Kawai, Noriaki Nagashima, Yoichi Kawano, Toshihide Suzuki, Taisuke Iwai, Kenichi Okada, Akira Matsuzawa:
W-band ultra-high data-rate 65nm CMOS wireless transceiver. ASP-DAC 2017: 5-6 - [c191]Dongsheng Yang, Wei Deng, Bangan Liu, Aravind Tharayil Narayanan, Teerachot Siriburanon, Kenichi Okada, Akira Matsuzawa:
An HDL-synthesized injection-locked PLL using LC-based DCO for on-chip clock generation. ASP-DAC 2017: 13-14 - [c190]Huy Cu Ngo, Kengo Nakata, Toru Yoshioka, Yuki Terashima, Kenichi Okada, Akira Matsuzawa:
8.5 A 0.42ps-jitter -241.7dB-FOM synthesizable injection-locked PLL with noise-isolation LDO. ISSCC 2017: 150-151 - [c189]Jian Pang, Shotaro Maki, Seitarou Kawai, Noriaki Nagashima, Yuuki Seo, Masato Dome, Hisashi Kato, Makihiko Katsuragi, Kento Kimura, Satoshi Kondo, Yuki Terashima, Hanli Liu, Teerachot Siriburanon, Aravind Tharayil Narayanan, Nurul Fajri, Tohru Kaneko, Toru Yoshioka, Bangan Liu, Yun Wang, Rui Wu, Ning Li, Korkut Kaan Tokgoz, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa:
24.9 A 128-QAM 60GHz CMOS transceiver for IEEE802.11ay with calibration of LO feedthrough and I/Q imbalance. ISSCC 2017: 424-425 - 2016
- [j70]Dongsheng Yang, Tomohiro Ueno, Wei Deng, Yuki Terashima, Kengo Nakata, Aravind Tharayil Narayanan, Rui Wu, Kenichi Okada, Akira Matsuzawa:
A 0.0055mm2 480µW Fully Synthesizable PLL Using Stochastic TDC in 28nm FDSOI. IEICE Trans. Electron. 99-C(6): 632-640 (2016) - [j69]Mitsutoshi Sugawara, Kenji Mori,