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Books and Theses
- 2010
[b1]Byungsub Kim:
Equalized on-chip interconnect: modeling, analysis, and design. Massachusetts Institute of Technology, Cambridge, MA, USA, 2010
Journal Articles
- 2024
- [j57]Sungyu Jeong
, Chanhyong Lee, Minsu Kim, Iksu Jang, Myungguk Lee, Junung Choi, Byungsub Kim:
A Layout-to-Generator Conversion Framework With Graphical User Interface for Visual Programming of Analog Layout Generators. IEEE Access 12: 125942-125954 (2024) - [j56]Myungguk Lee, Jaeik Cho, Junung Choi, Won Joon Choi, Jiyun Lee, Iksu Jang, Changjae Moon, Gain Kim, Byungsub Kim:
Compact Single-Ended Transceivers Demonstrating Flexible Generation of 1/N-Rate Receiver Front-Ends for Short-Reach Links. IEEE Trans. Circuits Syst. I Regul. Pap. 71(1): 373-382 (2024) - 2023
- [j55]Jaeyoung Seo, Sooeun Lee, Myungguk Lee, Changjae Moon, Byungsub Kim:
A 20-Gb/s/Pin Compact Single-Ended DCC-Less DECS Transceiver With CDR-Less RX Front-End for On-Chip Links. IEEE J. Solid State Circuits 58(11): 3253-3265 (2023) - [j54]Kwangmin Kim, Hyoseok Song, Byeongcheol Lee, Byungsub Kim:
A Speculative Divide-and-Conquer Optimization Method for Large Analog/Mixed-Signal Circuits: A High-Speed FFE SST Transmitter Example. IEEE Trans. Very Large Scale Integr. Syst. 31(5): 622-635 (2023) - 2022
- [j53]Myungguk Lee, Puneet Kanwar Kaur, Jaeyoung Seo, Seungho Han, Byungsub Kim:
A Compact Single-Ended Inverter-Based Transceiver With Swing Improvement for Short-Reach Links. IEEE Trans. Circuits Syst. I Regul. Pap. 69(9): 3679-3688 (2022) - 2021
- [j52]Soo-Bong Cho, Seung-Kook Ro, Byungsub Kim, Sungcheul Lee, Jong-Kweon Park:
The development of a micro-pattern manufacturing method using rotating active tools with compensation of estimated errors and an LMS algorithm. J. Intell. Manuf. 32(1): 51-59 (2021) - [j51]Sooeun Lee, Jaeyoung Seo, Changyoon Han, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A DFE-Enhanced Phase-Difference Modulation Signaling for Multi-Drop Memory Interfaces. IEEE Trans. Circuits Syst. II Express Briefs 68(6): 1862-1866 (2021) - 2020
- [j50]Ji-Hoon Lee, Jaehyun Ko, Kwangmin Kim, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A Body Channel Communication Technique Utilizing Decision Feedback Equalization. IEEE Access 8: 198468-198481 (2020) - [j49]Jaehyeong Hong, Dong Hoon Baek, Hyunwoo Son, Cheolmin Ahn, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A pattern-dependent injection-locked CDR for clock-embedded signaling. Microelectron. J. 96: 104708 (2020) - [j48]Sooeun Lee, Jaeyoung Seo, Kyunghyun Lim, Jahyun Koo, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 7.8 Gb/s/pin, 1.96 pJ/b Transceiver With Phase-Difference-Modulation Signaling for Highly Reflective Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(6): 2114-2127 (2020) - [j47]Seong-Eun Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
Low-Power Small-Area Inverter-Based DSM for MEMS Microphone. IEEE Trans. Circuits Syst. 67-II(11): 2392-2396 (2020) - [j46]Cheolmin Ahn, Jaehyeong Hong, Jongshin Shin, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
An 18-Gb/s NRZ Transceiver With a Channel-Included 2-UI Impulse-Response Filtering FFE and 1-Tap DFE Compensating up to 32-dB Loss. IEEE Trans. Circuits Syst. 67-II(12): 2863-2867 (2020) - [j45]Jaeyoung Seo, Jaehyun Ko, Kyunghyun Lim, Sooeun Lee, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 7.8-Gb/s 2.9-pJ/b Single-Ended Receiver With 20-Tap DFE for Highly Reflective Channels. IEEE Trans. Very Large Scale Integr. Syst. 28(3): 818-822 (2020) - 2019
- [j44]Youngwoo Ji, Jungho Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 192-pW Voltage Reference Generating Bandgap- $V_{\text{th}}$ With Process and Temperature Dependence Compensation. IEEE J. Solid State Circuits 54(12): 3281-3291 (2019) - [j43]Hyunwoo Son, Hwasuk Cho, Jungho Lee, Seongun Bae, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Multilayer-Learning Current-Mode Neuromorphic System With Analog-Error Compensation. IEEE Trans. Biomed. Circuits Syst. 13(5): 986-998 (2019) - [j42]Jahyun Koo, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Quadrature RC Oscillator With Noise Reduction by Voltage Swing Control. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(8): 3077-3088 (2019) - [j41]Kwangmin Kim, Seokjoon Kang, Byungsub Kim:
A Code Inversion Encoding Technique to Improve Read Margin of A Cross-Point Phase Change Memory. IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1811-1818 (2019) - 2018
- [j40]Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Time-Based Receiver With 2-Tap Decision Feedback Equalizer for Single-Ended Mobile DRAM Interface. IEEE J. Solid State Circuits 53(1): 144-154 (2018) - [j39]Seungnam Choi, Hwan-Seok Ku, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
An 84.6-dB-SNDR and 98.2-dB-SFDR Residue-Integrated SAR ADC for Low-Power Sensor Applications. IEEE J. Solid State Circuits 53(2): 404-417 (2018) - [j38]Minsoo Choi, Sooeun Lee, Myungguk Lee, Ji-Hoon Lee, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An FFE Transmitter Which Automatically and Adaptively Relaxes Impedance Matching. IEEE J. Solid State Circuits 53(6): 1780-1792 (2018) - [j37]Hwasuk Cho, Hyunwoo Son, Kihwan Seong, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
An On-Chip Learning Neuromorphic Autoencoder With Current-Mode Transposable Memory Read and Virtual Lookup Table. IEEE Trans. Biomed. Circuits Syst. 12(1): 161-170 (2018) - [j36]Jaeyoung Seo, Minsoo Choi, Byungsub Kim:
An Approximate Closed-Form Transfer Function Model for Multiconductor Transmission Lines. IEEE Trans. Circuits Syst. II Express Briefs 65-II(9): 1199-1203 (2018) - [j35]Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Study on Bandgap Reference Circuit With Leakage-Based PTAT Generation. IEEE Trans. Very Large Scale Integr. Syst. 26(11): 2310-2321 (2018) - [j34]Kwangmin Kim, Seokjoon Kang, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A Search Algorithm for the Worst Operation Scenario of a Cross-Point Phase-Change Memory Utilizing Particle Swarm Optimization. IEEE Trans. Very Large Scale Integr. Syst. 26(12): 2591-2598 (2018) - 2017
- [j33]Yoon-Jee Kim, Sung-Eun Cho, Ji-Yong Um, Min-Kyun Chae, Jihoon Bang, Jongkeun Song, Taeho Jeon, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Single-Chip 64-Channel Ultrasound RX-Beamformer Including Analog Front-End and an LUT for Non-Uniform ADC-Sample-Clock Generation. IEEE Trans. Biomed. Circuits Syst. 11(1): 87-97 (2017) - [j32]Hyunwoo Son, Hwasuk Cho, Jahyun Koo, Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Low-Power Wide Dynamic-Range Current Readout Circuit for Ion-Sensitive FET Sensors. IEEE Trans. Biomed. Circuits Syst. 11(3): 523-533 (2017) - [j31]Seunghwan Hong, Shinwoong Kim, Seungnam Choi, Hwasuk Cho, Jaehyeong Hong, Young Hun Seo, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 250-µW 2.4-GHz Fast-Lock Fractional-N Frequency Generation for Ultralow-Power Applications. IEEE Trans. Circuits Syst. II Express Briefs 64-II(2): 106-110 (2017) - [j30]Young-Ho Choi, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Phase-Interpolator-Based Fractional Counter for All-Digital Fractional-N Phase-Locked Loop. IEEE Trans. Circuits Syst. II Express Briefs 64-II(3): 249-253 (2017) - [j29]Seungnam Choi, Yunjae Suh, Joohyun Lee, Jinkyu Kim, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A Self-Biased Current-Mode Amplifier With an Application to 10-bit Pipeline ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(7): 1706-1717 (2017) - [j28]Jaeyoung Seo, Minsoo Choi, Sanquan Song, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An Approximate Transfer Function Model of Two Serially Connected Heterogeneous Transmission Lines. IEEE Trans. Circuits Syst. II Express Briefs 64-II(9): 1067-1071 (2017) - [j27]Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
All-Synthesizable Current-Mode Transmitter Driver for USB2.0 Interface. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 788-792 (2017) - [j26]JaeHyun Seo, Sangheon Lee, Kwangmin Kim, Sooeun Lee, Hyunsang Hwang, Byungsub Kim:
Automatic ReRAM SPICE Model Generation From Empirical Data for Fast ReRAM-Circuit Coevaluation. IEEE Trans. Very Large Scale Integr. Syst. 25(6): 1821-1830 (2017) - [j25]Yelim Youn, Kwangmin Kim, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
Investigation on the Worst Read Scenario of a ReRAM Crossbar Array. IEEE Trans. Very Large Scale Integr. Syst. 25(9): 2402-2410 (2017) - 2016
- [j24]Shinwoong Kim, Seunghwan Hong, Kapseok Chang, Hyungsik Ju, Jaewook Shin, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 2 GHz Synthesized Fractional-N ADPLL With Dual-Referenced Interpolating TDC. IEEE J. Solid State Circuits 51(2): 391-400 (2016) - [j23]Soo-Min Lee, Ji-Hoon Lim, Il-Min Yi, Young Jae Jang, Hae-Kang Jung, Kyunghoon Kim, Dae-Han Kwon, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Single-Ended Parallel Transceiver With Four-Bit Four-Wire Four-Level Balanced Coding for the Point-to-Point DRAM Interface. IEEE J. Solid State Circuits 51(8): 1890-1901 (2016) - [j22]Seungho Han, Sooeun Lee, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A Coefficient-Error-Robust Feed-Forward Equalizing Transmitter for Eye-Variation and Power Improvement. IEEE J. Solid State Circuits 51(8): 1902-1914 (2016) - [j21]Il-Min Yi, Soo-Min Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A 40 mV-Differential-Channel-Swing Transceiver Using a RX Current-Integrating TIA and a TX Pre-Emphasis Equalizer With a CML Driver at 9 Gb/s. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(1): 122-133 (2016) - [j20]Ji-Hoon Lim, Jun-Hyun Bae, Jaemin Jang, Hae-Kang Jung, Hyunbae Lee, Yongju Kim, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Delay Locked Loop With a Feedback Edge Combiner of Duty-Cycle Corrector With a 20%-80% Input Duty Cycle for SDRAMs. IEEE Trans. Circuits Syst. II Express Briefs 63-II(2): 141-145 (2016) - [j19]Seungnam Choi, Hyunwoo Son, Jongshin Shin, Sang-Hyun Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 0.65-to-10.5 Gb/s Reference-Less CDR With Asynchronous Baud-Rate Sampling for Frequency Acquisition and Adaptive Equalization. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(2): 276-287 (2016) - 2015
- [j18]Ji-Yong Um, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Single-Chip 32-Channel Analog Beamformer With 4-ns Delay Resolution and 768-ns Maximum Delay Range for Ultrasound Medical Imaging With a Linear Array Transducer. IEEE Trans. Biomed. Circuits Syst. 9(1): 138-151 (2015) - [j17]Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An Approximate Closed-Form Transfer Function Model for Diverse Differential Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(5): 1335-1344 (2015) - 2014
- [j16]Seung-Hun Lee, Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
Current-Mode Transceiver for Silicon Interposer Channel. IEEE J. Solid State Circuits 49(9): 2044-2053 (2014) - [j15]Soo-Min Lee, Il-Min Yi, Hae-Kang Jung, Hyunbae Lee, Yong-Ju Kim, Yunsaing Kim, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
An 80 mV-Swing Single-Ended Duobinary Transceiver With a TIA RX Termination for the Point-to-Point DRAM Interface. IEEE J. Solid State Circuits 49(11): 2618-2630 (2014) - [j14]Ji-Yong Um, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Jongkeun Song, Bae-Hyung Kim, Seung-Hun Lee, Jihoon Bang, Youngil Kim, Kyungil Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
An Analog-Digital Hybrid RX Beamformer Chip With Non-Uniform Sampling for Ultrasound Medical Imaging With 2D CMUT Array. IEEE Trans. Biomed. Circuits Syst. 8(6): 799-809 (2014) - [j13]Hye-Jung Kwon, Jae-Seung Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
Analysis of an Open-Loop Time Amplifier With a Time Gain Determined by the Ratio of Bias Current. IEEE Trans. Circuits Syst. II Express Briefs 61-II(7): 481-485 (2014) - [j12]Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An Approximate Closed-Form Channel Model for Diverse Interconnect Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(10): 3034-3043 (2014) - [j11]Hyunsoo Ha, Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 0.5-V, 1.47- µW 40-kS/s 13-bit SAR ADC With Capacitor Error Compensation. IEEE Trans. Circuits Syst. II Express Briefs 61-II(11): 840-844 (2014) - [j10]Il-Min Yi, Soo-Min Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Hwan Choi, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A 40-mV-Swing Single-Ended Transceiver for TSV with a Switched-Diode RX Termination. IEEE Trans. Circuits Syst. II Express Briefs 61-II(12): 987-991 (2014) - 2013
- [j9]Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 5 Gb/s Single-Ended Parallel Receiver With Adaptive Crosstalk-Induced Jitter Cancellation. IEEE J. Solid State Circuits 48(9): 2118-2127 (2013) - [j8]Dong-Woo Jee, Yunjae Suh, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A FIR-Embedded Phase Interpolator Based Noise Filtering for Wide-Bandwidth Fractional-N PLL. IEEE J. Solid State Circuits 48(11): 2795-2804 (2013) - [j7]Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A QDR-Based 6-GB/s Parallel Transceiver With Current-Regulated Voltage-Mode Output Driver and Byte CDR for Memory Interface. IEEE Trans. Circuits Syst. II Express Briefs 60-II(2): 91-95 (2013) - [j6]Yunjae Suh, Jongmi Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier. IEEE Trans. Circuits Syst. II Express Briefs 60-II(3): 142-146 (2013) - 2012
- [j5]Dong-Woo Jee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 1.9-GHz Fractional-N Digital PLL With Subexponent ΔΣ TDC and IIR-Based Noise Cancellation. IEEE Trans. Circuits Syst. II Express Briefs 59-II(11): 721-725 (2012) - 2010
- [j4]Jong-Kweon Park, Seung-Kook Ro, Byungsub Kim, Woo Cheol Shin, Hyeon-Hwa Lee:
Precision Component Technologies for Microfactory Systems Developed at KIMM. Int. J. Autom. Technol. 4(2): 127-137 (2010) - [j3]Byungsub Kim, Vladimir Stojanovic:
An Energy-Efficient Equalized Transceiver for RC-Dominant Channels. IEEE J. Solid State Circuits 45(6): 1186-1197 (2010) - 2009
- [j2]Byungsub Kim, Yong Liu, Timothy O. Dickson, John F. Bulzacchelli, Daniel J. Friedman:
A 10-Gb/s Compact Low-Power Serial I/O With DFE-IIR Equalization in 65-nm CMOS. IEEE J. Solid State Circuits 44(12): 3526-3538 (2009) - 2008
- [j1]Byungsub Kim, Vladimir Stojanovic:
Characterization of Equalized and Repeated Interconnects for NoC Applications. IEEE Des. Test Comput. 25(5): 430-439 (2008)
Conference and Workshop Papers
- 2023
- [c44]Hyoseok Song, Kwangmin Kim, Changyoon Han, Byungsub Kim:
Review: A Speculative Divide-and-Conquer Optimization Method for Large Analog/Mixed-Signal Circuits. ISOCC 2023: 139-140 - 2022
- [c43]Seungsik Moon, Jaehyun Ko, Byungsub Kim, Youngjoo Lee:
A Study On Reliable High-Speed HBC Enhanced by ECC for Wearable Neural Interfaces. AICAS 2022: 110-113 - [c42]Jaehyun Ko, Iksu Jang, Chanho Kim, Jihoon Park, Changjae Moon, Sooeun Lee, Byungsub Kim:
A 50 Mb/s Full HBC TRX with Adaptive DFE and Variable-Interval 3x Oversampling CDR in 28nm CMOS Technology for A 75 cm Body Channel Moving at 0.75 Cycle/sec. ESSCIRC 2022: 213-216 - [c41]Junung Choi, Jaeik Cho, Won Joon Choi, Myungguk Lee, Byungsub Kim:
A Layout Generator of Latch, Flip-Flop, and Shift Register for High-Speed Links. ISOCC 2022: 19-20 - [c40]Iksu Jang, Jaeyoung Seo, Changjae Moon, Byungsub Kim:
A Cost-efficient FPGA-based Embedded System for Biosensor Platform. ISOCC 2022: 67-68 - [c39]Hyoseok Song, Kwangmin Kim, Changyoon Han, Byungsub Kim:
A Fast Eye Size Evaluation Method for High Speed Signal. ISOCC 2022: 396-397 - [c38]Jaeyoung Seo, Sooeun Lee, Myungguk Lee, Changjae Moon, Byungsub Kim:
A 20-Gb/s/pin 0.0024-mm2 Single-Ended DECS TRX with CDR-less Self-Slicing/Auto-Deserialization to Improve Tolerance on Duty Cycle Error and RX Supply Noise for DCC/CDR-less Short-Reach Memory Interfaces. ISSCC 2022: 1-3 - [c37]Changjae Moon, Jaeyoung Seo, Myungguk Lee, Iksu Jang, Byungsub Kim:
A 20 Gb/s/pin 1.18pJ/b 1149µm2Single-Ended Inverter-based 4-tap Addition-Only Feed-Forward Equalization Transmitter with Improved Robustness to Coefficient Errors in 28nm CMOS. ISSCC 2022: 450-452 - 2020
- [c36]Seungho Han, Sungyu Jeong, Chanho Kim, Hong-June Park, Byungsub Kim:
GUI-Enhanced Layout Generation of FFE SST TXs for Fast High-Speed Serial Link Design. DAC 2020: 1-6 - 2019
- [c35]Youngwoo Ji, Jungho Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 192pW Hybrid Bandgap-Vth Reference with Process Dependence Compensated by a Dimension-Induced Side-Effect. ISSCC 2019: 308-310 - [c34]Cheonhoo Jeon, Jahyun Koo, Kyongsu Lee, Su-Kyoung Kim, Sei Kwang Hahn, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 143nW Glucose-Monitoring Smart Contact Lens IC with a Dual-Mode Transmitter for Wireless-Powered Backscattering and RF-Radiated Transmission Using a Single Loop Antenna. VLSI Circuits 2019: 294- - 2018
- [c33]Youngwoo Ji, Cheonhoo Jeon, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 9.3 nW all-in-one bandgap voltage and current reference circuit using leakage-based PTAT generation and DIBL characteristic. ASP-DAC 2018: 309-310 - [c32]Ji-Hoon Lee, Kwangmin Kim, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 16.6-pJ/b 150-Mb/s body-channel communication transceiver with decision feedback equalization improving >200x area efficiency. ASP-DAC 2018: 311-312 - [c31]Hyunwoo Son, Hwasuk Cho, Jahyun Koo, Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A low-power wide dynamic-range current readout circuit for biosensors. ASP-DAC 2018: 325-326 - [c30]Minsoo Choi, Myungguk Lee, Byungsub Kim:
A 12-Gb/s AC-Coupled FFE TX With Adaptive Relaxed Impedance Matching Achieving Adaptation Range of 35-75Ω Z0 and 30-550Ω RRX. A-SSCC 2018: 209-212 - [c29]Yelim Youn, Kwangmin Kim, Byungsub Kim:
A Rule-of-thumb Condition to Avoid Large HRS Current in ReRAM Crossbar Array Design. ISOCC 2018: 17-18 - [c28]Kyunghyun Lim, Minsoo Choi, Myat Thu Linn Aung, Kyunghwan Kim, Ji-Seong Kim, Rock-Hyun Baek, Ho-Jin Song, Tony Tae-Hyoung Kim, Byungsub Kim:
Experimental Verification of a Simple, Intuitive, and Accurate Closed-Form Transfer Function Model for Diverse High-Speed Interconnects. ISOCC 2018: 239-240 - [c27]Minseob Lee, Shinwoong Kim, Hwasuk Cho, Jahyun Koo, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A 0.3-to-1.2V frequency-scalable fractional-N ADPLL with a speculative dual-referenced interpolating TDC. ISSCC 2018: 122-124 - [c26]Sooeun Lee, Jaeyoung Seo, Kyunghyun Lim, Jaehyun Ko, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 7.8Gb/s/pin 1.96pJ/b compact single-ended TRX and CDR with phase-difference modulation for highly reflective memory interfaces. ISSCC 2018: 272-274 - 2017
- [c25]Myungguk Lee, Seungho Han, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
A 10-GHz multi-purpose reconfigurable built-in self-test circuit for high-speed links. A-SSCC 2017: 73-76 - [c24]Jahyun Koo, Kyoung-Sik Moon, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
5.5 A quadrature relaxation oscillator with a process-induced frequency-error compensation loop. ISSCC 2017: 94-95 - [c23]Youngwoo Ji, Cheonhoo Jeon, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
5.8 A 9.3nW all-in-one bandgap voltage and current reference circuit. ISSCC 2017: 100-101 - [c22]Hwasuk Cho, Kihwan Seong, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
8.7 A 0.0047mm2 highly synthesizable TDC- and DCO-less fractional-N PLL with a seamless lock range of fREF to 1GHz. ISSCC 2017: 154-155 - [c21]Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
23.7 A time-based receiver with 2-tap DFE for a 12Gb/s/pin single-ended transceiver of mobile DRAM interface in 0.8V 65nm CMOS. ISSCC 2017: 400-401 - 2016
- [c20]Young Jae Jang, Seong-Eun Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A low-power LDO circuit with a fast load regulation. APCCAS 2016: 47-49 - [c19]JaeHyun Seo, Byungsub Kim:
Read margin analysis in an ReRAM crossbar array. APCCAS 2016: 473-475 - [c18]Young-Ho Choi, Kihwan Seong, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
All-synthesizable 6Gbps voltage-mode transmitter for serial link. A-SSCC 2016: 245-248 - [c17]Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
All-synthesizable transmitter driver and data recovery circuit for USB2.0 interface. ISOCC 2016: 63-64 - [c16]Il-Min Yi, Seung-Jun Bae, Min-Kyun Chae, Soo-Min Lee, Young Jae Jang, Young-Chul Cho, Young-Soo Sohn, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A low-EMI four-bit four-wire single-ended DRAM interface by using a three-level balanced coding scheme. VLSI Circuits 2016: 1-2 - 2015
- [c15]Sooeun Lee, Gunbok Lee, Jae-Yoon Sim, Hong-June Park, Wee Sang Park, Byungsub Kim:
A Sample Reduction Technique by Aliasing Channel Response for Fast Equalizing Transceiver Design. ICCAD 2015: 567-574 - [c14]Jongmi Lee, Youngwoo Ji, Seungnam Choi, Young-Chul Cho, Seong-Jin Jang, Joo-Sun Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
5.7 A 29nW bandgap reference circuit. ISSCC 2015: 1-3 - [c13]Sanquan Song, Jian Xu, Fengxiang Cai, Xin Ma, Zibing Yang, Matthew Becker, Larry Tate, Byungsub Kim, Samuel Palermo, William J. Bowhill:
An input pole tuned switching equalization scheme for high-speed serial links. MWSCAS 2015: 1-4 - 2014
- [c12]Yunjae Suh, Seungnam Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
A voltage-scalable 10-b pipelined ADC with current-mode amplifier. CICC 2014: 1-4 - [c11]Jae-Seung Lee, Dong-Hee Yeo, Sang-Soo Lee, Hye-Jung Kwon, Jae-Yoon Sim, Byungsub Kim, Hong-June Park:
A 0.4 V driving multi-touch capacitive sensor with the driving signal frequency set to (n+0.5) times the inverse of the LCD VCOM noise period. ISCAS 2014: 682-685 - [c10]Dong Hoon Baek, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
2.6 A 5.67mW 9Gb/s DLL-based reference-less CDR with pattern-dependent clock-embedded signaling for intra-panel interface. ISSCC 2014: 48-49 - [c9]Seungho Han, Sooeun Lee, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
2.7 A coefficient-error-robust FFE TX with 230% eye-variation improvement without calibration in 65nm CMOS technology. ISSCC 2014: 50-51 - [c8]Ji-Yong Um, Eun-Woo Song, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Jongkeun Song, Bae-Hyung Kim, Seunghun Lee, Jihoon Bang, Youngil Kim, Kyungil Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
24.8 An analog-digital-hybrid single-chip RX beamformer with non-uniform sampling for 2D-CMUT ultrasound imaging to achieve wide dynamic range of delay and small chip area. ISSCC 2014: 426-427 - 2009
- [c7]Ajay Joshi, Byungsub Kim, Vladimir Stojanovic:
Designing Energy-Efficient Low-Diameter On-Chip Networks with Equalized Interconnects. Hot Interconnects 2009: 3-12 - [c6]Byungsub Kim, Vladimir Stojanovic:
A 4Gb/s/ch 356fJ/b 10mm equalized on-chip interconnect with nonlinear charge-injecting transmit filter and transimpedance receiver in 90nm CMOS. ISSCC 2009: 66-67 - [c5]Yong Liu, Byungsub Kim, Timothy O. Dickson, John F. Bulzacchelli, Daniel J. Friedman:
A 10Gb/s compact low-power serial I/O with DFE-IIR equalization in 65nm CMOS. ISSCC 2009: 182-183 - 2007
- [c4]Byungsub Kim, Vladimir Stojanovic:
Equalized interconnects for on-chip networks: modeling and optimization framework. ICCAD 2007: 552-559 - 2006
- [c3]Byungsub Kim, Soumyajit Mandal, Rahul Sarpeshkar:
Power-adaptive operational amplifier with positive-feedback self biasing. ISCAS 2006 - 2001
- [c2]Byungsub Kim, Tsu-Chin Tsao:
Robust repetitive controller design with improved performance. ACC 2001: 2027-2032 - [c1]Byungsub Kim, Hanwu Li, Tsu-Chin Tsao:
Control of a dual stage actuator system for noncircular cam turning process. ACC 2001: 2549-2554
Coauthor Index
[j51] [j50] [j49] [j48] [j47] [j46] [j45] [j44] [j43] [j42] [j40] [j39] [j38] [j37] [j35] [j34] [j33] [j32] [j31] [j30] [j29] [j28] [j27] [j25] [j24] [j23] [j22] [j21] [j20] [j19] [j18] [j17] [j16] [j15] [j14] [j13] [j12] [j11] [j10] [j9] [j8] [j7] [j6] [j5] [c36] [c35] [c34] [c33] [c32] [c31] [c27] [c26] [c25] [c24] [c23] [c22] [c21] [c20] [c18] [c17] [c16] [c15] [c14] [c12] [c11] [c10] [c9] [c8]
[j51] [j50] [j49] [j48] [j47] [j46] [j45] [j44] [j43] [j42] [j40] [j39] [j38] [j37] [j35] [j34] [j33] [j32] [j31] [j30] [j29] [j28] [j27] [j25] [j24] [j23] [j22] [j21] [j20] [j19] [j18] [j17] [j16] [j15] [j14] [j13] [j12] [j11] [j10] [j9] [j8] [j7] [j6] [j5] [c35] [c34] [c33] [c32] [c31] [c27] [c26] [c25] [c24] [c23] [c22] [c21] [c20] [c18] [c17] [c16] [c15] [c14] [c12] [c11] [c10] [c9] [c8]
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