default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDChih-Kong Ken Yang
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
[c38]Ali H. Hassan, Hassan Mostafa, Chih-Kong Ken Yang:
Invited Paper: A Pseudo-Differential Architecture for Low-Power Voltage-to-Time Converters. MWSCAS 2024: 437-441- [c37]Ali H. Hassan, Puneet Gupta, Sudhakar Pamarti, Chih-Kong Ken Yang:
Cryogenic Alternative: CMOS Versus Dynamic-Based Logic. MWSCAS 2024: 1007-1010 - 2022
- [j55]Li-Yang Chen
, Abhinav Kumar Vinod, James F. McMillan, Hangbo Yang, Chee Wei Wong, Chih-Kong Ken Yang:
A Pulsed-Coherent Lidar With Sub-10 μm Precision. IEEE J. Solid State Circuits 57(8): 2486-2497 (2022) - [j54]Mostafa Toubar, Yousr Ismail, Sameh Ibrahim, Chih-Kong Ken Yang:
A Scalable 20V Charge-Pump-Based Driver in 65nm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs 69(1): 55-59 (2022) - [c36]Jiazhang Song, Li-Yang Chen, Mau-Chung Frank Chang, Sudhakar Pamarti, Chih-Kong Ken Yang:
A 14-bit 1-GS/s SiGe Bootstrap Sampler for High Resolution ADC with 250-MHz Input. ISCAS 2022: 2047-2051 - 2021
- [c35]Li-Yang Chen, Abhinav Kumar Vinod, James F. McMillan, Chee Wei Wong, Chih-Kong Ken Yang:
A 6μm-Precision Pulsed-Coherent Lidar with a 40-dB Tuning Range Inverter-Based Phase-Invariant PGA. CICC 2021: 1-2 - [c34]Yan Zhang, Chia-Jen Liang, Christopher Chen, Andrew Liu, Jason Woo, Sudhakar Pamarti, Chih-Kong Ken Yang, Mau-Chung Frank Chang:
A Sub-50fs-Jitter Sub-Sampling PLL with a Harmonic-Enhanced 30-GHz-Fundemental Class-C VCO in 0.18µm SiGe BiCMOS. ESSCIRC 2021: 435-438 - [c33]Liangxiao Tang, Weixin Gai, Chih-Kong Ken Yang, Bingyi Ye, Congcong Chen:
A 25Gb/s 185mW PAM-4 Receiver with 4-Tap Adaptive DFE and Sampling Clock Optimization in 55nm CMOS. ISCAS 2021: 1-4 - 2020
- [j53]Mahmoud R. Elhebeary, Chih-Kong Ken Yang:
A 92%-Efficiency Battery Powered Hybrid DC-DC Converter for IoT Applications. IEEE Trans. Circuits Syst. 67-I(10): 3342-3351 (2020) - [j52]Mahmoud R. Elhebeary, Chih-Kong Ken Yang:
A Class-D FVF LDO With Multi-Level PWM Gate Control, 280-ns Settling Time, and No Overshoot/Undershoot. IEEE Trans. Circuits Syst. 67-I(12): 5600-5610 (2020)
2010 – 2019
- 2019
- [c32]Li-Yang Chen, Chih-Kong Ken Yang:
A 19-GHz Pulsed-Coherent ToF Receiver With 40-μm Precision for Laser Ranging Systems. ESSCIRC 2019: 191-194 - [c31]Mahmoud R. Elhebeary, Li-Yang Chen, Sudhakar Pamarti, Chih-Kong Ken Yang:
An 8.5pJ/bit Ultra-Low Power Wake-Up Receiver Using Schottky Diodes for IoT Applications. ESSCIRC 2019: 205-208 - [c30]Mahmoud R. Elhebeary, Chih-Kong Ken Yang:
An 85%-Efficiency Hybrid DC-DC Converter for Sub-Microwatt IoT Applications. MWSCAS 2019: 9-12 - 2017
- [j51]Yousr Ismail, Haechang Lee, Sudhakar Pamarti, Chih-Kong Ken Yang:
A 36-V 49% Efficient Hybrid Charge Pump in Nanometer-Scale Bulk CMOS Technology. IEEE J. Solid State Circuits 52(3): 781-798 (2017) - 2015
- [j50]Amr Amin Hafez, Ming-Shuan Chen, Chih-Kong Ken Yang:
A 32-48 Gb/s Serializing Transmitter Using Multiphase Serialization in 65 nm CMOS Technology. IEEE J. Solid State Circuits 50(3): 763-775 (2015) - [j49]Ming-Shuan Chen, Chih-Kong Ken Yang:
A 50-64 Gb/s Serializing Transmitter With a 4-Tap, LC-Ladder-Filter-Based FFE in 65 nm CMOS Technology. IEEE J. Solid State Circuits 50(8): 1903-1916 (2015) - [j48]Jintae Kim, Siamak Modjtahedi, Chih-Kong Ken Yang:
A Redundancy-Based Calibration Technique for High-Speed Digital-to-Analog Converters. IEEE Trans. Very Large Scale Integr. Syst. 23(11): 2395-2407 (2015) - [c29]Won Ho Park, Chih-Kong Ken Yang:
Effects of Active Cooling on Workload Management in High Performance Processors. CLOSER 2015: 5-16 - [c28]Ming-Shuan Chen, Mau-Chung Frank Chang, Chih-Kong Ken Yang:
A low-PDP and low-area repeater using passive CTLE for on-chip interconnects. VLSIC 2015: 244- - 2014
- [j47]Henry Park, Chih-Kong Ken Yang:
Stability Estimation of a 6T-SRAM Cell Using a Nonlinear Regression. IEEE Trans. Very Large Scale Integr. Syst. 22(1): 27-38 (2014) - [j46]Jintae Kim, Siamak Modjtahedi, Chih-Kong Ken Yang:
Flexible-Assignment Calibration Technique for Mismatch-Constrained Digital-to-Analog Converters. IEEE Trans. Very Large Scale Integr. Syst. 22(9): 1934-1944 (2014) - [c27]Yousr Ismail, Chih-Kong Ken Yang:
A 12-V charge pump-based square wave driver in 65-nm CMOS technology. A-SSCC 2014: 237-240 - [c26]Ming-Shuan Chen, Chih-Kong Ken Yang:
A 50-64 Gb/s serializing transmitter with a 4-tap, LC-ladder-filter-based FFE in 65-nm CMOS. CICC 2014: 1-4 - [c25]Yousr Ismail, Chih-Kong Ken Yang:
A compact stacked-device output driver in low-voltage CMOS Technology. ISCAS 2014: 1624-1627 - [c24]Yousr Ismail, Haechang Lee, Sudhakar Pamarti, Chih-Kong Ken Yang:
23.8 A 34V charge pump in 65nm bulk CMOS technology. ISSCC 2014: 408-409 - 2013
- [j45]Tamer A. Ali, Robert J. Drost, Ron Ho, Chih-Kong Ken Yang:
A 100+ Meter 12 Gb/s/Lane Copper Cable Link Based on Clock-Forwarding. IEEE J. Solid State Circuits 48(4): 1085-1098 (2013) - [j44]Henry Park, Chih-Kong Ken Yang:
In Situ SRAM Static Stability Estimation in 65-nm CMOS. IEEE J. Solid State Circuits 48(10): 2541-2549 (2013) - [j43]Ming-Shuan Chen, Amr Amin Hafez, Chih-Kong Ken Yang:
A 0.1-1.5 GHz 8-bit Inverter-Based Digital-to-Phase Converter Using Harmonic Rejection. IEEE J. Solid State Circuits 48(11): 2681-2692 (2013) - [j42]Henry Park, Chih-Kong Ken Yang:
An INL Yield Model of the Digital-to-Analog Converter. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(3): 582-592 (2013) - [j41]Amr Amin Hafez, Chih-Kong Ken Yang:
Analysis and Design of Superharmonic Injection-Locked Multipath Ring Oscillators. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(7): 1712-1725 (2013) - [j40]Fengbo Ren, Henry Park, Chih-Kong Ken Yang, Dejan Markovic:
Reference Calibration of Body-Voltage Sensing Circuit for High-Speed STT-RAMs. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(11): 2932-2939 (2013) - [j39]Won Ho Park, Chih-Kong Ken Yang:
Effects of Using Advanced Cooling Systems on the Overall Power Consumption of Processors. IEEE Trans. Very Large Scale Integr. Syst. 21(9): 1644-1654 (2013) - [c23]Yousr Ismail, Chang-Jin Kim, Chih-Kong Ken Yang:
A bipolar >40-V driver in 45-nm SOI CMOS technology. CICC 2013: 1-4 - [c22]Ramy Yousry, Henry Park, E-Hung Chen, Chih-Kong Ken Yang:
A digitally-calibrated 10GS/s reconfigurable flash ADC in 65-nm CMOS. ISCAS 2013: 2443-2447 - [c21]Amr Amin Hafez, Ming-Shuan Chen, Chih-Kong Ken Yang:
A 32-to-48Gb/s serializing transmitter using multiphase sampling in 65nm CMOS. ISSCC 2013: 38-39 - 2012
- [j38]E-Hung Chen, Ramy Yousry, Chih-Kong Ken Yang:
Power Optimized ADC-Based Serial Link Receiver. IEEE J. Solid State Circuits 47(4): 938-951 (2012) - [j37]Henry Park, Chih-Kong Ken Yang:
Nearly Exact Analytical Formulation of the DNL Yield of the Digital-to-Analog Converter. IEEE Trans. Circuits Syst. II Express Briefs 59-II(9): 563-567 (2012) - [c20]Ming-Shuan Chen, Chih-Kong Ken Yang:
A low-power highly multiplexed parallel PRBS generator. CICC 2012: 1-4 - [c19]Fengbo Ren, Henry Park, Richard Dorrance, Yuta Toriyama, Chih-Kong Ken Yang, Dejan Markovic:
A body-voltage-sensing-based short pulse reading circuit for spin-torque transfer RAMs (STT-RAMs). ISQED 2012: 275-282 - [c18]Tamer A. Ali, Won Ho Park, Preeti Mulage, E-Hung Chen, Ron Ho, Chih-Kong Ken Yang:
A 100+ meter 12Gb/s/lane copper cable link based on clock-forwarding. VLSIC 2012: 108-109 - 2011
- [j36]Jaeha Kim, E-Hung Chen, Jihong Ren, Brian S. Leibowitz, Patrick Satarzadeh, Jared Zerbe, Chih-Kong Ken Yang:
Equalizer Design and Performance Trade-Offs in ADC-Based Serial Links. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(9): 2096-2107 (2011) - [j35]Amr Amin Hafez, Chih-Kong Ken Yang:
Design and Optimization of Multipath Ring Oscillators. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(10): 2332-2345 (2011) - [j34]Jintae Kim, S. Limotyrakis, Chih-Kong Ken Yang:
Multilevel Power Optimization of Pipelined A/D Converters. IEEE Trans. Very Large Scale Integr. Syst. 19(5): 832-845 (2011) - [c17]Tamer A. Ali, Amr Amin Hafez, Robert J. Drost, Ronald Ho, Chih-Kong Ken Yang:
A 4.6GHz MDLL with -46dBc reference spur and aperture position tuning. ISSCC 2011: 466-468 - [c16]Richard Dorrance, Fengbo Ren, Yuta Toriyama, Amr Amin Hafez, Chih-Kong Ken Yang, Dejan Markovic:
Scalability and design-space analysis of a 1T-1MTJ memory cell. NANOARCH 2011: 32-36 - [c15]Henry Park, Richard Dorrance, Amr Amin Hafez, Fengbo Ren, Dejan Markovic, Chih-Kong Ken Yang:
Analysis of STT-RAM cell design with multiple MTJs per access. NANOARCH 2011: 53-58 - 2010
- [j33]Ping-Hsuan Hsieh, Jay Maxey, Chih-Kong Ken Yang:
A Phase-Selecting Digital Phase-Locked Loop With Bandwidth Tracking in 65-nm CMOS Technology. IEEE J. Solid State Circuits 45(4): 781-792 (2010) - [j32]Jintae Kim, Lieven Vandenberghe, Chih-Kong Ken Yang:
Convex Piecewise-Linear Modeling Method for Circuit Optimization via Geometric Programming. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(11): 1823-1827 (2010) - [j31]Vladimir Stojanovic, Chih-Kong Ken Yang, Ron Ho:
Guest Editorial for Special Issue on High-Performance Multichip Interconnections. IEEE Trans. Circuits Syst. II Express Briefs 57-II(5): 317-318 (2010) - [j30]E-Hung Chen, Chih-Kong Ken Yang:
ADC-Based Serial I/O Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2248-2258 (2010) - [c14]Tamer A. Ali, Dinesh Patil, Frankie Liu, Elad Alon, Jon K. Lexau, Chih-Kong Ken Yang, Ron Ho:
Clocking Links in Multi-chip Packages: A Case Study. Hot Interconnects 2010: 96-103
2000 – 2009
- 2009
- [j29]Li-min Lee, Chih-Kong Ken Yang:
An LC-Based Clock Buffer With Tunable Injection Locking. IEEE J. Solid State Circuits 44(3): 797-807 (2009) - [j28]Aida Varzaghani, Chih-Kong Ken Yang:
A 4.8 GS/s 5-bit ADC-Based Receiver With Embedded DFE for Signal Equalization. IEEE J. Solid State Circuits 44(3): 901-915 (2009) - [j27]Ping-Hsuan Hsieh, Jay Maxey, Chih-Kong Ken Yang:
Minimizing the Supply Sensitivity of a CMOS Ring Oscillator Through Jointly Biasing the Supply and Control Voltages. IEEE J. Solid State Circuits 44(9): 2488-2495 (2009) - [c13]Chih-Kong Ken Yang, E-Hung Chen:
ADC-based serial I/O receivers. CICC 2009: 323-330 - [c12]Ping-Hsuan Hsieh, Jay Maxey, Chih-Kong Ken Yang:
A nonlinear phase detector for digital phase locked loops. CICC 2009: 335-338 - [c11]James R. Burnham, Chih-Kong Ken Yang, Haitham A. Hindi:
A stochastic jitter model for analyzing digital timing-recovery circuits. DAC 2009: 116-121 - 2008
- [j26]E-Hung Chen, Jihong Ren, Brian S. Leibowitz, Hae-Chang Lee, Qi Lin, Kyung Suk Oh, Frank Lambrecht, Vladimir Stojanovic, Jared Zerbe, Chih-Kong Ken Yang:
Near-Optimal Equalizer and Timing Adaptation for I/O Links Using a BER-Based Metric. IEEE J. Solid State Circuits 43(9): 2144-2156 (2008) - [j25]Jackie Koon Lun Wong, E-Hung Chen, Chih-Kong Ken Yang:
Edge and Data Adaptive Equalization of Serial-Link Transceivers. IEEE J. Solid State Circuits 43(9): 2157-2169 (2008) - [j24]Utku Seckin, Chih-Kong Ken Yang:
A Comprehensive Delay Model for CMOS CML Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(9): 2608-2618 (2008) - [c10]Ping-Hsuan Hsieh, Jay Maxey, Chih-Kong Ken Yang:
Minimizing the supply sensitivity of CMOS ring oscillator by jointly biasing the supply and control voltage. CICC 2008: 531-534 - 2007
- [j23]Jackie Koon Lun Wong, Alexander V. Rylyakov, Chih-Kong Ken Yang:
A 5-mW 6-Gb/s Quarter-Rate Sampling Receiver With a 2-Tap DFE Using Soft Decisions. IEEE J. Solid State Circuits 42(4): 881-888 (2007) - [j22]Azita Emami-Neyestanak, Aida Varzaghani, John F. Bulzacchelli, Alexander V. Rylyakov, Chih-Kong Ken Yang, Daniel J. Friedman:
A 6.0-mW 10.0-Gb/s Receiver With Switched-Capacitor Summation DFE. IEEE J. Solid State Circuits 42(4): 889-896 (2007) - [j21]Jintae Kim, Hamid Hatamkhani, Chih-Kong Ken Yang:
A Large-Swing Transformer-Boosted Serial Link Transmitter With > VDD Swing. IEEE J. Solid State Circuits 42(5): 1131-1142 (2007) - [j20]Ping-Hsuan Hsieh, Chih-Kong Ken Yang:
Technique to Reduce the Resolution Requirement of Digitally Controlled Oscillators for Digital PLLs. IEEE Trans. Circuits Syst. II Express Briefs 54-II(3): 237-241 (2007) - [j19]Jaeseo Lee, Geoff Hatcher, Lieven Vandenberghe, Chih-Kong Ken Yang:
Evaluation of Fully-Integrated Switching Regulators for CMOS Process Technologies. IEEE Trans. Very Large Scale Integr. Syst. 15(9): 1017-1027 (2007) - [c9]James R. Burnham, Gu-Yeon Wei, Chih-Kong Ken Yang, Haitham A. Hindi:
A Comprehensive Phase-Transfer Model for Delay-Locked Loops. CICC 2007: 627-630 - [c8]Jintae Kim, Ritesh Jhaveri, Jason Woo, Chih-Kong Ken Yang:
Device-circuit co-optimization for mixed-mode circuit design via geometric programming. ICCAD 2007: 470-475 - [c7]Li-min Lee, Chih-Kong Ken Yang:
An Adaptive Low-Jitter LC-Based Clock Distribution. ISSCC 2007: 182-595 - 2006
- [j18]Jan Van der Spiegel, Ram K. Krishnamurthy, Sreedhar Natarajan, Chih-Kong Ken Yang:
Introduction to the Special Issue on the 2005 IEEE International Solid-State Circuits Conference. IEEE J. Solid State Circuits 41(1): 3-6 (2006) - [j17]Li-min Lee, Daniel Weinlader, Chih-Kong Ken Yang:
A sub-10-ps multiphase sampling system using redundancy. IEEE J. Solid State Circuits 41(1): 265-273 (2006) - [j16]Aida Varzaghani, Chih-Kong Ken Yang:
A 600-MS/s 5-bit pipeline A/D converter using digital reference calibration. IEEE J. Solid State Circuits 41(2): 310-319 (2006) - [j15]Aida Varzaghani, Chih-Kong Ken Yang:
A 6-GSamples/s multi-level decision feedback equalizer embedded in a 4-bit time-interleaved pipeline A/D converter. IEEE J. Solid State Circuits 41(4): 935-944 (2006) - [j14]Hamid Hatamkhani, Chih-Kong Ken Yang:
A Study of the Optimal Data Rate for Minimum Power of I/Os. IEEE Trans. Circuits Syst. II Express Briefs 53-II(11): 1230-1234 (2006) - [c6]Hamid Hatamkhani, Frank Lambrecht, Vladimir Stojanovic, Chih-Kong Ken Yang:
Power-centric design of high-speed I/Os. DAC 2006: 867-872 - [c5]Koon-Lun Jackie Wong, Chih-Kong Ken Yang:
A Serial-Link Transceiver with Transition Equalization. ISSCC 2006: 223-232 - [c4]Jintae Kim, Hamid Hatamkhani, Chih-Kong Ken Yang:
An 8Gb/s Transformer-Boosted Transmitter with >V00 swing. ISSCC 2006: 283-292 - 2004
- [j13]Jackie Koon Lun Wong, Hamid Hatamkhani, Mozhgan Mansuri, Chih-Kong Ken Yang:
A 27-mW 3.6-gb/s I/O transceiver. IEEE J. Solid State Circuits 39(4): 602-612 (2004) - [j12]Koon-Lun Jackie Wong, Chih-Kong Ken Yang:
Offset compensation in comparators with minimum input-referred supply noise. IEEE J. Solid State Circuits 39(5): 837-840 (2004) - 2003
- [j11]Mozhgan Mansuri, Chih-Kong Ken Yang:
A low-power adaptive bandwidth PLL and clock buffer with supply-noise compensation. IEEE J. Solid State Circuits 38(11): 1804-1812 (2003) - [j10]Mozhgan Mansuri, A. Hadiashar, Chih-Kong Ken Yang:
Methodology for on-chip adaptive jitter minimization in phase-locked loops. IEEE Trans. Circuits Syst. II Express Briefs 50(11): 870-878 (2003) - [c3]Chih-Kong Ken Yang, Koon-Lun Jackie Wong:
Analysis of timing recovery for multi-Gbps PAM transceivers. CICC 2003: 67-72 - [c2]Ping-Hsuan Hsieh, Jack Judy, Chih-Kong Ken Yang:
CMOS LC oscillator using variable mean frequency. CICC 2003: 147-150 - [c1]Jaeseo Lee, Geoff Hatcher, Lieven Vandenberghe, Chih-Kong Ken Yang:
Evaluation of fully-integrated switching regulators for CMOS process technologies. SoC 2003: 155-158 - 2002
- [j9]Mozhgan Mansuri, Dean Liu, Chih-Kong Ken Yang:
Fast frequency acquisition phase-frequency detectors for Gsamples/s phase-locked loops. IEEE J. Solid State Circuits 37(10): 1331-1334 (2002) - [j8]Mozhgan Mansuri, Chih-Kong Ken Yang:
Jitter optimization based on phase-locked loop design parameters. IEEE J. Solid State Circuits 37(11): 1375-1382 (2002) - 2001
- [j7]Chih-Kong Ken Yang, Vladimir Stojanovic, Siamak Modjtahedi, Mark A. Horowitz, William F. Ellersick:
A serial-link transceiver based on 8-GSamples/s A/D and D/A converters in 0.25-μm CMOS. IEEE J. Solid State Circuits 36(11): 1684-1692 (2001) - 2000
- [j6]Ramin Farjad-Rad, Chih-Kong Ken Yang, Mark A. Horowitz, Thomas H. Lee:
A 0.3-μm CMOS 8-Gb/s 4-PAM serial link transceiver. IEEE J. Solid State Circuits 35(5): 757-764 (2000)
1990 – 1999
- 1999
- [j5]Ramin Farjad-Rad, Chih-Kong Ken Yang, Mark A. Horowitz, Thomas H. Lee:
A 0.4-μm CMOS 10-Gb/s 4-PAM pre-emphasis serial link transmitter. IEEE J. Solid State Circuits 34(5): 580-585 (1999) - [j4]Katayoun Falakshahi, Chih-Kong Ken Yang, Bruce A. Wooley:
A 14-bit, 10-Msamples/s D/A converter using multibit ΣΔ modulation. IEEE J. Solid State Circuits 34(5): 607-615 (1999) - 1998
- [j3]Chih-Kong Ken Yang, Ramin Farjad-Rad, Mark A. Horowitz:
A 0.5-μm CMOS 4.0-Gbit/s serial link transceiver with data recovery using oversampling. IEEE J. Solid State Circuits 33(5): 713-722 (1998) - [j2]Mark Horowitz, Chih-Kong Ken Yang, Stefanos Sidiropoulos:
High-speed electrical signaling: overview and limitations. IEEE Micro 18(1): 12-24 (1998) - 1996
- [j1]Chih-Kong Ken Yang, Mark A. Horowitz:
A 0.8-μm CMOS 2.5 Gb/s oversampling receiver and transmitter for serial links. IEEE J. Solid State Circuits 31(12): 2015-2023 (1996)
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-11 18:22 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
