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ORCIDIEEE Transactions on Circuits and Systems II: Express Briefs, Volume 50
Volume 50, Number 1, January 2003
- Rola A. Baki, Charif Beainy, Mourad N. El-Gamal:
Distortion analysis of high-frequency log-domain filters using Volterra series. 1-11 - Ngai Wong, Tung-Sang Ng:
DC stability analysis of high-order, lowpass ΣΔ modulators with distinct unit circle NTF zeros. 12-30 - Omid Oliaei:
State-space analysis of clock jitter in continuous-time oversampling data converters. 31-37 - Che-Hong Chen, Bin-Da Liu, Jar-Ferr Yang:
Recursive architectures for realizing modified discrete cosine transform and its inverse. 38-45
Volume 50, Number 2, February 2003
- Amr M. Fahim, Mohamed I. Elmasry:
A wideband sigma-delta phase-locked-loop modulator for wireless applications. 53-62 - Amr M. Fahim, Mohamed I. Elmasry:
A fast lock digital phase-locked-loop architecture for wireless applications. 63-72 - Sung-Won Lee, In-Cheol Park
:
A low-power variable length decoder for MPEG-2 based on successive decoding of short codewords. 73-82 - Jinwen Zan, M. Omair Ahmad, M. N. S. Swamy:
Pyramidal motion estimation techniques exploiting intra-level motion correlation. 83-93 - Corneliu Rusu, Pauli Kuosmanen:
Phase approximation by logarithmic sampling of gain. 93-101
Volume 50, Number 3, March 2003
- Saska Lindfors, Aarno Pärssinen, Kari A. I. Halonen:
A 3-V 230-MHz CMOS decimation subsampler. 105-117 - Aria Eshraghi, Terri S. Fiez:
A time-interleaved parallel /ΔΣ A/D converter. 118-129 - Liming Xiu, Zhihong You:
A new frequency synthesis method based on "flying-adder" architecture. 130-134 - Francisco Cardells-Tormo, Javier Valls-Coquillat:
Area-optimized implementation of quadrature direct digital frequency synthesizers on LUT-based FPGAs. 135-138 - Zidong Wang, Xiaohui Liu:
On designing H∞ filters with circular pole and error variance constraints. 139-143 - Min Li, Chi-Wah Kok:
Linear phase filter bank design using LMI-based H∞ optimization. 143-149 - Dusan Veselinovic, Daniel Graupe:
A wavelet transform approach to blind adaptive filtering of speech from unknown noises. 150-154
Volume 50, Number 4, April 2003
- Pieter Rombouts, Johan Raman, Ludo Weyten:
An approach to tackle quantization noise folding in double-sampling ΣΔ modulation A/D converters. 157-163 - Håkan Johansson, Per Löwenborg:
On the design of adjustable fractional delay FIR filters. 164-169 - Zhaohui Liu, John V. McCanny, Gaye Lightbody, Richard L. Walke:
Generic SoC QR array processor for adaptive beamforming. 169-175 - Thomas A. D. Riley, Juha Kostamovaara:
A hybrid ΔΣ fractional-N frequency synthesizer. 176-180 - H. Kulah, T. Akin:
A current mirroring integration based readout circuit for high performance infrared FPA applications. 181-186 - Rosario Mita, Gaetano Palumbo, Salvatore Pennisi:
1.5-V CMOS CCII+ with high current-driving capability. 187-190 - Jader A. De Lima, Adriano S. Cordeiro:
A low-voltage low-power analog memory cell with built-in 4-quadrant multiplication. 191-195 - Simone Fiori:
Extended Hebbian learning for blind separation of complex-valued sources. 195-202
Volume 50, Number 5, May 2003
- Michael P. Flynn, Conor Donovan, L. Sattler:
Digital calibration incorporating redundancy of flash ADCs. 205-213 - Jaime Ramírez-Angulo, Carlos Urquidi, Ramón González Carvajal, Antonio Torralba, Antonio J. López-Martín:
A new family of very low-voltage analog circuits based on quasi-floating-gate transistors. 214-220 - T. K. Pham, P. E. Allen:
A highly accurate step-response-based successive-approximation frequency tuning scheme for high-Q continuous-time bandpass filters. 221-227 - Rosario Mita, Gaetano Palumbo, Salvatore Pennisi:
Design guidelines for reversed nested Miller compensation in three-stage amplifiers. 227-233 - Nguyen T. Thao:
Asymptotic MSE law of nth-order ΣΔ modulators. 234-238 - Yeun-Ting Fong, Chi-Wah Kok:
Iterative least squares design of DC-leakage free paraunitary cosine modulated filter banks. 238-243 - Tian-Bo Deng:
Design and parallel implementation of FIR digital filters with simultaneously variable magnitude and non-integer phase-delay. 243-250 - Antonio G. M. Strollo, Davide De Caro:
Booth folding encoding for high performance squarer circuits. 250-254
Volume 50, Number 6, June 2003
- Yong Ching Lim, Ya Jun Yu:
A width-recursive depth-first tree search approach for the design of discrete coefficient perfect reconstruction lattice filter bank. 257-266 - Tian-Bo Deng:
Design of linear-phase variable 2-D digital filters using matrix-array decomposition. 267-277 - Hussain A. Alzaher, Hassan O. Elwan, Mohammed Ismail:
A CMOS fully balanced second-generation current conveyor. 278-287 - Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Toshifumi Watanabe, Tadahiro Ohmi:
Extraction of instantaneous and RMS sinusoidal jitter using an analytic signal method. 288-298 - Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling, Wei Cai:
Behavioral modeling for analog system-level simulation by wavelet collocation method. 299-314 - Mustafa Keskin:
A novel low-voltage switched-capacitor input branch. 315-317 - Javier Valls, Eduardo I. Boemo:
Efficient FPGA-implementation of two's complement digit-serial/parallel multipliers. 317-322 - Yun-Nan Chang, Keshab K. Parhi:
An efficient pipelined FFT architecture. 322-325 - Costas Psychalinos, Spyridon Vlassis:
On the exact realization of log-domain elliptic filters using the signal flow graph approach. 325
Volume 50, Number 7, July 2003
- Tina A. Hudson, Julian A. Bragg, Paul E. Hasler, Stephen P. DeWeerth:
An analog VLSI model of muscular contraction. 329-342 - Juha Häkkinen, Juha Kostamovaara:
Speeding up an integer-N PLL by controlling the loop filter charge. 343-354 - Per Löwenborg, Håkan Johansson, Lars Wanhammar:
Two-channel digital and hybrid analog/digital multirate filter banks with very low-complexity analysis or synthesis filters. 355-367 - Saman S. Abeysekera, Xue Yao, Charoensak Charayaphan:
Design of optimal and narrow-band Laguerre filters for sigma-delta demodulators. 368-375 - Eduard F. Stikvoort:
Polyphase filter section with opamps. 376-378 - Haijiang Ou, K. K. Chin:
Theory of gated multicycle integration (GMCI) for repetitive imaging of focal plane array. 378-383 - Roberto López-Valcarce, Fernando Pérez-González:
Subband hyperstable adaptive IIR filters. 383-389 - Beth Wilson, Magdy A. Bayoumi:
A computational kernel for fast and efficient compressed-domain calculations of wavelet subband energies. 389-392
Volume 50, Number 8, August 2003
- L. Lentola, A. Mozzi, Andrea Neviani, Andrea Baschirotto:
A 1-μA front end for pacemaker atrial sensing channels with early sensing capability. 397-403 - José L. Ausín, J. Francisco Duque-Carrillo, Guido Torelli, Edgar Sánchez-Sinencio:
Switched-capacitor circuits with periodical nonuniform individual sampling. 404-414 - Hengsheng Liu, Aydin I. Karsilayan:
An accurate automatic tuning scheme for high-Q continuous-time bandpass filters based on amplitude comparison. 415-423 - Hui Pan, Asad A. Abidi:
Spatial filtering in flash A/D converters. 424-436 - Omid Oliaei:
Design of continuous-time sigma-delta modulators with arbitrary feedback waveform. 437-444 - Ka-Wai Ho, Howard C. Luong:
A 1-V CMOS power amplifier for Bluetooth applications. 445-449 - Joseph M. C. Wong, Howard C. Luong:
A 1.5-V 4-GHz dynamic-loading regenerative frequency doubler in a 0.35-μm CMOS process. 450-455 - Shahriar Mirabbasi, Ken Martin:
Overlapped complex-modulated transmultiplexer filters with simplified design and superior stopbands. 456-469 - Tian-Bo Deng, Eiji Okamoto:
SVD-based design of fractional-delay 2-D digital filters exploiting specification symmetries. 470-480 - Alexandru A. Ciubotaru:
Absolute-value circuit using junction field-effect transistors. 481-484 - Romano Fantacci, Mauro Forti, Mauro Marini, Daniele Tarchi, Gianluca Vannuccini:
A neural network for constrained optimization with application to CDMA communication systems. 484-487 - Giovanni Dimauro, Sebastiano Impedovo, Raffaele Modugno, Giuseppe Pirlo, R. Stefanelli:
Residue-to-binary conversion by the "quotient function". 488-493 - Sunder S. Kidambi:
Comments on "2-D FIR filters design using least square error with scaling-free McClellan transformation". 493
Volume 50, Number 9, September 2003
- Andre Tkacenko, P. P. Vaidyanathan, T. Q. Nguyen:
On the eigenfilter design method and its applications: a tutorial. 497-517 - Omid Oliaei:
Sigma-delta modulator with spectrally shaped feedback. 518-530 - Jipeng Li, Un-Ku Moon:
Background calibration techniques for multistage pipelined ADCs with digital redundancy. 531-538 - Anthony Chan Carusone, David A. Johns:
Digital LMS adaptation of analog filters without gradient information. 539-552 - Hao-Chiao Hong, Jiun-Lang Huang, Kwang-Ting Cheng, Cheng-Wen Wu, Ding-Ming Kwai:
Practical considerations in applying Σ-Δ modulation-based analog BIST to sampled-data systems. 553-566 - J. M. Pierre Langlois, Dhamin Al-Khalili:
Novel approach to the design of direct digital frequency synthesizers based on linear interpolation. 567-578 - Alex C. H. MeVay, Rahul Sarpeshkar:
Predictive comparators with adaptive control. 579-588 - Cheng-Shing Wu, An-Yeu Wu, Chih-Hsiu Lin:
A high-performance/low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes. 589-601 - Yuanjin Zheng, Zhiping Lin:
Recursive adaptive algorithms for fast and rapidly time-varying systems. 602-614 - Liqian Zhang, Biao Huang, James Lam:
LMI synthesis of H2 and mixed H2/H∞ controllers for singular systems. 615-626 - Koichi Ishida, Minoru Fujishima:
Chopper-stabilized high-pass sigma delta modulator utilizing a resonator structure. 627-631 - Ahmed M. A. Ali, K. Nagaraj:
Background calibration of operational amplifier gain error in pipelined A/D converters. 631-634 - Shahin Jafarabadi-Ashtiani, Omid Shoaei, S. M. Rezaul Hasan, Azam Jannesari:
On the parasitic-sensitivity of switched-capacitor summing-integrator structures for ΣΔ modulators. 634-640 - Kong-Pang Pun, José E. da Franca, Carlos Azeredo Leme, Ricardo Reis:
Quadrature sampling schemes with improved image rejection. 641-648 - Apisak Worapishet, John B. Hughes, Christofer Toumazou:
Low-power high-frequency class-AB two-step sampling switched-current techniques. 649-653 - Chien-Cheng Tseng:
Design of IIR digital all-pass filters using least pth phase error criterion. 653-656 - Dean J. Schmidlin:
Modeling of fractional-order signals from their ramp cepstra. 657-659 - Yang Shi, Tongwen Chen:
Optimal design of multichannel transmultiplexers with stopband energy and passband magnitude constraints. 659-662 - Krzysztof Galkowski, Wojciech Paszke, Eric Rogers, Shengyuan Xu, James Lam, David H. Owens:
Stability and control of differential linear repetitive processes using an LMI setting. 662-666 - Li Xu, Jiang Qian Ying, Zhiping Lin, Osami Saito:
Comments on "Stability tests of N-dimensional discrete time systems using polynomial arrays. 666-669
Volume 50, Number 10, October 2003
- José SilJosé Silva-Martínez:
Guest editorial. 673-674 - Jingyu Huang, Richard R. Spencer:
The design of analog front ends for 1000BASE-T receivers. 675-684 - William B. Kuhn, Dan Nobbe, Dylan Kelly, Aaron W. Orsborn:
Dynamic range performance of on-chip RF bandpass filters. 685-694 - Roberto Gómez-García, José I. Alonso, Cesar Briso-Rodríguez:
On the design of high-linear and low-noise two-branch channelized active bandpass filters. 695-704 - Bogdan Georgescu, Holly Pekau, James W. Haslett, John G. McRory:
Tunable coupled inductor Q-enhancement for parallel resonant LC tanks. 705-713 - Yorgos Palaskas, Yannis P. Tsividis:
Dynamic range optimization of weakly nonlinear, fully balanced, Gm-C filters with power dissipation constraints. 714-727 - Eric A. M. Klumperink, Bram Nauta:
Systematic comparison of HF CMOS transconductors. 728-741 - Ahmed A. Emira, Edgar Sánchez-Sinencio:
A pseudo differential complex filter for Bluetooth with frequency tuning. 742-754 - Taner Sumesaglam, Aydin I. Karsilayan:
A digital approach for automatic tuning of continuous-time high-Q filters. 755-761 - A. N. Mohieldin, Edgar Sánchez-Sinencio, José Silva-Martínez:
Nonlinear effects in pseudo differential OTAs with CMFB. 762-770
Volume 50, Number 11, November 2003
- Michael H. Perrott, Gu-Yeon Wei:
Guest editorial. 773-774 - Youngdon Choi, Deog-Kyoon Jeong, Wontae Kim:
Jitter transfer analysis of tracked oversampling techniques for multigigabit clock and data recovery. 775-783 - Bram De Muer, Michiel S. J. Steyaert:
On the analysis of ΔΣ fractional-N frequency synthesizers for high-spectral purity. 784-793 - Tom A. D. Riley, Norman M. Filiol, Qinghong Du, Juha Kostamovaara:
Techniques for in-band phase noise reduction in ΔΣ synthesizers. 794-803 - Gabriele Manganaro, Sung-Ung Kwak, SeongHwan Cho, Anurag Pulincherry:
A behavioral modeling approach to the design of a low jitter clock source. 804-814 - Robert Bogdan Staszewski, Dirk Leipold, Khurram Muhammad, Poras T. Balsara:
Digitally controlled oscillator (DCO)-based architecture for RF frequency synthesis in a deep-submicrometer CMOS Process. 815-828 - Sudhakar Pamarti, Ian Galton:
Phase-noise cancellation design tradeoffs in delta-sigma fractional-N PLLs. 829-838 - Scott E. Meninger, Michael H. Perrott:
A fractional- N frequency synthesizer architecture utilizing a mismatch compensated PFD/DAC structure for reduced quantization-induced phase noise. 839-849 - Marco Cassia, Peter Shah, Erik Bruun:
Analytical model and behavioral simulation approach for a ΣΔ fractional-N synthesizer employing a sample-hold element. 850-859 - Jaeha Kim, Mark A. Horowitz, Gu-Yeon Wei:
Design of CMOS adaptive-bandwidth PLL/DLLs: a general approach. 860-869 - Mozhgan Mansuri, A. Hadiashar, Chih-Kong Ken Yang:
Methodology for on-chip adaptive jitter minimization in phase-locked loops. 870-878 - Pavan Kumar Hanumolu, Bryan Casper, Randy Mooney, Gu-Yeon Wei, Un-Ku Moon:
Analysis of PLL clock jitter in high-speed serial links. 879-886 - Robert Bogdan Staszewski, Dirk Leipold, Poras T. Balsara:
Just-in-time gain estimation of an RF digitally-controlled oscillator for digital direct frequency modulation. 887-892 - Kuo-Hsing Cheng, Wei-Bin Yang, Cheng-Ming Ying:
A dual-slope phase frequency detector and charge pump architecture to achieve fast locking of phase-locked loop. 892-896 - Gijun Idei, Hiroaki Kunieda:
A false-lock-free clock/data recovery PLL for NRZ data using adaptive phase frequency detector. 896-900
Volume 50, Number 12, December 2003
- Ian Galton:
Editorial. 905 - Ojas Choksi, L. Richard Carley:
Analysis of switched-capacitor common-mode feedback circuit. 906-917 - Carlos Aristoteles De la Cruz-Blas, Antonio J. López-Martín, Alfonso Carlosena:
1.5-V MOS translinear loops with improved dynamic range and their applications to current-mode signal processing. 918-927 - Rasoul Dehghani, Seyed Mojtaba Atarodi:
A new low voltage precision CMOS current reference with no external components. 928-932 - P. K. Chan, Y. C. Chen:
Gain-enhanced feedforward path compensation technique for pole-zero cancellation at heavy capacitive loads. 933-941 - Yue Wu, Xiaohui Ding, Mohammed Ismail, Håkan K. Olsson:
RF bandpass filter design based on CMOS active inductors. 942-949 - Brent Buchanan, Martin A. Brooke:
An experimental evaluation of error spectrum shaping applied to mixed-signal image convolutions. 950-962 - Ying-Jui Chen, Kevin Amaratunga:
M-channel lifting factorization of perfect reconstruction filter banks and reversible M-band wavelet transforms. 963-976 - Kazuyoshi Uesaka, Masayuki Kawamata:
Evolutionary synthesis of digital filter structures using genetic programming. 977-983 - Sang-Min Kim, Jin-Gyun Chung, Keshab K. Parhi:
Low error fixed-width CSD multiplier with efficient sign extension. 984-993 - Joel H. Vuolevi, Timo Rahkonen:
Analysis of third-order intermodulation distortion in common-emitter BJT and HBT amplifiers. 994-1001 - Morteza Vadipour:
Gradient error cancellation and quadratic error reduction in unary and binary D/A converters. 1002-1007 - Andrea Bonfanti, F. Amorosa, Carlo Samori, Andrea L. Lacaita:
A DDS-based PLL for 2.4-GHz frequency synthesis. 1007-1010 - Ángel M. Bravo, Fernando Cruz-Roldán:
Digital quadrature demodulator with four phases mixing for digital radio receivers. 1011-1015 - Gennaro Evangelista:
Roundoff noise analysis in digital systems for arbitrary sampling rate conversion. 1016-1023 - Wei Xing Zheng:
Adaptive filter design subject to output envelope constraints and bounded input noise. 1023-1026
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