"A 4.8 GS/s 5-bit ADC-Based Receiver With Embedded DFE for Signal Equalization."

Aida Varzaghani, Chih-Kong Ken Yang (2009)

Details and statistics

DOI: 10.1109/JSSC.2009.2013765

access: closed

type: Journal Article

metadata version: 2020-08-30

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