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ORCIDQiang Xu 0001
Person information
- affiliation: Chinese University of Hong Kong, Department of Computer Science and Engineering, Hong Kong
- affiliation (PhD 2005): McMaster University, Hamilton, ON, Canada
Other persons with the same name
- Qiang Xu — disambiguation page
- Qiang Xu 0002
![[0000-0002-5903-9781]](https://dblp1.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-5903-9781")
— University of Huddersfield, School of Computing and Engineering, UK (and 4 more) - Qiang Xu 0003 — Lamar University, Dan F. Smith Department of Chemical Engineering, Beaumont, TX, USA
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Books and Theses
- 2014
[b1]Xiao Liu, Qiang Xu:
Trace-Based Post-Silicon Validation for VLSI Circuits. Lecture Notes in Electrical Engineering 252, Springer 2014, ISBN 978-3-319-00532-4, pp. 1-102
Journal Articles
- 2020
- [j33]Qiuxia Lai, Yongwei Nie, Hanqiu Sun, Qiang Xu, Zhensong Zhang, Mingyu Xiao:
Video super-resolution via pre-frame constrained and deep-feature enhanced sparse reconstruction. Pattern Recognit. 100: 107139 (2020) - [j32]Qian Zhang, Qiang Xu:
ApproxIt: A Quality Management Framework of Approximate Computing for Iterative Methods. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(5): 991-1002 (2020) - 2019
- [j31]Li Jiang, Zhuoran Song, Haiyue Song, Chengwen Xu, Qiang Xu, Naifeng Jing, Weifeng Zhang, Xiaoyao Liang:
Energy-Efficient and Quality-Assured Approximate Computing Framework Using a Co-Training Method. ACM Trans. Design Autom. Electr. Syst. 24(6): 59:1-59:25 (2019) - 2018
- [j30]Qiang Han, Qiang Xu, Wen-Ben Jone:
SERA: statistical error rate analysis for profit-oriented performance binning of resilient circuits. Integr. 60: 1-12 (2018) - [j29]Xiaoming Chen, Qiaoyi Liu, Song Yao, Jia Wang, Qiang Xu, Yu Wang, Yongpan Liu, Huazhong Yang:
Hardware Trojan Detection in Third-Party Digital Intellectual Property Cores by Multilevel Feature Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(7): 1370-1383 (2018) - 2016
- [j28]Qiang Xu, Todd Mytkowicz, Nam Sung Kim:
Guest Editors' Introduction: Approximate Computing. IEEE Des. Test 33(1): 6-7 (2016) - [j27]Qiang Xu, Todd Mytkowicz, Nam Sung Kim:
Approximate Computing: A Survey. IEEE Des. Test 33(1): 8-22 (2016) - [j26]Tianjian Li, Feng Xie, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty, Naifeng Jing, Li Jiang:
A Novel Test Method for Metallic CNTs in CNFET-Based SRAMs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(7): 1192-1205 (2016) - 2015
- [j25]Jie Zhang, Feng Yuan, Lingxiao Wei, Yannan Liu, Qiang Xu:
VeriTrust: Verification for Hardware Trust. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(7): 1148-1161 (2015) - [j24]Xiaolong Zhang, Huiyun Li, Li Jiang, Qiang Xu:
A Low-Cost TSV Test and Diagnosis Scheme Based on Binary Search Method. IEEE Trans. Very Large Scale Integr. Syst. 23(11): 2639-2647 (2015) - 2014
- [j23]Rong Ye, Qiang Xu:
Learning-Based Power Management for Multicore Processors via Idle Period Manipulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(7): 1043-1055 (2014) - 2013
- [j22]Li Jiang, Qiang Xu, Bill Eklow:
On Effective Through-Silicon Via Repair for 3-D-Stacked ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(4): 559-571 (2013) - [j21]Xiao Liu, Qiang Xu:
On Multiplexed Signal Tracing for Post-Silicon Validation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(5): 748-759 (2013) - 2012
- [j20]Xiao Liu, Qiang Xu:
On Signal Selection for Visibility Enhancement in Trace-Based Post-Silicon Validation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(8): 1263-1274 (2012) - [j19]Xiao Liu, Qiang Xu:
On X-Variable Filling and Flipping for Capture-Power Reduction in Linear Decompressor-Based Test Compression Environment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(11): 1743-1753 (2012) - [j18]Li Jiang, Qiang Xu, Krishnendu Chakrabarty, T. M. Mak:
Integrated Test-Architecture Optimization and Thermal-Aware Test Scheduling for 3-D SoCs Under Pre-Bond Test-Pin-Count Constraint. IEEE Trans. Very Large Scale Integr. Syst. 20(9): 1621-1633 (2012) - [j17]Haile Yu, Philip Heng Wai Leong, Qiang Xu:
An FPGA Chip Identification Generator Using Configurable Ring Oscillators. IEEE Trans. Very Large Scale Integr. Syst. 20(12): 2198-2207 (2012) - 2011
- [j16]Jia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, Qiang Xu:
Capture-power-aware test data compression using selective encoding. Integr. 44(3): 205-216 (2011) - [j15]Lin Huang, Feng Yuan, Qiang Xu:
On Task Allocation and Scheduling for Lifetime Extension of Platform-Based MPSoC Designs. IEEE Trans. Parallel Distributed Syst. 22(12): 2088-2099 (2011) - 2010
- [j14]Lin Huang, Qiang Xu:
Economic Analysis of Testing Homogeneous Manycore Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(8): 1257-1270 (2010) - [j13]Lin Huang, Qiang Xu:
Lifetime Reliability for Load-Sharing Redundant Systems With Arbitrary Failure Distributions. IEEE Trans. Reliab. 59(2): 319-330 (2010) - [j12]Jia Li, Qiang Xu, Yu Hu, Xiaowei Li:
X-Filling for Simultaneous Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing. IEEE Trans. Very Large Scale Integr. Syst. 18(7): 1081-1092 (2010) - 2009
- [j11]Dong Xiang, Dianwei Hu, Qiang Xu, Alex Orailoglu:
Low-Power Scan Testing for Test Data Compression Using a Routing-Driven Scan Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(7): 1101-1105 (2009) - [j10]Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty:
SOC test-architecture optimization for the testing of embedded cores and signal-integrity faults on core-external interconnects. ACM Trans. Design Autom. Electr. Syst. 14(1): 4:1-4:27 (2009) - [j9]Lei Zhang, Yinhe Han, Qiang Xu, Xiaowei Li, Huawei Li:
On Topology Reconfiguration for Defect-Tolerant NoC-Based Homogeneous Manycore Systems. IEEE Trans. Very Large Scale Integr. Syst. 17(9): 1173-1186 (2009) - 2008
- [j8]Jing-Ling Yang, Qiang Xu:
State-Sensitive X-Filling Scheme for Scan Capture Power Reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(7): 1338-1343 (2008) - 2007
- [j7]Qiang Xu, Baosheng Wang, André Ivanov, Fung Yu Young:
Test scheduling for built-in self-tested embedded SRAMs with data retention faults. IET Comput. Digit. Tech. 1(3): 256-264 (2007) - [j6]Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty:
Test Wrapper Design and Optimization Under Power Constraints for Embedded Cores With Multiple Clock Domains. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(8): 1539-1547 (2007) - 2006
- [j5]Qiang Xu, Nicola Nicolici:
DFT Infrastructure for Broadside Two-Pattern Test of Core-Based SOCs. IEEE Trans. Computers 55(4): 470-485 (2006) - [j4]Qiang Xu, Nicola Nicolici:
Multifrequency TAM design for hierarchical SOCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(1): 181-196 (2006) - 2005
- [j3]Qiang Xu, Nicola Nicolici:
Modular SOC testing with reduced wrapper count. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(12): 1894-1908 (2005) - [j2]Qiang Xu, Nicola Nicolici:
Wrapper design for multifrequency IP cores. IEEE Trans. Very Large Scale Integr. Syst. 13(6): 678-685 (2005) - [j1]Qiang Xu, Nicola Nicolici:
Modular and rapid testing of SOCs with unwrapped logic blocks. IEEE Trans. Very Large Scale Integr. Syst. 13(11): 1275-1285 (2005)
Conference and Workshop Papers
- 2023
- [c158]Ailing Zeng, Muxi Chen, Lei Zhang, Qiang Xu:
Are Transformers Effective for Time Series Forecasting? AAAI 2023: 11121-11128 - [c157]Xuan Ju, Ailing Zeng, Jianan Wang, Qiang Xu, Lei Zhang:
Human-Art: A Versatile Human-Centric Dataset Bridging Natural and Artificial Scenes. CVPR 2023: 618-629 - [c156]Min Li, Zhengyuan Shi, Qiuxia Lai, Sadaf Khan, Shaowei Cai, Qiang Xu:
On EDA-Driven Learning for SAT Solving. DAC 2023: 1-6 - [c155]Zhihan Chen, Xindi Zhang, Yuhang Qian, Qiang Xu, Shaowei Cai:
Integrating Exact Simulation into Sweeping for Datapath Combinational Equivalence Checking. ICCAD 2023: 1-9 - [c154]Zhengyuan Shi, Min Li, Yi Liu, Sadaf Khan, Junhua Huang, Hui-Ling Zhen, Mingxuan Yuan, Qiang Xu:
SATformer: Transformer-Based UNSAT Core Learning. ICCAD 2023: 1-4 - [c153]Zhengyuan Shi, Hongyang Pan, Sadaf Khan, Min Li, Yi Liu, Junhua Huang, Hui-Ling Zhen, Mingxuan Yuan, Zhufei Chu, Qiang Xu:
DeepGate2: Functionality-Aware Circuit Representation Learning. ICCAD 2023: 1-9 - [c152]Ruiyuan Gao, Chenchen Zhao, Lanqing Hong, Qiang Xu:
DiffGuard: Semantic Mismatch-Guided Out-of-Distribution Detection using Pre-trained Diffusion Models. ICCV 2023: 1579-1589 - 2022
- [c151]Ziyi Wang, Chen Bai, Zhuolun He, Guangliang Zhang, Qiang Xu, Tsung-Yi Ho, Bei Yu, Yu Huang:
Functionality matters in netlist representation learning. DAC 2022: 61-66 - [c150]Min Li, Sadaf Khan, Zhengyuan Shi, Naixing Wang, Huang Yu, Qiang Xu:
DeepGate: learning neural representations of logic gates. DAC 2022: 667-672 - [c149]Yijun Yang, Ruiyuan Gao, Qiang Xu:
Out-of-Distribution Detection with Semantic Mismatch Under Masking. ECCV (24) 2022: 373-390 - [c148]Ailing Zeng, Xuan Ju, Lei Yang, Ruiyuan Gao, Xizhou Zhu, Bo Dai, Qiang Xu:
DeciWatch: A Simple Baseline for 10˟ Efficient 2D and 3D Pose Estimation. ECCV (5) 2022: 607-624 - [c147]Ailing Zeng, Lei Yang, Xuan Ju, Jiefeng Li, Jianyi Wang, Qiang Xu:
SmoothNet: A Plug-and-Play Network for Refining Human Poses in Videos. ECCV (5) 2022: 625-642 - [c146]Minhao Liu, Ailing Zeng, Qiuxia Lai, Ruiyuan Gao, Min Li, Jing Qin, Qiang Xu:
T-WaveNet: A Tree-Structured Wavelet Neural Network for Time Series Signal Analysis. ICLR 2022 - [c145]Yu Li, Muxi Chen, Qiang Xu:
HybridRepair: towards annotation-efficient repair for deep learning models. ISSTA 2022: 227-238 - [c144]Zhengyuan Shi, Min Li, Sadaf Khan, Liuzheng Wang, Naixing Wang, Yu Huang, Qiang Xu:
DeepTPI: Test Point Insertion with Deep Reinforcement Learning. ITC 2022: 194-203 - [c143]Yijun Yang, Ruiyuan Gao, Yu Li, Qiuxia Lai, Qiang Xu:
What You See is Not What the Network Infers: Detecting Adversarial Examples Based on Semantic Contradiction. NDSS 2022 - [c142]Minhao Liu, Ailing Zeng, Muxi Chen, Zhijian Xu, Qiuxia Lai, Lingna Ma, Qiang Xu:
SCINet: Time Series Modeling and Forecasting with Sample Convolution and Interaction. NeurIPS 2022 - 2021
- [c141]Min Li, Yu Li, Ye Tian, Li Jiang, Qiang Xu:
AppealNet: An Efficient and Highly-Accurate Edge/Cloud Collaborative Architecture for DNN Inference. DAC 2021: 409-414 - [c140]Ailing Zeng, Xiao Sun, Lei Yang, Nanxuan Zhao, Minhao Liu, Qiang Xu:
Learning Skeletal Graph Neural Networks for Hard 3D Pose Estimation. ICCV 2021: 11416-11425 - [c139]Qiuxia Lai, Yu Li, Ailing Zeng, Minhao Liu, Hanqiu Sun, Qiang Xu:
Information Bottleneck Approach to Spatial Attention Learning. IJCAI 2021: 779-785 - [c138]Min Li, Zhengyuan Shi, Zezhong Wang, Weiwei Zhang, Yu Huang, Qiang Xu:
Testability-Aware Low Power Controller Design with Evolutionary Learning. ITC 2021: 324-328 - [c137]Yu Li, Min Li, Qiuxia Lai, Yannan Liu, Qiang Xu:
TestRank: Bringing Order into Unlabeled Test Instances for Deep Learning Tasks. NeurIPS 2021: 20874-20886 - [c136]Xingyi Wang, Yu Li, Yiquan Chen, Shiwen Wang, Yin Du, Cheng He, Yuzhong Zhang, Pinan Chen, Xin Li, Wenjun Song, Qiang Xu, Li Jiang:
On Workload-Aware DRAM Failure Prediction in Large-Scale Data Centers. VTS 2021: 1-6 - 2020
- [c135]Yu Li, Min Li, Bo Luo, Ye Tian, Qiang Xu:
DeepDyve: Dynamic Verification for Deep Neural Networks. CCS 2020: 101-112 - [c134]Ailing Zeng, Xiao Sun, Fuyang Huang, Minhao Liu, Qiang Xu, Stephen Lin:
SRNet: Improving Generalization in 3D Human Pose Estimation with a Split-and-Recombine Approach. ECCV (14) 2020: 507-523 - [c133]Bo Luo, Min Li, Yu Li, Qiang Xu:
On Configurable Defense against Adversarial Example Attacks. ACM Great Lakes Symposium on VLSI 2020: 543-548 - [c132]Fuyang Huang, Ailing Zeng, Minhao Liu, Qiuxia Lai, Qiang Xu:
DeepFuse: An IMU-Aware Network for Real-Time 3D Human Pose Estimation from Multi-View Image. WACV 2020: 418-427 - 2019
- [c131]Yu Li, Yannan Liu, Min Li, Ye Tian, Bo Luo, Qiang Xu:
D2NN: a fine-grained dual modular redundancy framework for deep neural networks. ACSAC 2019: 138-147 - [c130]Bo Luo, Yu Li, Lingxiao Wei, Qiang Xu:
On Functional Test Generation for Deep Neural Network IPs. DATE 2019: 1010-1015 - [c129]Ye Tian, Min Li, Qiang Xu:
Lightweight prediction based big/little design for efficient neural network inference. SEC 2019: 356 - 2018
- [c128]Bo Luo, Yannan Liu, Lingxiao Wei, Qiang Xu:
Towards Imperceptible and Robust Adversarial Example Attacks Against Neural Networks. AAAI 2018: 1652-1659 - [c127]Lingxiao Wei, Bo Luo, Yu Li, Yannan Liu, Qiang Xu:
I Know What You See: Power Side-Channel Attack on Convolutional Neural Network Accelerators. ACSAC 2018: 393-406 - [c126]Fuyang Huang, Ailing Zeng, Minhao Liu, Jing Qin, Qiang Xu:
Structure-Aware 3D Hourglass Network for Hand Pose Estimation from Single Depth Image. BMVC 2018: 289 - [c125]Ye Tian, Qian Zhang, Ting Wang, Qiang Xu:
Lookup table allocation for approximate computing with memory under quality constraints. DATE 2018: 153-158 - [c124]Haiyue Song, Chengwen Xu, Qiang Xu, Zhuoran Song, Naifeng Jing, Xiaoyao Liang, Li Jiang:
Invocation-driven neural approximate computing with a multiclass-classifier and multiple approximators. ICCAD 2018: 50 - [c123]Xian Zhang, Guangyu Sun, Peichen Xie, Chao Zhang, Yannan Liu, Lingxiao Wei, Qiang Xu, Chun Jason Xue:
Shadow Block: Accelerating ORAM Accesses with Data Duplication. MICRO 2018: 961-973 - 2017
- [c122]Ye Tian, Qiang Xu, Jason Xue:
On efficient message passing in energy harvesting based distributed system. ASP-DAC 2017: 139-144 - [c121]Qian Zhang, Ting Wang, Qiang Xu:
On resilient task allocation and scheduling with uncertain quality checkers. ASP-DAC 2017: 408-413 - [c120]Chengwen Xu, Xiangyu Wu, Wenqi Yin, Qiang Xu, Naifeng Jing, Xiaoyao Liang, Li Jiang:
On Quality Trade-off Control for Approximate Computing Using Iterative Training. DAC 2017: 52:1-52:6 - [c119]Ting Wang, Qian Zhang, Qiang Xu:
ApproxQA: A unified quality assurance framework for approximate computing. DATE 2017: 254-257 - [c118]Ting Wang, Yannan Liu, Qiang Xu, Zhaobo Zhang, Zhiyuan Wang, Xinli Gu:
RetroDMR: Troubleshooting non-deterministic faults with retrospective DMR. DATE 2017: 638-641 - [c117]Yannan Liu, Lingxiao Wei, Bo Luo, Qiang Xu:
Fault injection attack on deep neural network. ICCAD 2017: 131-138 - [c116]Ye Tian, Ting Wang, Qian Zhang, Qiang Xu:
ApproxLUT: A novel approximate lookup table-based accelerator. ICCAD 2017: 438-443 - [c115]Xiaoming Chen, Qiaoyi Liu, Yu Wang, Qiang Xu, Huazhong Yang:
Low-overhead implementation of logic encryption using gate replacement techniques. ISQED 2017: 257-263 - 2016
- [c114]Juan Yi, Qian Zhang, Ye Tian, Ting Wang, Weichen Liu, Edwin Hsing-Mean Sha, Qiang Xu:
ApproxMap: On task allocation and scheduling for resilient applications. ASP-DAC 2016: 318-323 - [c113]Yannan Liu, Lingxiao Wei, Zhe Zhou, Kehuan Zhang, Wenyuan Xu, Qiang Xu:
On Code Execution Tracking via Power Side-Channel. CCS 2016: 1019-1031 - [c112]Wen Zong, Liang Wang, Qiang Xu, Michael Opoku Agyeman:
SlideAcross: A Low-Latency Adaptive Router for Chip Multi-processor. DSD 2016: 115-122 - [c111]Yubin Li, Yuliang Sun, Guohao Dai, Qiang Xu, Yu Wang, Huazhong Yang:
Approximate Frequent Itemset Mining for streaming data on FPGA. FPL 2016: 1-4 - [c110]Wen Zong, Qiang Xu:
DOART: A low-power and low-latency Network-on-Chip. ICCD 2016: 352-355 - [c109]Ting Wang, Qian Zhang, Nam Sung Kim, Qiang Xu:
On Effective and Efficient Quality Management for Approximate Computing. ISLPED 2016: 156-161 - [c108]Tianjian Li, Li Jiang, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty:
Defect tolerance for CNFET-based SRAMs. ITC 2016: 1-9 - [c107]Zhengzhe Liu, Fuyang Huang, Gladys Wai Lan Tang, Felix Yim Binh Sze, Jing Qin, Xiaogang Wang, Qiang Xu:
Real-time Sign Language Recognition with Guided Deep Convolutional Neural Networks. SUI 2016: 187 - 2015
- [c106]Zelong Sun, Li Jiang, Qiang Xu, Zhaobo Zhang, Zhiyuan Wang, Xinli Gu:
On test syndrome merging for reasoning-based board-level functional fault diagnosis. ASP-DAC 2015: 737-742 - [c105]Lingxiao Wei, Jie Zhang, Feng Yuan, Yannan Liu, Junfeng Fan, Qiang Xu:
Vulnerability analysis for crypto devices against probing attack. ASP-DAC 2015: 827-832 - [c104]Feng Xie, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty, Naifeng Jing, Li Jiang:
Jump test for metallic CNTs in CNFET-based SRAM. DAC 2015: 16:1-16:6 - [c103]Yannan Liu, Jie Zhang, Lingxiao Wei, Feng Yuan, Qiang Xu:
DERA: yet another differential fault attack on cryptographic devices based on error rate analysis. DAC 2015: 31:1-31:6 - [c102]Rong Ye, Feng Yuan, Jie Zhang, Qiang Xu:
On the premises and prospects of timing speculation. DATE 2015: 605-608 - [c101]Qian Zhang, Ting Wang, Ye Tian, Feng Yuan, Qiang Xu:
ApproxANN: an approximate computing framework for artificial neural network. DATE 2015: 701-706 - [c100]Ye Tian, Qian Zhang, Ting Wang, Feng Yuan, Qiang Xu:
ApproxMA: Approximate Memory Access for Dynamic Precision Scaling. ACM Great Lakes Symposium on VLSI 2015: 337-342 - [c99]Lingxiao Wei, Chaosheng Song, Yannan Liu, Jie Zhang, Feng Yuan, Qiang Xu:
BoardPUF: Physical Unclonable Functions for Printed Circuit Board Authentication. ICCAD 2015: 152-158 - [c98]Qian Zhang, Ye Tian, Ting Wang, Feng Yuan, Qiang Xu:
ApproxEigen: An Approximate Computing Technique for Large-Scale Eigen-Decomposition. ICCAD 2015: 824-830 - [c97]Li Jiang, Xiangwei Huang, Hongfeng Xie, Qiang Xu, Chao Li, Xiaoyao Liang, Huiyun Li:
A novel TSV probing technique with adhesive test interposer. ICCD 2015: 597-604 - [c96]Qiang Han, Jianghao Guo, Qiang Xu, Wen-Ben Jone:
On Resilient System Performance Binning. ISPD 2015: 119-125 - [c95]Li Jiang, Pu Pang, Naifeng Jing, Sung Kyu Lim, Xiaoyao Liang, Qiang Xu:
On diagnosable and tunable 3D clock network design for lifetime reliability enhancement. ITC 2015: 1-10 - [c94]Li Jiang, Qiang Xu:
Yield and reliability enhancement for 3D ICs: Dissertation summary: IEEE TTTC E.J. McCluskey doctoral thesis award competition finalist. ITC 2015: 1-11 - [c93]Song Yao, Xiaoming Chen, Jie Zhang, Qiaoyi Liu, Jia Wang, Qiang Xu, Yu Wang, Huazhong Yang:
FASTrust: Feature analysis for third-party IP trust verification. ITC 2015: 1-10 - [c92]Li Jiang, Qiang Xu:
Fault-Tolerant 3D-NoC Architecture and Design: Recent Advances and Challenges. NOCS 2015: 7:1-7:8 - 2014
- [c91]Jie Zhang, Feng Yuan, Qiang Xu:
DeTrust: Defeating Hardware Trust Verification with Stealthy Implicitly-Triggered Hardware Trojans. CCS 2014: 153-166 - [c90]Qian Zhang, Feng Yuan, Rong Ye, Qiang Xu:
ApproxIt: An Approximate Computing Framework for Iterative Methods. DAC 2014: 97:1-97:6 - [c89]Ting Wang, Qiang Xu:
On the Simulation of NBTI-Induced Performance Degradation Considering Arbitrary Temperature and Voltage Variations. DAC 2014: 169:1-169:6 - [c88]Qian Zhang, Chenfei Ma, Qiang Xu:
On hybrid memory allocation for FPGA behavioral synthesis (abstract only). FPGA 2014: 245 - [c87]Jie Zhang, Guantong Su, Yannan Liu, Lingxiao Wei, Feng Yuan, Guoqiang Bai, Qiang Xu:
On trojan side channel design and identification. ICCAD 2014: 278-285 - [c86]Fuyang Huang, Zelong Sun, Qiang Xu, Felix Yim Binh Sze, Tang Wai Lan, Xiaogang Wang:
Real-time sign language recognition using RGBD stream: spatial-temporal feature exploration. SUI 2014: 149 - 2013
- [c85]Feng Yuan, Yannan Liu, Wen-Ben Jone, Qiang Xu:
On testing timing-speculative circuits. DAC 2013: 30:1-30:6 - [c84]Jie Zhang, Feng Yuan, Lingxiao Wei, Zelong Sun, Qiang Xu:
VeriTrust: verification for hardware trust. DAC 2013: 61:1-61:8 - [c83]Li Jiang, Fangming Ye, Qiang Xu, Krishnendu Chakrabarty, Bill Eklow:
On effective and efficient in-field TSV repair for stacked 3D ICs. DAC 2013: 74:1-74:6 - [c82]Rong Ye, Feng Yuan, Zelong Sun, Wen-Ben Jone, Qiang Xu:
Post-placement voltage island generation for timing-speculative circuits. DAC 2013: 112:1-112:6 - [c81]Feng Yuan, Qiang Xu:
InTimeFix: a low-cost and scalable technique for in-situ timing error masking in logic circuits. DAC 2013: 183:1-183:6 - [c80]Yuxi Liu, Rong Ye, Feng Yuan, Qiang Xu:
Optimization for timing-speculated circuits by redundancy addition and removal. ETS 2013: 1-6 - [c79]Jie Zhang, Qiang Xu:
On hardware Trojan design and implementation at register-transfer level. HOST 2013: 107-112 - [c78]Rong Ye, Ting Wang, Feng Yuan, Rakesh Kumar, Qiang Xu:
On reconfiguration-oriented approximate adder design and its application. ICCAD 2013: 48-54 - [c77]Jie Zhang, Feng Yuan, Rong Ye, Qiang Xu:
ForTER: a forward error correction scheme for timing error resilience. ICCAD 2013: 55-60 - [c76]Yinhe Han, Song Jin, Jibing Qiu, Qiang Xu, Xiaowei Li:
On predicting NBTI-induced circuit aging by isolating leakage change. ISQED 2013: 46-52 - [c75]Zelong Sun, Li Jiang, Qiang Xu, Zhaobo Zhang, Zhiyuan Wang, Xinli Gu:
AgentDiag: An agent-assisted diagnostic framework for board-level functional failures. ITC 2013: 1-8 - [c74]Qiang Han, Jianghao Guo, Wen-Ben Jone, Qiang Xu:
Path delay testing in resilient system. MWSCAS 2013: 645-648 - 2012
- [c73]Rong Ye, Qiang Xu:
Learning-based power management for multi-core processors via idle period manipulation. ASP-DAC 2012: 115-120 - [c72]Yubin Zhang, Haile Yu, Qiang Xu:
CODA: A concurrent online delay measurement architecture for critical paths. ASP-DAC 2012: 169-174 - [c71]Qiang Xu, Li Jiang, Huiyun Li, Bill Eklow:
Yield enhancement for 3D-stacked ICs: Recent advances and challenges. ASP-DAC 2012: 731-737 - [c70]Feng Yuan, Xiao Liu, Qiang Xu:
X-tracer: a reconfigurable X-tolerant trace compressor for silicon debug. DAC 2012: 555-560 - [c69]Li Jiang, Qiang Xu, Bill Eklow:
On effective TSV repair for 3D-stacked ICs. DATE 2012: 793-798 - [c68]Rong Ye, Feng Yuan, Hai Zhou, Qiang Xu:
Clock skew scheduling for timing speculation. DATE 2012: 929-934 - [c67]Jie Zhang, Haile Yu, Qiang Xu:
HTOutlier: Hardware Trojan detection with side-channel signature outlier identification. HOST 2012: 55-58 - [c66]Yuxi Liu, Rong Ye, Feng Yuan, Rakesh Kumar, Qiang Xu:
On logic synthesis for timing speculation. ICCAD 2012: 591-596 - [c65]Xiao Liu, Qiang Xu:
On efficient silicon debug with flexible trace interconnection fabric. ITC 2012: 1-9 - [c64]Yuxi Liu, Qiang Xu:
On modeling faults in FinFET logic circuits. ITC 2012: 1-9 - 2011
- [c63]Jia Li, Qiang Xu, Dong Xiang:
Compression-aware capture power reduction for at-speed testing. ASP-DAC 2011: 806-811 - [c62]Peter Marwedel, Jürgen Teich, Georgia Kouveli, Iuliana Bacivarov, Lothar Thiele, Soonhoi Ha, Chanhee Lee, Qiang Xu, Lin Huang:
Mapping of applications to MPSoCs. CODES+ISSS 2011: 109-118 - [c61]Yuxi Liu, Feng Yuan, Qiang Xu:
Re-synthesis for cost-efficient circuit-level timing speculation. DAC 2011: 158-163 - [c60]Lin Huang, Rong Ye, Qiang Xu:
Customer-aware task allocation and scheduling for multi-mode MPSoCs. DAC 2011: 387-392 - [c59]Xiao Liu, Qiang Xu:
On multiplexed signal tracing for post-silicon debug. DATE 2011: 685-690 - [c58]Feng Yuan, Xiao Liu, Qiang Xu:
On High-Quality Test Pattern Selection and Manipulation. ETS 2011: 218 - [c57]Haile Yu, Qiang Xu, Philip Heng Wai Leong:
On timing yield improvement for FPGA designs using architectural symmetry (abstract only). FPGA 2011: 278 - [c56]Haile Yu, Qiang Xu, Philip Heng Wai Leong:
On Timing Yield Improvement for FPGA Designs Using Architectural Symmetry. FPL 2011: 539-544 - [c55]Feng Yuan, Xiao Liu, Qiang Xu:
Pseudo-functional testing for small delay defects considering power supply noise effects. ICCAD 2011: 34-39 - [c54]Rong Ye, Feng Yuan, Qiang Xu:
Online clock skew tuning for timing speculation. ICCAD 2011: 442-447 - 2010
- [c53]Qiang Xu, Xiao Liu:
On signal tracing in post-silicon validation. ASP-DAC 2010: 262-267 - [c52]Xiao Liu, Qiang Xu:
On Signal Tracing for Debugging Speedpath-Related Electrical Errors in Post-Silicon Validation. Asian Test Symposium 2010: 243-248 - [c51]Lin Huang, Qiang Xu:
Performance yield-driven task allocation and scheduling for MPSoCs under process variation. DAC 2010: 326-331 - [c50]Lin Huang, Qiang Xu:
AgeSim: A simulation framework for evaluating the lifetime reliability of processor-based SoCs. DATE 2010: 51-56 - [c49]Xiao Liu, Yubin Zhang, Feng Yuan, Qiang Xu:
Layout-aware pseudo-functional testing for critical paths considering power supply noise effects. DATE 2010: 1432-1437 - [c48]Lin Huang, Qiang Xu:
Energy-efficient task allocation and scheduling for multi-mode MPSoCs under lifetime reliability constraint. DATE 2010: 1584-1589 - [c47]Haile Yu, Qiang Xu, Philip Heng Wai Leong:
Fine-grained characterization of process variation in FPGAs. FPT 2010: 138-145 - [c46]Haile Yu, Philip Heng Wai Leong, Qiang Xu:
An FPGA chip identification generator using configurable ring oscillator. FPT 2010: 312-315 - [c45]Li Jiang, Rong Ye, Qiang Xu:
Yield enhancement for 3D-stacked memory by redundancy sharing across dies. ICCAD 2010: 230-234 - [c44]Feng Yuan, Qiang Xu:
On timing-independent false path identification. ICCAD 2010: 532-535 - [c43]Lin Huang, Qiang Xu:
Characterizing the lifetime reliability of manycore processors with core-level redundancy. ICCAD 2010: 680-685 - [c42]Li Jiang, Yuxi Liu, Lian Duan, Yuan Xie, Qiang Xu:
Modeling TSV open defects in 3D-stacked DRAM. ITC 2010: 174-182 - 2009
- [c41]Yubin Zhang, Lin Huang, Feng Yuan, Qiang Xu:
Test Pattern Selection for Potentially Harmful Open Defects in Power Distribution Networks. Asian Test Symposium 2009: 456-461 - [c40]Xiao Liu, Qiang Xu:
Interconnection fabric design for tracing signals in post-silicon validation. DAC 2009: 352-357 - [c39]Feng Yuan, Qiang Xu:
On systematic illegal state identification for pseudo-functional testing. DAC 2009: 702-707 - [c38]Lin Huang, Feng Yuan, Qiang Xu:
Lifetime reliability-aware task allocation and scheduling for MPSoC platforms. DATE 2009: 51-56 - [c37]Li Jiang, Lin Huang, Qiang Xu:
Test architecture design and optimization for three-dimensional SoCs. DATE 2009: 220-225 - [c36]Xiao Liu, Qiang Xu:
Trace signal selection for visibility enhancement in post-silicon validation. DATE 2009: 1338-1343 - [c35]Xiao Liu, Qiang Xu:
A generic framework for scan capture power reduction in fixed-length symbol-based test compression environment. DATE 2009: 1494-1499 - [c34]Li Jiang, Qiang Xu, Krishnendu Chakrabarty, T. M. Mak:
Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint. ICCAD 2009: 191-196 - [c33]Lin Huang, Qiang Xu:
Test economics for homogeneous manycore systems. ITC 2009: 1-10 - [c32]Xiao Liu, Qiang Xu:
On simultaneous shift- and capture-power reduction in linear decompressor-based test compression environment. ITC 2009: 1-10 - [c31]Xiao Liu, Qiang Xu:
Trace signal selection for debugging electrical errors in post-silicon validation. ITC 2009: 1 - [c30]Feng Yuan, Qiang Xu:
Compression-aware pseudo-functional testing. ITC 2009: 1-10 - 2008
- [c29]Shan Tang, Qiang Xu:
A debug probe for concurrently debugging multiple embedded cores and inter-core transactions in NoC-based systems. ASP-DAC 2008: 416-421 - [c28]Jia Li, Qiang Xu, Yu Hu, Xiaowei Li:
On reducing both shift and capture power for scan-based testing. ASP-DAC 2008: 653-658 - [c27]Xiao Liu, Qiang Xu:
On Reusing Test Access Mechanisms for Debug Data Transfer in SoC Post-Silicon Validation. ATS 2008: 303-308 - [c26]Lin Huang, Feng Yuan, Qiang Xu:
On reliable modular testing with vulnerable test access mechanisms. DAC 2008: 834-839 - [c25]Shan Tang, Qiang Xu:
In-band Cross-Trigger Event Transmission for Transaction-Based Debug. DATE 2008: 414-419 - [c24]Feng Yuan, Lin Huang, Qiang Xu:
Re-Examining the Use of Network-on-Chip as Test Access Mechanism. DATE 2008: 808-811 - [c23]Lei Zhang, Yinhe Han, Qiang Xu, Xiaowei Li:
Defect Tolerance in Homogeneous Manycore Processors Using Core-Level Redundancy with Unified Topology. DATE 2008: 891-896 - [c22]Jia Li, Qiang Xu, Yu Hu, Xiaowei Li:
iFill: An Impact-Oriented X-Filling Method for Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing. DATE 2008: 1184-1189 - [c21]Jia Li, Qiang Xu, Yu Hu, Xiaowei Li:
Channel Width Utilization Improvement in Testing NoC-Based Systems for Test Time Reduction. DELTA 2008: 26-31 - [c20]Jia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, Qiang Xu:
On capture power-aware test data compression for scan-based testing. ICCAD 2008: 67-72 - [c19]Lin Huang, Qiang Xu:
Is It Cost-Effective to Achieve Very High Fault Coverage for Testing Homogeneous SoCs with Core-Level Redundancy? ITC 2008: 1 - [c18]Xiao Liu, Feng Yuan, Qiang Xu:
A Generic Framework for Scan Capture Power Reduction in Test Compression Environment. ITC 2008: 1 - [c17]Feng Yuan, Qiang Xu:
SoC Test Architecture Design and Optimization Considering Power Supply Noise Effects. ITC 2008: 1-9 - [c16]Lin Huang, Qiang Xu:
On Modeling the Lifetime Reliability of Homogeneous Manycore Systems. PRDC 2008: 87-94 - 2007
- [c15]Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty:
SOC Test Architecture Optimization for Signal Integrity Faults on Core-External Interconnects. DAC 2007: 676-681 - [c14]Shan Tang, Qiang Xu:
A multi-core debug platform for NoC-based systems. DATE 2007: 870-875 - [c13]Qiang Xu, Dianwei Hu, Dong Xiang:
Pattern-directed circuit virtual partitioning for test power reduction. ITC 2007: 1-10 - [c12]Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty:
Test-wrapper designs for the detection of signal-integrity faults on core-external interconnects of SoCs. ITC 2007: 1-9 - 2006
- [c11]Baosheng Wang, Qiang Xu:
Test/Repair Area Overhead Reduction for Small Embedded SRAMs. ATS 2006: 37-44 - [c10]Qiang Xu, Baosheng Wang, F. Y. Young:
Retention-Aware Test Scheduling for BISTed Embedded SRAMs. ETS 2006: 83-88 - 2005
- [c9]Ho Fai Ko, Qiang Xu, Nicola Nicolici:
Register-transfer level functional scan for hierarchical designs. ASP-DAC 2005: 1172-1175 - [c8]Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty:
Multi-frequency wrapper design and optimization for embedded cores under average power constraints. DAC 2005: 123-128 - [c7]Qiang Xu, Nicola Nicolici:
On concurrent test of wrapped cores and unwrapped logic blocks in SOCs. ITC 2005: 10 - 2004
- [c6]Qiang Xu, Nicola Nicolici:
Multi-Frequency Test Access Mechanism Design for Modular SOC Testing. Asian Test Symposium 2004: 2-7 - [c5]Qiang Xu, Nicola Nicolici:
Wrapper Design for Testing IP Cores with Multiple Clock Domains. DATE 2004: 416-421 - [c4]Qiang Xu, Nicola Nicolici:
Time/Area Tradeoffs in Testing Hierarchical SOCs With Hard Mega-Cores. ITC 2004: 1196-1202 - 2003
- [c3]Qiang Xu, Nicola Nicolici:
Delay Fault Testing of Core-Based Systems-on-a-Chi. DATE 2003: 10744-10752 - [c2]Bai Hong Fang, Qiang Xu, Nicola Nicolici:
Hardware/Software Co-testing of Embedded Memories in Complex SOCs. ICCAD 2003: 599-606 - [c1]Qiang Xu, Nicola Nicolici:
On Reducing Wrapper Boundary Register Cells in Modular SOC Testing. ITC 2003: 622-631
Informal and Other Publications
- 2024
- [i43]Yijun Yang, Ruiyuan Gao, Xiao Yang, Jianyuan Zhong, Qiang Xu:
GuardT2I: Defending Text-to-Image Models from Adversarial Prompts. CoRR abs/2403.01446 (2024) - [i42]Yibo Wang, Ruiyuan Gao, Kai Chen, Kaiqiang Zhou, Yingjie Cai, Lanqing Hong, Zhenguo Li, Lihui Jiang, Dit-Yan Yeung, Qiang Xu, Kai Zhang:
DetDiffusion: Synergizing Generative and Perceptive Models for Enhanced Data Generation and Perception. CoRR abs/2403.13304 (2024) - 2023
- [i41]Muxi Chen, Zhijian Xu, Ailing Zeng, Qiang Xu:
FrAug: Frequency Domain Augmentation for Time Series Forecasting. CoRR abs/2302.09292 (2023) - [i40]Xuan Ju, Ailing Zeng, Jianan Wang, Qiang Xu, Lei Zhang:
Human-Art: A Versatile Human-Centric Dataset Bridging Natural and Artificial Scenes. CoRR abs/2303.02760 (2023) - [i39]Xuan Ju, Ailing Zeng, Chenchen Zhao, Jianan Wang, Lei Zhang, Qiang Xu:
HumanSD: A Native Skeleton-Guided Diffusion Model for Human Image Generation. CoRR abs/2304.04269 (2023) - [i38]Zhengyuan Shi, Hongyang Pan, Sadaf Khan, Min Li, Yi Liu, Junhua Huang, Hui-Ling Zhen, Mingxuan Yuan, Zhufei Chu, Qiang Xu:
DeepGate2: Functionality-Aware Circuit Representation Learning. CoRR abs/2305.16373 (2023) - [i37]Zhijian Xu, Ailing Zeng, Qiang Xu:
FITS: Modeling Time Series with 10k Parameters. CoRR abs/2307.03756 (2023) - [i36]Ruiyuan Gao, Chenchen Zhao, Lanqing Hong, Qiang Xu:
DiffGuard: Semantic Mismatch-Guided Out-of-Distribution Detection using Pre-trained Diffusion Models. CoRR abs/2308.07687 (2023) - [i35]Ruiyuan Gao, Kai Chen, Enze Xie, Lanqing Hong, Zhenguo Li, Dit-Yan Yeung, Qiang Xu:
MagicDrive: Street View Generation with Diverse 3D Geometry Control. CoRR abs/2310.02601 (2023) - [i34]Yijun Yang, Ruiyuan Gao, Xiaosen Wang, Nan Xu, Qiang Xu:
MMA-Diffusion: MultiModal Attack on Diffusion Models. CoRR abs/2311.17516 (2023) - [i33]Ziyang Zheng, Ruiyuan Gao, Qiang Xu:
Non-Cross Diffusion for Semantic Consistency. CoRR abs/2312.00820 (2023) - 2022
- [i32]Yijun Yang, Ruiyuan Gao, Yu Li, Qiuxia Lai, Qiang Xu:
What You See is Not What the Network Infers: Detecting Adversarial Examples Based on Semantic Contradiction. CoRR abs/2201.09650 (2022) - [i31]Ailing Zeng, Xuan Ju, Lei Yang, Ruiyuan Gao, Xizhou Zhu, Bo Dai, Qiang Xu:
DeciWatch: A Simple Baseline for 10x Efficient 2D and 3D Pose Estimation. CoRR abs/2203.08713 (2022) - [i30]Ailing Zeng, Muxi Chen, Lei Zhang, Qiang Xu:
Are Transformers Effective for Time Series Forecasting? CoRR abs/2205.13504 (2022) - [i29]Min Li, Zhengyuan Shi, Qiuxia Lai, Sadaf Khan, Qiang Xu:
DeepSAT: An EDA-Driven Learning Framework for SAT. CoRR abs/2205.13745 (2022) - [i28]Zhengyuan Shi, Min Li, Sadaf Khan, Liuzheng Wang, Naixing Wang, Yu Huang, Qiang Xu:
DeepTPI: Test Point Insertion with Deep Reinforcement Learning. CoRR abs/2206.06975 (2022) - [i27]Yijun Yang, Ruiyuan Gao, Qiang Xu:
Out-of-Distribution Detection with Semantic Mismatch under Masking. CoRR abs/2208.00446 (2022) - [i26]Zhiyuan He, Yijun Yang, Pin-Yu Chen, Qiang Xu, Tsung-Yi Ho:
Be Your Own Neighborhood: Detecting Adversarial Example by the Neighborhood Relations Built on Self-Supervised Learning. CoRR abs/2209.00005 (2022) - [i25]Zhengyuan Shi, Min Li, Sadaf Khan, Hui-Ling Zhen, Mingxuan Yuan, Qiang Xu:
SATformer: Transformers for SAT Solving. CoRR abs/2209.00953 (2022) - [i24]Yu Li, Muxi Chen, Yannan Liu, Daojing He, Qiang Xu:
An Empirical Study on the Efficacy of Deep Active Learning for Image Classification. CoRR abs/2212.03088 (2022) - 2021
- [i23]Yijun Yang, Ruiyuan Gao, Yu Li, Qiuxia Lai, Qiang Xu:
MixDefense: A Defense-in-Depth Framework for Adversarial Example Detection Based on Statistical and Semantic Analysis. CoRR abs/2104.10076 (2021) - [i22]Yunyan Hong, Ailing Zeng, Min Li, Cewu Lu, Li Jiang, Qiang Xu:
Skimming and Scanning for Untrimmed Video Action Recognition. CoRR abs/2104.10492 (2021) - [i21]Min Li, Yu Li, Ye Tian, Li Jiang, Qiang Xu:
AppealNet: An Efficient and Highly-Accurate Edge/Cloud Collaborative Architecture for DNN Inference. CoRR abs/2105.04104 (2021) - [i20]Yu Li, Min Li, Qiuxia Lai, Yannan Liu, Qiang Xu:
TestRank: Bringing Order into Unlabeled Test Instances for Deep Learning Tasks. CoRR abs/2105.10113 (2021) - [i19]Ailing Zeng, Minhao Liu, Zhiwei Liu, Ruiyuan Gao, Qiang Xu:
Hop-Aware Dimension Optimization for Graph Neural Networks. CoRR abs/2105.14490 (2021) - [i18]Minhao Liu, Ailing Zeng, Qiuxia Lai, Qiang Xu:
Time Series is a Special Sequence: Forecasting with Sample Convolution and Interaction. CoRR abs/2106.09305 (2021) - [i17]Qiuxia Lai, Yu Li, Ailing Zeng, Minhao Liu, Hanqiu Sun, Qiang Xu:
Information Bottleneck Approach to Spatial Attention Learning. CoRR abs/2108.03418 (2021) - [i16]Ailing Zeng, Xiao Sun, Lei Yang, Nanxuan Zhao, Minhao Liu, Qiang Xu:
Learning Skeletal Graph Neural Networks for Hard 3D Pose Estimation. CoRR abs/2108.07181 (2021) - [i15]Min Li, Zhengyuan Shi, Zezhong Wang, Weiwei Zhang, Yu Huang, Qiang Xu:
Testability-Aware Low Power Controller Design with Evolutionary Learning. CoRR abs/2111.13332 (2021) - [i14]Min Li, Sadaf Khan, Zhengyuan Shi, Naixing Wang, Yu Huang, Qiang Xu:
Representation Learning of Logic Circuits. CoRR abs/2111.14616 (2021) - [i13]Minhao Liu, Zhijian Xu, Qiang Xu:
DeepFIB: Self-Imputation for Time Series Anomaly Detection. CoRR abs/2112.06247 (2021) - [i12]Ailing Zeng, Lei Yang, Xuan Ju, Jiefeng Li, Jianyi Wang, Qiang Xu:
SmoothNet: A Plug-and-Play Network for Refining Human Poses in Videos. CoRR abs/2112.13715 (2021) - 2020
- [i11]Ailing Zeng, Xiao Sun, Fuyang Huang, Minhao Liu, Qiang Xu, Stephen Lin:
SRNet: Improving Generalization in 3D Human Pose Estimation with a Split-and-Recombine Approach. CoRR abs/2007.09389 (2020) - [i10]Yu Li, Min Li, Bo Luo, Ye Tian, Qiang Xu:
DeepDyve: Dynamic Verification for Deep Neural Networks. CoRR abs/2009.09663 (2020) - [i9]Minhao Liu, Ailing Zeng, Qiuxia Lai, Qiang Xu:
T-WaveNet: Tree-Structured Wavelet Neural Network for Sensor-Based Time Series Analysis. CoRR abs/2012.05456 (2020) - 2019
- [i8]Bo Luo, Yu Li, Lingxiao Wei, Qiang Xu:
On Functional Test Generation for Deep Neural Network IPs. CoRR abs/1911.11550 (2019) - [i7]Bo Luo, Qiang Xu:
Region-Wise Attack: On Efficient Generation of Robust Physical Adversarial Examples. CoRR abs/1912.02598 (2019) - [i6]Fuyang Huang, Ailing Zeng, Minhao Liu, Qiuxia Lai, Qiang Xu:
DeepFuse: An IMU-Aware Network for Real-Time 3D Human Pose Estimation from Multi-View Image. CoRR abs/1912.04071 (2019) - 2018
- [i5]Bo Luo, Yannan Liu, Lingxiao Wei, Qiang Xu:
Towards Imperceptible and Robust Adversarial Example Attacks against Neural Networks. CoRR abs/1801.04693 (2018) - [i4]Lingxiao Wei, Yannan Liu, Bo Luo, Yu Li, Qiang Xu:
I Know What You See: Power Side-Channel Attack on Convolutional Neural Network Accelerators. CoRR abs/1803.05847 (2018) - [i3]Haiyue Song, Chengwen Xu, Qiang Xu, Zhuoran Song, Naifeng Jing, Xiaoyao Liang, Li Jiang:
Invocation-driven Neural Approximate Computing with a Multiclass-Classifier and Multiple Approximators. CoRR abs/1810.08379 (2018) - [i2]Bo Luo, Min Li, Yu Li, Qiang Xu:
On Configurable Defense against Adversarial Example Attacks. CoRR abs/1812.02737 (2018) - [i1]Fuyang Huang, Ailing Zeng, Minhao Liu, Jing Qin, Qiang Xu:
Structure-Aware 3D Hourglass Network for Hand Pose Estimation from Single Depth Image. CoRR abs/1812.10320 (2018)
Coauthor Index
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