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Nam Sung Kim
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- affiliation: University of Illinois, Urbana-Champaign, IL, USA
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2020 – today
- 2024
- [j58]Hyungyo Kim, Gaohan Ye, Nachuan Wang, Amir Yazdanbakhsh, Nam Sung Kim:
Exploiting Intel Advanced Matrix Extensions (AMX) for Large Language Model Inference. IEEE Comput. Archit. Lett. 23(1): 117-120 (2024) - [j57]Ipoom Jeong, Eunbi Jeong, Nam Sung Kim, Myung Kuk Yoon:
Triple-A: Early Operand Collector Allocation for Maximizing GPU Register Bank Utilization. IEEE Embed. Syst. Lett. 16(2): 206-209 (2024) - [c173]Hyoungwook Nam, Raghavendra Pradyumna Pothukuchi, Bo Li, Nam Sung Kim, Josep Torrellas:
FriendlyFoe: Adversarial Machine Learning as a Practical Architectural Defense against Side Channel Attacks. PACT 2024: 338-350 - [c172]Reese Kuper, Ipoom Jeong, Yifan Yuan, Ren Wang, Narayan Ranganathan, Nikhil Rao, Jiayu Hu, Sanjay Kumar, Philip Lantz, Nam Sung Kim:
A Quantitative Analysis and Guidelines of Data Streaming Accelerator in Modern Intel Xeon Scalable Processors. ASPLOS (2) 2024: 37-54 - [c171]Jaehyun Park, Jaewan Choi, Kwanhee Kyung, Michael Jaemin Kim, Yongsuk Kwon, Nam Sung Kim, Jung Ho Ahn:
AttAcc! Unleashing the Power of PIM for Batched Transformer-based Generative Model Inference. ASPLOS (2) 2024: 103-119 - [c170]Chihun Song, Michael Jaemin Kim, Tianchen Wang, Houxiang Ji, Jinghan Huang, Ipoom Jeong, Jaehyun Park, Hwayong Nam, Minbok Wi, Jung Ho Ahn, Nam Sung Kim:
TAROT: A CXL SmartNIC-Based Defense Against Multi-bit Errors by Row-Hammer Attacks. ASPLOS (3) 2024: 981-998 - [c169]Soroush Ghodrati, Sean Kinzer, Hanyang Xu, Rohan Mahapatra, Yoonsung Kim, Byung Hoon Ahn, Dong Kai Wang, Lavanya Karthikeyan, Amir Yazdanbakhsh, Jongse Park, Nam Sung Kim, Hadi Esmaeilzadeh:
Tandem Processor: Grappling with Emerging Operators in Neural Networks. ASPLOS (2) 2024: 1165-1182 - [c168]Zhiting Zhu, Newton Ni, Yibo Huang, Yan Sun, Zhipeng Jia, Nam Sung Kim, Emmett Witchel:
Lupin: Tolerating Partial Failures in a CXL Pod. DIMES@SOSP 2024: 41-50 - [c167]Kiet Tuan Pham, Seokjoo Cho, Sangjin Lee, Lan Anh Nguyen, Hyeongi Yeo, Ipoom Jeong, Sungjin Lee, Nam Sung Kim, Yongseok Son:
ScaleCache: A Scalable Page Cache for Multiple Solid-State Drives. EuroSys 2024: 641-656 - [c166]Minjae Lee, Seongmin Park, Hyungmin Kim, Minyong Yoon, Janghwan Lee, Jun Won Choi, Nam Sung Kim, Mingu Kang, Jungwook Choi:
SPADE: Sparse Pillar-based 3D Object Detection Accelerator for Autonomous Driving. HPCA 2024: 454-467 - [c165]Jaewan Choi, Jaehyun Park, Kwanhee Kyung, Nam Sung Kim, Jung Ho Ahn:
Unleashing the Potential of PIM: Accelerating Large Batched Inference of Transformer-Based Generative Models. HPCA 2024: 614 - [c164]Sangsoo Park, KyungSoo Kim, Jinin So, Jin Jung, Jonggeon Lee, Kyoungwan Woo, Nayeon Kim, Younghyun Lee, Hyungyo Kim, Yongsuk Kwon, Jinhyun Kim, Jieun Lee, YeonGon Cho, Yongmin Tai, Jeonghyeon Cho, Hoyoung Song, Jung Ho Ahn, Nam Sung Kim:
An LPDDR-based CXL-PNM Platform for TCO-efficient Inference of Transformer-based Large Language Models. HPCA 2024: 970-982 - [c163]Jinghan Huang, Jiaqi Lou, Srikar Vanavasam, Xinhao Kong, Houxiang Ji, Ipoom Jeong, Danyang Zhuo, Eun Kyung Lee, Nam Sung Kim:
HAL: Hardware-assisted Load Balancing for Energy-efficient SNIC-Host Cooperative Computing. ISCA 2024: 613-627 - [c162]Yifan Yuan, Ren Wang, Narayan Ranganathan, Nikhil Rao, Sanjay Kumar, Philip Lantz, Vivekananthan Sanjeepan, Jorge Cabrera, Atul Kwatra, Rajesh Sankaran, Ipoom Jeong, Nam Sung Kim:
Intel Accelerators Ecosystem: An SoC-Oriented Perspective : Industry Product. ISCA 2024: 848-862 - [c161]Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn:
DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands. ISCA 2024: 1097-1111 - [c160]Jiaqi Lou, Xinhao Kong, Jinghan Huang, Wei Bai, Nam Sung Kim, Danyang Zhuo:
Harmonic: Hardware-assisted RDMA Performance Isolation for Public Clouds. NSDI 2024 - [i28]Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn:
DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands. CoRR abs/2405.02499 (2024) - 2023
- [j56]Ipoom Jeong, Jiaqi Lou, Yongseok Son, Yongjoo Park, Yifan Yuan, Nam Sung Kim:
LADIO: Leakage-Aware Direct I/O for I/O-Intensive Workloads. IEEE Comput. Archit. Lett. 22(2): 77-80 (2023) - [j55]Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn:
X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands. IEEE Comput. Archit. Lett. 22(2): 89-92 (2023) - [j54]Jaewan Choi, Jaehyun Park, Kwanhee Kyung, Nam Sung Kim, Jung Ho Ahn:
Unleashing the Potential of PIM: Accelerating Large Batched Inference of Transformer-Based Generative Models. IEEE Comput. Archit. Lett. 22(2): 113-116 (2023) - [j53]John Kim, Nam Sung Kim:
Special Issue on Emerging System Interconnects. IEEE Micro 43(2): 6-8 (2023) - [j52]Byoungchan Oh, Nilmini Abeyratne, Nam Sung Kim, Jeongseob Ahn, Ronald G. Dreslinski, Trevor N. Mudge:
Rethinking DRAM's Page Mode With STT-MRAM. IEEE Trans. Computers 72(5): 1503-1517 (2023) - [c159]Xinhao Kong, Jiaqi Lou, Wei Bai, Nam Sung Kim, Danyang Zhuo:
Towards a Manageable Intra-Host Network. HotOS 2023: 206-213 - [c158]Minbok Wi, Jaehyun Park, Seoyoung Ko, Michael Jaemin Kim, Nam Sung Kim, Eojin Lee, Jung Ho Ahn:
SHADOW: Preventing Row Hammer in DRAM with Intra-Subarray Row Shuffling. HPCA 2023: 333-346 - [c157]Yifan Yuan, Jinghan Huang, Yan Sun, Tianchen Wang, Jacob Nelson, Dan R. K. Ports, Yipeng Wang, Ren Wang, Charlie Tai, Nam Sung Kim:
Rambda: RDMA-driven Acceleration Framework for Memory-intensive µs-scale Datacenter Applications. HPCA 2023: 499-515 - [c156]Jinghan Huang, Jiaqi Lou, Yan Sun, Tianchen Wang, Eun Kyung Lee, Nam Sung Kim:
Making Sense of Using a SmartNIC to Reduce Datacenter Tax from SLO and TCO Perspectives. IISWC 2023: 28-42 - [c155]Dong Kai Wang, Jiaqi Lou, Naiyin Jin, Edwin Mascarenhas, Rohan Mahapatra, Sean Kinzer, Soroush Ghodrati, Amir Yazdanbakhsh, Hadi Esmaeilzadeh, Nam Sung Kim:
MESA: Microarchitecture Extensions for Spatial Architecture Generation. ISCA 2023: 49:1-49:14 - [c154]Jinghan Huang, Jiaqi Lou, Yan Sun, Tianchen Wang, Eun Kyung Lee, Nam Sung Kim:
Analyzing Energy Efficiency of a Server with a SmartNIC under SLO Constraints. ISPASS 2023: 334-336 - [c153]Yan Sun, Yifan Yuan, Zeduo Yu, Reese Kuper, Chihun Song, Jinghan Huang, Houxiang Ji, Siddharth Agarwal, Jiaqi Lou, Ipoom Jeong, Ren Wang, Jung Ho Ahn, Tianyin Xu, Nam Sung Kim:
Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices. MICRO 2023: 105-121 - [c152]Michael Jaemin Kim, Minbok Wi, Jaehyun Park, Seoyoung Ko, Jaeyoung Choi, Hwayong Nam, Nam Sung Kim, Jung Ho Ahn, Eojin Lee:
How to Kill the Second Bird with One ECC: The Pursuit of Row Hammer Resilient DRAM. MICRO 2023: 986-1001 - [c151]Houxiang Ji, Mark Mansi, Yan Sun, Yifan Yuan, Jinghan Huang, Reese Kuper, Michael M. Swift, Nam Sung Kim:
STYX: Exploiting SmartNIC Capability to Reduce Datacenter Memory Tax. USENIX ATC 2023: 619-633 - [i27]Hyoungwook Nam, Raghavendra Pradyumna Pothukuchi, Bo Li, Nam Sung Kim, Josep Torrellas:
Defensive ML: Defending Architectural Side-channels with Adversarial Obfuscation. CoRR abs/2302.01474 (2023) - [i26]Ahmed H. M. O. Abulila, Izzat El Hajj, Myoungsoo Jung, Nam Sung Kim:
Asynchronous Persistence with ASAP. CoRR abs/2302.13394 (2023) - [i25]Yan Sun, Yifan Yuan, Zeduo Yu, Reese Kuper, Ipoom Jeong, Ren Wang, Nam Sung Kim:
Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices. CoRR abs/2303.15375 (2023) - [i24]Reese Kuper, Ipoom Jeong, Yifan Yuan, Jiayu Hu, Ren Wang, Narayan Ranganathan, Nam Sung Kim:
A Quantitative Analysis and Guideline of Data Streaming Accelerator in Intel 4th Gen Xeon Scalable Processors. CoRR abs/2305.02480 (2023) - [i23]Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn:
X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands. CoRR abs/2306.03366 (2023) - 2022
- [j51]Liu Ke, Xuan Zhang, Jinin So, Jong-Geon Lee, Shinhaeng Kang, Sukhan Lee, Songyi Han, YeonGon Cho, Jin Hyun Kim, Yongsuk Kwon, KyungSoo Kim, Jin Jung, IlKwon Yun, Sung Joo Park, Hyunsun Park, Joon-Ho Song, Jeonghyeon Cho, Kyomin Sohn, Nam Sung Kim, Hsien-Hsin S. Lee:
Near-Memory Processing in Action: Accelerating Personalized Recommendation With AxDIMM. IEEE Micro 42(1): 116-127 (2022) - [j50]Jin Hyun Kim, Shinhaeng Kang, Sukhan Lee, Hyeonsu Kim, Yuhwan Ro, Seungwon Lee, David Wang, Jihyun Choi, Jinin So, YeonGon Cho, Joon-Ho Song, Jeonghyeon Cho, Kyomin Sohn, Nam Sung Kim:
Aquabolt-XL HBM2-PIM, LPDDR5-PIM With In-Memory Processing, and AXDIMM With Acceleration Buffer. IEEE Micro 42(3): 20-30 (2022) - [j49]Youjie Li, Amar Phanishayee, Derek Murray, Jakub Tarnawski, Nam Sung Kim:
Harmony: Overcoming the hurdles of GPU memory capacity to train massive DNN models on commodity servers. Proc. VLDB Endow. 15(11): 2747-2760 (2022) - [j48]Zhendong Bei, Nam Sung Kim, Kai Hwang, Zhibin Yu:
OSC: An Online Self-Configuring Big Data Framework for Optimization of QoS. IEEE Trans. Computers 71(4): 809-823 (2022) - [j47]Ashutosh Dhar, Edward Richter, Mang Yu, Wei Zuo, Xiaohao Wang, Nam Sung Kim, Deming Chen:
DML: Dynamic Partial Reconfiguration With Scalable Task Scheduling for Multi-Applications on FPGAs. IEEE Trans. Computers 71(10): 2577-2591 (2022) - [c150]Shinhaeng Kang, Sukhan Lee, Byeongho Kim, Hweesoo Kim, Kyomin Sohn, Nam Sung Kim, Eojin Lee:
An FPGA-based RNN-T Inference Accelerator with PIM-HBM. FPGA 2022: 146-152 - [c149]Cheng Wan, Youjie Li, Cameron R. Wolfe, Anastasios Kyrillidis, Nam Sung Kim, Yingyan Lin:
PipeGCN: Efficient Full-Graph Training of Graph Convolutional Networks with Pipelined Feature Communication. ICLR 2022 - [c148]Ahmed H. M. O. Abulila, Izzat El Hajj, Myoungsoo Jung, Nam Sung Kim:
ASAP: architecture support for asynchronous persistence. ISCA 2022: 306-319 - [c147]Mohammad Alian, Siddharth Agarwal, Jongmin Shin, Neel Patel, Yifan Yuan, Daehoon Kim, Ren Wang, Nam Sung Kim:
IDIO: Network-Driven, Inbound Network Data Orchestration on Server Processors. MICRO 2022: 480-493 - [c146]Cheng Wan, Youjie Li, Ang Li, Nam Sung Kim, Yingyan Lin:
BNS-GCN: Efficient Full-Graph Training of Graph Convolutional Networks with Partition-Parallelism and Random Boundary Node Sampling. MLSys 2022 - [c145]Yifan Yuan, Omar Alama, Jiawei Fei, Jacob Nelson, Dan R. K. Ports, Amedeo Sapio, Marco Canini, Nam Sung Kim:
Unlocking the Power of Inline Floating-Point Operations on Programmable Switches. NSDI 2022: 683-700 - [i22]Youjie Li, Amar Phanishayee, Derek Murray, Jakub Tarnawski, Nam Sung Kim:
Harmony: Overcoming the hurdles of GPU memory capacity to train massive DNN models on commodity servers. CoRR abs/2202.01306 (2022) - [i21]Yifan Yuan, Jinghan Huang, Yan Sun, Tianchen Wang, Jacob Nelson, Dan R. K. Ports, Yipeng Wang, Ren Wang, Charlie Tai, Nam Sung Kim:
ORCA: A Network and Architecture Co-design for Offloading us-scale Datacenter Applications. CoRR abs/2203.08906 (2022) - [i20]Cheng Wan, Youjie Li, Cameron R. Wolfe, Anastasios Kyrillidis, Nam Sung Kim, Yingyan Lin:
PipeGCN: Efficient Full-Graph Training of Graph Convolutional Networks with Pipelined Feature Communication. CoRR abs/2203.10428 (2022) - [i19]Cheng Wan, Youjie Li, Ang Li, Nam Sung Kim, Yingyan Lin:
BNS-GCN: Efficient Full-Graph Training of Graph Convolutional Networks with Partition-Parallelism and Random Boundary Node Sampling. CoRR abs/2203.10983 (2022) - [i18]Klara Nahrstedt, Naresh R. Shanbhag, Vikram S. Adve, Nancy M. Amato, Romit Roy Choudhury, Carl A. Gunter, Nam Sung Kim, Olgica Milenkovic, Sayan Mitra, Lav R. Varshney, Yurii Vlasov, Sarita V. Adve, Rashid Bashir, Andreas Cangellaris, James DiCarlo, Katie Driggs Campbell, Nick Feamster, Mattia Gazzola, Karrie Karahalios, Sanmi Koyejo, Paul G. Kwiat, Bo Li, Negar Mehr, Ravish Mehra, Andrew Miller, Daniela Rus, Alexander G. Schwing, Anshumali Shrivastava:
Coordinated Science Laboratory 70th Anniversary Symposium: The Future of Computing. CoRR abs/2210.08974 (2022) - 2021
- [j46]Mohammad Alian, Jongmin Shin, Ki-Dong Kang, Ren Wang, Alexandros Daglis, Daehoon Kim, Nam Sung Kim:
IDIO: Orchestrating Inbound Network Data on Server Processors. IEEE Comput. Archit. Lett. 20(1): 30-33 (2021) - [j45]Ki Chul Chun, Yong-Ki Kim, Yesin Ryu, Jaewon Park, Chi Sung Oh, Young-Yong Byun, So-Young Kim, Dong-Hak Shin, Jun Gyu Lee, Byung-Kyu Ho, Min-Sang Park, Seong-Jin Cho, Seunghan Woo, Byoung-Mo Moon, Beomyong Kil, Sungoh Ahn, Jae Hoon Lee, Sooyoung Kim, Seouk-Kyu Choi, Jae-Seung Jeong, Sung-Gi Ahn, Jihye Kim, Jun Jin Kong, Kyomin Sohn, Nam Sung Kim, Jung-Bae Lee:
A 16-GB 640-GB/s HBM2E DRAM With a Data-Bus Window Extension Technique and a Synergetic On-Die ECC Scheme. IEEE J. Solid State Circuits 56(1): 199-211 (2021) - [j44]Chang-Kyo Lee, Hyung-Joon Chi, Jin-Seok Heo, Junghwan Park, Jin-Hun Jang, Dongkeon Lee, Jaehoon Jung, Dong-Hun Lee, Dae-Hyun Kim, Kihan Kim, Sang-Yun Kim, Dukha Park, Youngil Lim, Geuntae Park, Seungjun Lee, Seungki Hong, Dae-Hyun Kwon, Isak Hwang, Byongwook Na, Kyungryun Kim, Seouk-Kyu Choi, Hye-In Choi, Hangi-Jung, Wonil Bae, Jeong-Don Ihm, Seung-Jun Bae, Nam Sung Kim, Jung-Bae Lee:
An 8.5-Gb/s/Pin 12-Gb LPDDR5 SDRAM With a Hybrid-Bank Architecture, Low Power, and Speed-Boosting Techniques. IEEE J. Solid State Circuits 56(1): 212-224 (2021) - [j43]Bingchao Li, Jizeng Wei, Nam Sung Kim:
Virtual-Cache: A cache-line borrowing technique for efficient GPU cache architectures. Microprocess. Microsystems 85: 104301 (2021) - [j42]Dimitrios Skarlatos, Umur Darbaz, Bhargava Gopireddy, Nam Sung Kim, Josep Torrellas:
BabelFish: Fusing Address Translations for Containers. IEEE Micro 41(3): 57-62 (2021) - [c144]Dong Kai Wang, Nam Sung Kim:
DiAG: a dataflow-inspired architecture for general-purpose processors. ASPLOS 2021: 93-106 - [c143]Jin Hyun Kim, Shinhaeng Kang, Sukhan Lee, Hyeonsu Kim, Woongjae Song, Yuhwan Ro, Seungwon Lee, David Wang, Hyunsung Shin, BengSeng Phuah, Jihyun Choi, Jinin So, YeonGon Cho, Joon-Ho Song, Jangseok Choi, Jeonghyeon Cho, Kyomin Sohn, Young-Soo Sohn, Kwang-Il Park, Nam Sung Kim:
Aquabolt-XL: Samsung HBM2-PIM with in-memory processing for ML accelerators and beyond. HCS 2021: 1-26 - [c142]Youjie Li, Amar Phanishayee, Derek Murray, Nam Sung Kim:
Doing more with less: training large DNN models on commodity servers for the masses. HotOS 2021: 119-127 - [c141]Yifan Yuan, Yipeng Wang, Ren Wang, Rangeen Basu Roy Chowdhury, Charlie Tai, Nam Sung Kim:
QEI: Query Acceleration Can be Generic and Efficient in the Cloud. HPCA 2021: 385-398 - [c140]Suk Han Lee, Shinhaeng Kang, Jaehoon Lee, Hyeonsu Kim, Eojin Lee, Seungwoo Seo, Hosang Yoon, Seungwon Lee, Kyounghwan Lim, Hyunsung Shin, Jinhyun Kim, Seongil O, Anand Iyer, David Wang, Kyomin Sohn, Nam Sung Kim:
Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology : Industrial Product. ISCA 2021: 43-56 - [c139]Yifan Yuan, Mohammad Alian, Yipeng Wang, Ren Wang, Ilia Kurakin, Charlie Tai, Nam Sung Kim:
Don't Forget the I/O When Allocating Your LLC. ISCA 2021: 112-125 - [c138]Jie Zhang, Miryeong Kwon, Donghyun Gouk, Sungjoon Koh, Nam Sung Kim, Mahmut Taylan Kandemir, Myoungsoo Jung:
Revamping Storage Class Memory With Hardware Automated Memory-Over-Storage Solution. ISCA 2021: 762-775 - [c137]Yong-Hun Kim, Hyung-Jin Kim, Jaemin Choi, Min-Su Ahn, Dongkeon Lee, Seung-Hyun Cho, Dong-Yeon Park, Young-Jae Park, Min-Soo Jang, Yong-Jun Kim, Jinyong Choi, Sung-Woo Yoon, Jae-Woo Jung, Jae-Koo Park, Jae-Woo Lee, Dae-Hyun Kwon, Hyung-Seok Cha, Si-Hyeong Cho, Seong-Hoon Kim, Jihwa You, Kyoung-Ho Kim, Dae-Hyun Kim, Byung-Cheol Kim, Young-Kwan Kim, Jun-Ho Kim, Seouk-Kyu Choi, Chanyoung Kim, Byongwook Na, Hye-In Choi, Reum Oh, Jeong-Don Ihm, Seung-Jun Bae, Nam Sung Kim, Jung-Bae Lee:
25.2 A 16Gb Sub-1V 7.14Gb/s/pin LPDDR5 SDRAM Applying a Mosaic Architecture with a Short-Feedback 1-Tap DFE, an FSS Bus with Low-Level Swing and an Adaptively Controlled Body Biasing in a 3rd-Generation 10nm DRAM. ISSCC 2021: 346-348 - [c136]Young-Cheon Kwon, Suk Han Lee, Jaehoon Lee, Sang-Hyuk Kwon, Je-Min Ryu, Jong-Pil Son, Seongil O, Hak-soo Yu, Haesuk Lee, Soo Young Kim, Youngmin Cho, Jin Guk Kim, Jongyoon Choi, Hyunsung Shin, Jin Kim, BengSeng Phuah, Hyoungmin Kim, Myeong Jun Song, Ahn Choi, Daeho Kim, Sooyoung Kim, Eun-Bong Kim, David Wang, Shinhaeng Kang, Yuhwan Ro, Seungwoo Seo, Joon-Ho Song, Jaeyoun Youn, Kyomin Sohn, Nam Sung Kim:
25.4 A 20nm 6GB Function-In-Memory DRAM, Based on HBM2 with a 1.2TFLOPS Programmable Computing Unit Using Bank-Level Parallelism, for Machine Learning Applications. ISSCC 2021: 350-352 - [c135]Seunghak Lee, Ki-Dong Kang, Hwanjun Lee, Hyungwon Park, Young Hoon Son, Nam Sung Kim, Daehoon Kim:
GreenDIMM: OS-assisted DRAM Power Management for DRAM with a Sub-array Granularity Power-Down State. MICRO 2021: 131-142 - [c134]Ki-Dong Kang, Gyeongseo Park, Hyosang Kim, Mohammad Alian, Nam Sung Kim, Daehoon Kim:
NMAP: Power Management Based on Network Packet Processing Mode Transition for Latency-Critical Workloads. MICRO 2021: 143-154 - [i17]Jie Zhang, Miryeong Kwon, Donghyun Gouk, Sungjoon Koh, Nam Sung Kim, Mahmut Taylan Kandemir, Myoungsoo Jung:
Revamping Storage Class Memory With Hardware Automated Memory-Over-Storage Solution. CoRR abs/2106.14241 (2021) - [i16]Yifan Yuan, Omar Alama, Amedeo Sapio, Jiawei Fei, Jacob Nelson, Dan R. K. Ports, Marco Canini, Nam Sung Kim:
Unlocking the Power of Inline Floating-Point Operations on Programmable Switches. CoRR abs/2112.06095 (2021) - 2020
- [j41]Ki-Dong Kang, Gyeongseo Park, Nam Sung Kim, Daehoon Kim:
Network Packet Processing Mode-Aware Power Management for Data Center Servers. IEEE Comput. Archit. Lett. 19(1): 1-4 (2020) - [j40]Jie Zhang, Miryeong Kwon, Sanghyun Han, Nam Sung Kim, Mahmut T. Kandemir, Myoungsoo Jung:
FastDrain: Removing Page Victimization Overheads in NVMe Storage Stack. IEEE Comput. Archit. Lett. 19(2): 92-96 (2020) - [j39]Yongseok Son, Moonsub Kim, Sunggon Kim, Heon Young Yeom, Nam Sung Kim, Hyuck Han:
Design and Implementation of SSD-Assisted Backup and Recovery for Database Systems. IEEE Trans. Knowl. Data Eng. 32(2): 260-274 (2020) - [j38]Sungjoon Koh, Jie Zhang, Miryeong Kwon, Jungyeon Yoon, David Donofrio, Nam Sung Kim, Myoungsoo Jung:
Errata to "Exploring Fault-Tolerant Erasure Codes for Scalable All-Flash Array Clusters". IEEE Trans. Parallel Distributed Syst. 31(6): 1460 (2020) - [c133]Soroush Ghodrati, Hardik Sharma, Sean Kinzer, Amir Yazdanbakhsh, Jongse Park, Nam Sung Kim, Doug Burger, Hadi Esmaeilzadeh:
Mixed-Signal Charge-Domain Acceleration of Deep Neural Networks through Interleaved Bit-Partitioned Arithmetic. PACT 2020: 399-411 - [c132]Soroush Ghodrati, Hardik Sharma, Cliff Young, Nam Sung Kim, Hadi Esmaeilzadeh:
Bit-Parallel Vector Composability for Neural Acceleration. DAC 2020: 1-6 - [c131]Dimitrios Skarlatos, Umur Darbaz, Bhargava Gopireddy, Nam Sung Kim, Josep Torrellas:
BabelFish: Fusing Address Translations for Containers. ISCA 2020: 501-514 - [c130]Mohammad Alian, Yifan Yuan, Jie Zhang, Ren Wang, Myoungsoo Jung, Nam Sung Kim:
Data Direct I/O Characterization for Future I/O System Exploration. ISPASS 2020: 160-169 - [c129]Chi-Sung Oh, Ki Chul Chun, Young-Yong Byun, Yong-Ki Kim, So-Young Kim, Yesin Ryu, Jaewon Park, Sinho Kim, Sang-uhn Cha, Dong-Hak Shin, Jungyu Lee, Jong-Pil Son, Byung-Kyu Ho, Seong-Jin Cho, Beomyong Kil, Sungoh Ahn, Baekmin Lim, Yong-Sik Park, Kijun Lee, Myung-Kyu Lee, Seungduk Baek, Junyong Noh, Jae-Wook Lee, Seungseob Lee, Sooyoung Kim, Bo-Tak Lim, Seouk-Kyu Choi, Jin-Guk Kim, Hye-In Choi, Hyuk-Jun Kwon, Jun Jin Kong, Kyomin Sohn, Nam Sung Kim, Kwang-Il Park, Jung-Bae Lee:
22.1 A 1.1V 16GB 640GB/s HBM2E DRAM with a Data-Bus Window-Extension Technique and a Synergetic On-Die ECC Scheme. ISSCC 2020: 330-332 - [c128]Ashutosh Dhar, Xiaohao Wang, Hubertus Franke, Jinjun Xiong, Jian Huang, Wen-Mei W. Hwu, Nam Sung Kim, Deming Chen:
FReaC Cache: Folded-logic Reconfigurable Computing in the Last Level Cache. MICRO 2020: 102-117 - [c127]Soroush Ghodrati, Byung Hoon Ahn, Joon Kyung Kim, Sean Kinzer, Brahmendra Reddy Yatham, Navateja Alla, Hardik Sharma, Mohammad Alian, Eiman Ebrahimi, Nam Sung Kim, Cliff Young, Hadi Esmaeilzadeh:
Planaria: Dynamic Architecture Fission for Spatial Multi-Tenant Acceleration of Deep Neural Networks. MICRO 2020: 681-697 - [c126]Ashutosh Dhar, Mang Yu, Wei Zuo, Xiaohao Wang, Nam Sung Kim, Deming Chen:
Leveraging Dynamic Partial Reconfiguration with Scalable ILP Based Task Scheduling. VLSID 2020: 201-206 - [i15]Soroush Ghodrati, Hardik Sharma, Cliff Young, Nam Sung Kim, Hadi Esmaeilzadeh:
Bit-Parallel Vector Composability for Neural Acceleration. CoRR abs/2004.05333 (2020) - [i14]Jie Zhang, Miryeong Kwon, Sanghyun Han, Nam Sung Kim, Mahmut T. Kandemir, Myoungsoo Jung:
FastDrain: Removing Page Victimization Overheads in NVMe Storage Stack. CoRR abs/2006.08966 (2020) - [i13]Yifan Yuan, Mohammad Alian, Yipeng Wang, Ilia Kurakin, Ren Wang, Tsung-Yuan Charlie Tai, Nam Sung Kim:
IOCA: High-Speed I/O-Aware LLC Management for Network-Centric Multi-Tenant Platform. CoRR abs/2007.04552 (2020)
2010 – 2019
- 2019
- [j37]Seunghak Lee, Nam Sung Kim, Daehoon Kim:
Exploiting OS-Level Memory Offlining for DRAM Power Management. IEEE Comput. Archit. Lett. 18(2): 141-144 (2019) - [j36]Mingu Kang, Prakalp Srivastava, Vikram S. Adve, Nam Sung Kim, Naresh R. Shanbhag:
An Energy-Efficient Programmable Mixed-Signal Accelerator for Machine Learning Algorithms. IEEE Micro 39(5): 64-72 (2019) - [j35]Bingchao Li, Jizeng Wei, Jizhou Sun, Murali Annavaram, Nam Sung Kim:
An Efficient GPU Cache Architecture for Applications with Irregular Memory Access Patterns. ACM Trans. Archit. Code Optim. 16(3): 20:1-20:24 (2019) - [j34]Sungjoon Koh, Jie Zhang, Miryeong Kwon, Jungyeon Yoon, David Donofrio, Nam Sung Kim, Myoungsoo Jung:
Exploring Fault-Tolerant Erasure Codes for Scalable All-Flash Array Clusters. IEEE Trans. Parallel Distributed Syst. 30(6): 1312-1330 (2019) - [c125]Ahmed H. M. O. Abulila, Vikram Sharma Mailthody, Zaid Qureshi, Jian Huang, Nam Sung Kim, Jinjun Xiong, Wen-Mei W. Hwu:
FlatFlash: Exploiting the Byte-Accessibility of SSDs within a Unified Memory-Storage Hierarchy. ASPLOS 2019: 971-985 - [c124]Nam Sung Kim, Choungki Song, Woo Young Cho, Jian Huang, Myoungsoo Jung:
LL-PCM: Low-Latency Phase Change Memory Architecture. DAC 2019: 14 - [c123]Nam Sung Kim, Pankaj Mehra:
Practical Near-Data Processing to Evolve Memory and Storage Devices into Mainstream Heterogeneous Computing Systems. DAC 2019: 22 - [c122]Zhenhong Liu, Amir Yazdanbakhsh, Dong Kai Wang, Hadi Esmaeilzadeh, Nam Sung Kim:
AxMemo: hardware-compiler co-design for approximate code memoization. ISCA 2019: 685-697 - [c121]Dong Kai Wang, Nam Sung Kim:
A2M: Approximate Algebraic Memory Using Polynomials Rings. ISLPED 2019: 1-6 - [c120]Ashutosh Dhar, Sitao Huang, Jinjun Xiong, Damir A. Jamsek, Bruno Mesnet, Jian Huang, Nam Sung Kim, Wen-Mei W. Hwu, Deming Chen:
Near-Memory and In-Storage FPGA Acceleration for Emerging Cognitive Computing Workloads. ISVLSI 2019: 68-75 - [c119]Byoungchan Oh, Nilmini Abeyratne, Nam Sung Kim, Ronald G. Dreslinski, Trevor N. Mudge:
SMART: STT-MRAM architecture for smart activation and sensing. MEMSYS 2019: 316-330 - [c118]Mohammad Alian, Nam Sung Kim:
NetDIMM: Low-Latency Near-Memory Network Interface Architecture. MICRO 2019: 699-711 - [c117]Hyojun Son, Hanjoon Kim, Hao Wang, Nam Sung Kim, John Kim:
Ghost routers: energy-efficient asymmetric multicore processors with symmetric NoCs. NOCS 2019: 2:1-2:7 - [p1]Nam Sung Kim, Ulya R. Karpuzcu:
Approximate Ultra-Low Voltage Many-Core Processor Design. Approximate Circuits 2019: 371-382 - [i12]Sungjoon Koh, Jie Zhang, Miryeong Kwon, Jungyeon Yoon, David Donofrio, Nam Sung Kim, Myoungsoo Jung:
Exploring Fault-Tolerant Erasure Codes for Scalable All-Flash Array Clusters. CoRR abs/1906.08602 (2019) - [i11]Soroush Ghodrati, Hardik Sharma, Sean Kinzer, Amir Yazdanbakhsh, Kambiz Samadi, Nam Sung Kim, Doug Burger, Hadi Esmaeilzadeh:
Mixed-Signal Charge-Domain Acceleration of Deep Neural networks through Interleaved Bit-Partitioned Arithmetic. CoRR abs/1906.11915 (2019) - 2018
- [j33]Sukhan Lee, Hyunyoon Cho, Young Hoon Son, Yuhwan Ro, Nam Sung Kim, Jung Ho Ahn:
Leveraging Power-Performance Relationship of Energy-Efficient Modern DRAM Devices. IEEE Access 6: 31387-31398 (2018) - [j32]Myoungsoo Jung, Jie Zhang, Ahmed H. M. O. Abulila, Miryeong Kwon, Narges Shahidi, John Shalf, Nam Sung Kim, Mahmut T. Kandemir:
SimpleSSD: Modeling Solid State Drives for Holistic System Simulation. IEEE Comput. Archit. Lett. 17(1): 37-41 (2018) - [j31]Seungwon Min, Mohammad Alian, Wen-Mei Hwu, Nam Sung Kim:
Semi-Coherent DMA: An Alternative I/O Coherency Management for Embedded Systems. IEEE Comput. Archit. Lett. 17(2): 221-224 (2018) - [j30]Zhenhong Liu, Amir Yazdanbakhsh, Taejoon Park, Hadi Esmaeilzadeh, Nam Sung Kim:
SiMul: An Algorithm-Driven Approximate Multiplier Design for Machine Learning. IEEE Micro 38(4): 50-59 (2018) - [j29]Li Jiang, Tianjian Li, Naifeng Jing, Nam Sung Kim, Minyi Guo, Xiaoyao Liang:
CNFET-Based High Throughput SIMD Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(7): 1331-1344 (2018) - [c116]Sukhan Lee, Kiwon Lee, Min Chul Sung, Mohammad Alian, Chankyung Kim, Wooyeong Cho, Reum Oh, Seongil O, Jung Ho Ahn, Nam Sung Kim:
3D-Xpath: high-density managed DRAM architecture with cost-effective alternative paths for memory transactions. PACT 2018: 22:1-22:12 - [c115]Amir Yazdanbakhsh, Choungki Song, Jacob Sacks, Pejman Lotfi-Kamran, Hadi Esmaeilzadeh, Nam Sung Kim:
In-DRAM near-data approximate acceleration for GPUs. PACT 2018: 34:1-34:14 - [c114]Nam Sung Kim:
Practical Challenges in Supporting Function in Memory. A-SSCC 2018: 9-12 - [c113]Ki-Dong Kang, Mohammad Alian, Daehoon Kim, Jaehyuk Huh, Nam Sung Kim:
VIP: Virtual Performance-State for Efficient Power Management of Virtual Machines. SoCC 2018: 237-248 - [c112]Amir Yazdanbakhsh, Michael Brzozowski, Behnam Khaleghi, Soroush Ghodrati, Kambiz Samadi, Nam Sung Kim, Hadi Esmaeilzadeh:
FlexiGAN: An End-to-End Solution for FPGA Acceleration of Generative Adversarial Networks. FCCM 2018: 65-72 - [c111]Mohammad Alian, Krishna Parasuram Srinivasan, Nam Sung Kim:
Simulating PCI-Express Interconnect for Future System Exploration. IISWC 2018: 168-178 - [c110]Gunjae Koo, Hyeran Jeon, Zhenhong Liu, Nam Sung Kim, Murali Annavaram:
CTA-Aware Prefetching and Scheduling for GPU. IPDPS 2018: 137-148 - [c109]Jie Zhang, Shuwen Gao, Nam Sung Kim, Myoungsoo Jung:
CIAO: Cache Interference-Aware Throughput-Oriented Architecture and Scheduling for GPUs. IPDPS 2018: 149-159 - [c108]Prakalp Srivastava, Mingu Kang, Sujan K. Gonugondla, Sungmin Lim, Jungwook Choi, Vikram S. Adve, Nam Sung Kim, Naresh R. Shanbhag:
PROMISE: An End-to-End Design of a Programmable Mixed-Signal Accelerator for Machine-Learning Algorithms. ISCA 2018: 43-56 - [c107]Amir Yazdanbakhsh, Kambiz Samadi, Nam Sung Kim, Hadi Esmaeilzadeh:
GANAX: A Unified MIMD-SIMD Acceleration for Generative Adversarial Networks. ISCA 2018: 650-661 - [c106]Zhenhong Liu, Daniel Wong, Nam Sung Kim:
Load-Triggered Warp Approximation on GPU. ISLPED 2018: 26:1-26:6 - [c105]Byoungchan Oh, Nam Sung Kim, Jeongseob Ahn, Bingchao Li, Ronald G. Dreslinski, Trevor N. Mudge:
A load balancing technique for memory channels. MEMSYS 2018: 55-66 - [c104]Youjie Li, Jongse Park, Mohammad Alian, Yifan Yuan, Zheng Qu, Peitian Pan, Ren Wang, Alexander G. Schwing, Hadi Esmaeilzadeh, Nam Sung Kim:
A Network-Centric Hardware/Algorithm Co-Design to Accelerate Distributed Training of Deep Neural Networks. MICRO 2018: 175-188 - [c103]Donghyun Gouk, Miryeong Kwon, Jie Zhang, Sungjoon Koh, Wonil Choi, Nam Sung Kim, Mahmut T. Kandemir, Myoungsoo Jung:
Amber*: Enabling Precise Full-System Simulation with Detailed Modeling of All SSD Resources. MICRO 2018: 469-481 - [c102]Mohammad Alian, Seungwon Min, Hadi Asgharimoghaddam, Ashutosh Dhar, Dong Kai Wang, Thomas Roewer, Adam J. McPadden, Oliver O'Halloran, Deming Chen, Jinjun Xiong, Daehoon Kim, Wen-Mei W. Hwu, Nam Sung Kim:
Application-Transparent Near-Memory Processing Architecture with Memory Channel Network. MICRO 2018: 802-814 - [c101]Mingchao Yu, Zhifeng Lin, Krishna Narra, Songze Li, Youjie Li, Nam Sung Kim, Alexander G. Schwing, Murali Annavaram, Salman Avestimehr:
GradiVeQ: Vector Quantization for Bandwidth-Efficient Gradient Aggregation in Distributed CNN Training. NeurIPS 2018: 5129-5139 - [c100]Youjie Li, Mingchao Yu, Songze Li, Salman Avestimehr, Nam Sung Kim, Alexander G. Schwing:
Pipe-SGD: A Decentralized Pipelined SGD Framework for Distributed Deep Net Training. NeurIPS 2018: 8056-8067 - [c99]Jie Zhang, Miryeong Kwon, Donghyun Gouk, Sungjoon Koh, Changlim Lee, Mohammad Alian, Myoungjun Chun, Mahmut Taylan Kandemir, Nam Sung Kim, Jihong Kim, Myoungsoo Jung:
FlashShare: Punching Through Server Storage Stack from Kernel to Firmware for Ultra-Low Latency SSDs. OSDI 2018: 477-492 - [i10]Jie Zhang, Shuwen Gao, Nam Sung Kim, Myoungsoo Jung:
CIAO: Cache Interference-Aware Throughput-Oriented Architecture and Scheduling for GPUs. CoRR abs/1805.07718 (2018) - [i9]Amir Yazdanbakhsh, Hajar Falahati, Philip J. Wolfe, Kambiz Samadi, Nam Sung Kim, Hadi Esmaeilzadeh:
GANAX: A Unified MIMD-SIMD Acceleration for Generative Adversarial Networks. CoRR abs/1806.01107 (2018) - [i8]Donghyun Gouk, Miryeong Kwon, Jie Zhang, Sungjoon Koh, Wonil Choi, Nam Sung Kim, Mahmut T. Kandemir, Myoungsoo Jung:
Amber: Enabling Precise Full-System Simulation with Detailed Modeling of All SSD Resources. CoRR abs/1811.01544 (2018) - [i7]Mingchao Yu, Zhifeng Lin, Krishna Narra, Songze Li, Youjie Li, Nam Sung Kim, Alexander G. Schwing, Murali Annavaram, Salman Avestimehr:
GradiVeQ: Vector Quantization for Bandwidth-Efficient Gradient Aggregation in Distributed CNN Training. CoRR abs/1811.03617 (2018) - [i6]Youjie Li, Mingchao Yu, Songze Li, Salman Avestimehr, Nam Sung Kim, Alexander G. Schwing:
Pipe-SGD: A Decentralized Pipelined SGD Framework for Distributed Deep Net Training. CoRR abs/1811.03619 (2018) - 2017
- [j28]Nam Sung Kim, Deming Chen, Jinjun Xiong, Wen-mei W. Hwu:
Heterogeneous Computing Meets Near-Memory Acceleration and High-Level Synthesis in the Post-Moore Era. IEEE Micro 37(4): 10-18 (2017) - [j27]DaeHan Ahn, Hyerim Chung, Ho-Won Lee, Kyunghun Kang, Pan-Woo Ko, Nam Sung Kim, Taejoon Park:
Smart Gait-Aid Glasses for Parkinson's Disease Patients. IEEE Trans. Biomed. Eng. 64(10): 2394-2402 (2017) - [c98]Daehoon Kim, Mohammad Alian, Jaehyuk Huh, Nam Sung Kim:
Janus: supporting heterogeneous power management in virtualized environments. SoCC 2017: 652 - [c97]Mohammad Alian, Ahmed H. M. O. Abulila, Lokesh Jindal, Daehoon Kim, Nam Sung Kim:
NCAP: Network-Driven, Packet Context-Aware Power Management for Client-Server Architecture. HPCA 2017: 25-36 - [c96]Sang-uhn Cha, Seongil O, Hyunsung Shin, Sangjoon Hwang, Kwang-Il Park, Seong-Jin Jang, Joo-Sun Choi, Gyo-Young Jin, Young Hoon Son, Hyunyoon Cho, Jung Ho Ahn, Nam Sung Kim:
Defect Analysis and Cost-Effective Resilience Architecture for Future DRAM Devices. HPCA 2017: 61-72 - [c95]Zhenhong Liu, Syed Zohaib Gilani, Murali Annavaram, Nam Sung Kim:
G-Scalar: Cost-Effective Generalized Scalar Execution Architecture for Power-Efficient GPUs. HPCA 2017: 601-612 - [c94]Ketan Date, Keven Feng, Rakesh Nagi, Jinjun Xiong, Nam Sung Kim, Wen-Mei W. Hwu:
Collaborative (CPU + GPU) algorithms for triangle counting and truss decomposition on the Minsky architecture: Static graph challenge: Subgraph isomorphism. HPEC 2017: 1-7 - [c93]Wen-mei W. Hwu, Izzat El Hajj, Simon Garcia De Gonzalo, Carl Pearson, Nam Sung Kim, Deming Chen, Jinjun Xiong, Zehra Sura:
Rebooting the Data Access Hierarchy of Computing Systems. ICRC 2017: 1-4 - [c92]Sungjoon Koh, Jie Zhang, Miryeong Kwon, Jungyeon Yoon, David Donofrio, Nam Sung Kim, Myoungsoo Jung:
Understanding system characteristics of online erasure coding on scalable, distributed and large-scale SSD array systems. IISWC 2017: 76-86 - [c91]Sukhan Lee, Yuhwan Ro, Young Hoon Son, Hyunyoon Cho, Nam Sung Kim, Jung Ho Ahn:
Understanding power-performance relationship of energy-efficient modern DRAM devices. IISWC 2017: 110-111 - [c90]Bingchao Li, Jizhou Sun, Murali Annavaram, Nam Sung Kim:
Elastic-Cache: GPU Cache Architecture for Efficient Fine- and Coarse-Grained Cache-Line Management. IPDPS 2017: 82-91 - [c89]Michael Mishkin, Nam Sung Kim, Mikko H. Lipasti:
Temporal codes in on-chip interconnects. ISLPED 2017: 1-6 - [c88]Mohammad Alian, Umur Darbaz, Gábor Dózsa, Stephan Diestelhorst, Daehoon Kim, Nam Sung Kim:
dist-gem5: Distributed simulation of computer clusters. ISPASS 2017: 153-162 - [c87]Dimitrios Skarlatos, Nam Sung Kim, Josep Torrellas:
Pageforge: a near-memory content-aware page-merging architecture. MICRO 2017: 302-314 - [i5]Myoungsoo Jung, Jie Zhang, Ahmed H. M. O. Abulila, Miryeong Kwon, Narges Shahidi, John Shalf, Nam Sung Kim, Mahmut T. Kandemir:
SimpleSSD: Modeling Solid State Drives for Holistic System Simulation. CoRR abs/1705.06419 (2017) - [i4]Sungjoon Koh, Jie Zhang, Miryeong Kwon, Jungyeon Yoon, David Donofrio, Nam Sung Kim, Myoungsoo Jung:
Understanding System Characteristics of Online Erasure Coding on Scalable, Distributed and Large-Scale SSD Array Systems. CoRR abs/1709.05365 (2017) - 2016
- [j26]Mohammad Alian, Daehoon Kim, Nam Sung Kim:
pd-gem5: Simulation Infrastructure for Parallel/Distributed Computer Systems. IEEE Comput. Archit. Lett. 15(1): 41-44 (2016) - [j25]Qiang Xu, Todd Mytkowicz, Nam Sung Kim:
Guest Editors' Introduction: Approximate Computing. IEEE Des. Test 33(1): 6-7 (2016) - [j24]Qiang Xu, Todd Mytkowicz, Nam Sung Kim:
Approximate Computing: A Survey. IEEE Des. Test 33(1): 8-22 (2016) - [j23]Bingchao Li, Choungki Song, Jizeng Wei, Jung Ho Ahn, Nam Sung Kim:
Exploring new features of high-bandwidth memory for GPUs. IEICE Electron. Express 13(14): 20160527 (2016) - [j22]Hadi Asghari Moghaddam, Amin Farmahini Farahani, Katherine Morrow, Jung Ho Ahn, Nam Sung Kim:
Near-DRAM Acceleration with Single-ISA Heterogeneous Processing in Standard Memory Modules. IEEE Micro 36(1): 24-34 (2016) - [j21]Hadi Asgharimoghaddam, Nam Sung Kim:
SpinWise: A Practical Energy-Efficient Synchronization Technique for CMPs. SIGARCH Comput. Archit. News 44(1): 1-8 (2016) - [j20]Jae Young Jang, Hao Wang, Euijin Kwon, Jae W. Lee, Nam Sung Kim:
Workload-Aware Optimal Power Allocation on Single-Chip Heterogeneous Processors. IEEE Trans. Parallel Distributed Syst. 27(6): 1838-1851 (2016) - [c86]Hadi Asghari Moghaddam, Hamid Reza Ghasemi, Abhishek Arvind Sinkar, Indrani Paul, Nam Sung Kim:
VR-scale: runtime dynamic phase scaling of processor voltage regulators for improving power efficiency. DAC 2016: 151:1-151:6 - [c85]Daniel Wong, Nam Sung Kim, Murali Annavaram:
Approximating warps with intra-warp operand value similarity. HPCA 2016: 176-187 - [c84]Hao Wang, Jie Zhang, Sharmila Shridhar, Gieseo Park, Myoungsoo Jung, Nam Sung Kim:
DUANG: Fast and lightweight page migration in asymmetric memory systems. HPCA 2016: 481-493 - [c83]Bhargava Gopireddy, Choungki Song, Josep Torrellas, Nam Sung Kim, Aditya Agrawal, Asit K. Mishra:
ScalCore: Designing a core for voltage scalability. HPCA 2016: 681-693 - [c82]S. Karen Khatamifard, Michael Resch, Nam Sung Kim, Ulya R. Karpuzcu:
VARIUS-TC: A modular architecture-level model of parametric variation for thin-channel switches. ICCD 2016: 654-661 - [c81]Tianjian Li, Li Jiang, Naifeng Jing, Nam Sung Kim, Xiaoyao Liang:
CNFET-based high throughput register file architecture. ICCD 2016: 662-669 - [c80]Paula Aguilera, Dong Ping Zhang, Nam Sung Kim, Nuwan Jayasena:
Fine-Grained Task Migration for Graph Algorithms Using Processing in Memory. IPDPS Workshops 2016: 489-498 - [c79]Ting Wang, Qian Zhang, Nam Sung Kim, Qiang Xu:
On Effective and Efficient Quality Management for Approximate Computing. ISLPED 2016: 156-161 - [c78]Matthew Tomei, Henry Duwe, Nam Sung Kim, Rakesh Kumar:
Bit Serializing a Microprocessor for Ultra-low-power. ISLPED 2016: 200-205 - [c77]Hadi Asghari Moghaddam, Young Hoon Son, Jung Ho Ahn, Nam Sung Kim:
Chameleon: Versatile and practical near-DRAM acceleration architecture for large memory systems. MICRO 2016: 50:1-50:13 - [c76]Dimitrios Skarlatos, Renji Thomas, Aditya Agrawal, Shibin Qin, Robert C. N. Pilawa-Podgurski, Ulya R. Karpuzcu, Radu Teodorescu, Nam Sung Kim, Josep Torrellas:
Snatch: Opportunistically reassigning power allocation between processor and memory in 3D stacks. MICRO 2016: 54:1-54:12 - 2015
- [j19]Amin Farmahini Farahani, Jung Ho Ahn, Katherine Morrow, Nam Sung Kim:
DRAMA: An Architecture for Accelerated Processing Near Memory. IEEE Comput. Archit. Lett. 14(1): 26-29 (2015) - [j18]Ismail Akturk, Nam Sung Kim, Ulya R. Karpuzcu:
Decoupled Control and Data Processing for Approximate Near-Threshold Voltage Computing. IEEE Micro 35(4): 70-78 (2015) - [j17]Srinivasan Narayanamoorthy, Hadi Asghari Moghaddam, Zhenhong Liu, Taejoon Park, Nam Sung Kim:
Energy-Efficient Approximate Multiplication for Digital Signal Processing and Classification Applications. IEEE Trans. Very Large Scale Integr. Syst. 23(6): 1180-1184 (2015) - [c75]Amir Yazdanbakhsh, David J. Palframan, Azadeh Davoodi, Nam Sung Kim, Mikko H. Lipasti:
Online and Operand-Aware Detection of Failures Utilizing False Alarm Vectors. ACM Great Lakes Symposium on VLSI 2015: 149-154 - [c74]Amin Farmahini Farahani, Jung Ho Ahn, Katherine Morrow, Nam Sung Kim:
NDA: Near-DRAM acceleration architecture leveraging commodity DRAM devices and standard memory modules. HPCA 2015: 283-295 - [c73]Hao Wang, Chang-Jae Park, Gyungsu Byun, Jung Ho Ahn, Nam Sung Kim:
Alloy: Parallel-serial memory channel architecture for single-chip heterogeneous processor systems. HPCA 2015: 296-308 - [c72]David J. Palframan, Nam Sung Kim, Mikko H. Lipasti:
iPatch: Intelligent fault patching to improve energy efficiency. HPCA 2015: 428-438 - [c71]Young Hoon Son, Sukhan Lee, Seongil O, Sanghyuk Kwon, Nam Sung Kim, Jung Ho Ahn:
CiDRA: A cache-inspired DRAM resilience architecture. HPCA 2015: 502-513 - [c70]Hamid Reza Ghasemi, Ulya R. Karpuzcu, Nam Sung Kim:
Comparison of single-ISA heterogeneous versus wide dynamic range processors for mobile applications. ICCD 2015: 304-310 - [c69]David J. Palframan, Nam Sung Kim, Mikko H. Lipasti:
COP: to compress and protect main memory. ISCA 2015: 682-693 - [c68]Hyeran Jeon, Gokul Subramanian Ravi, Nam Sung Kim, Murali Annavaram:
GPU register file virtualization. MICRO 2015: 420-432 - [c67]Daehoon Kim, Hwanju Kim, Nam Sung Kim, Jaehyuk Huh:
vCache: architectural support for transparent and isolated virtual LLCs in virtualized environments. MICRO 2015: 623-634 - [c66]Sankaralingam Panneerselvam, Michael M. Swift, Nam Sung Kim:
Bolt: Faster Reconfiguration in Operating Systems. USENIX ATC 2015: 511-516 - 2014
- [j16]Syed Zohaib Gilani, Taejoon Park, Nam Sung Kim:
Low-cost scratchpad memory organizations using heterogeneous cell sizes for low-voltage operations. Microprocess. Microsystems 38(7): 707-716 (2014) - [j15]DaeHan Ahn, Nam Sung Kim, Sang Jun Moon, Taejoon Park, Sang Hyuk Son:
Optimization of a Cell Counting Algorithm for Mobile Point-of-Care Testing Platforms. Sensors 14(8): 15244-15261 (2014) - [j14]Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte:
Energy-Efficient Pixel-Arithmetic. IEEE Trans. Computers 63(8): 1882-1894 (2014) - [j13]Abhishek A. Sinkar, Hamid Reza Ghasemi, Michael J. Schulte, Ulya R. Karpuzcu, Nam Sung Kim:
Low-Cost Per-Core Voltage Domain Support for Power-Constrained High-Performance Processors. IEEE Trans. Very Large Scale Integr. Syst. 22(4): 747-758 (2014) - [c65]Hamid Reza Ghasemi, Nam Sung Kim:
RCS: runtime resource and core scaling for power-constrained multi-core processors. PACT 2014: 251-262 - [c64]Hao Wang, Ripudaman Singh, Michael J. Schulte, Nam Sung Kim:
Memory scheduling towards high-throughput cooperative heterogeneous computing. PACT 2014: 331-342 - [c63]Paula Aguilera, Katherine Morrow, Nam Sung Kim:
QoS-aware dynamic resource allocation for spatial-multitasking GPUs. ASP-DAC 2014: 726-731 - [c62]Paula Aguilera, Jungseob Lee, Amin Farmahini Farahani, Katherine Morrow, Michael J. Schulte, Nam Sung Kim:
Process variation-aware workload partitioning algorithms for GPUs supporting spatial-multitasking. DATE 2014: 1-6 - [c61]David J. Palframan, Nam Sung Kim, Mikko H. Lipasti:
Precision-aware soft error protection for GPUs. HPCA 2014: 49-59 - [c60]Ulya R. Karpuzcu, Ismail Akturk, Nam Sung Kim:
Accordion: Toward soft Near-Threshold Voltage Computing. HPCA 2014: 72-83 - [c59]Paula Aguilera, Katherine Morrow, Nam Sung Kim:
Fair share: Allocation of GPU resources for both performance and fairness. ICCD 2014: 440-447 - [c58]Yanpei Liu, Stark C. Draper, Nam Sung Kim:
SleepScale: Runtime joint speed scaling and sleep states management for power efficient data centers. ISCA 2014: 313-324 - [c57]Seongil O, Young Hoon Son, Nam Sung Kim, Jung Ho Ahn:
Row-buffer decoupling: A case for low-latency DRAM microarchitecture. ISCA 2014: 337-348 - [c56]Hoyoung Kim, Soojung Ryu, Abhishek A. Sinkar, Nam Sung Kim:
Quantitative comparison of the power reduction techniques for samsung reconfigurable processor. ISCAS 2014: 1736-1739 - [c55]Amin Farmahini Farahani, Nam Sung Kim, Katherine Morrow:
Energy-efficient reconfigurable cache architectures for accelerator-enabled embedded systems. ISPASS 2014: 211-220 - [c54]Abhishek A. Sinkar, Hao Wang, Nam Sung Kim:
Maximizing throughput of power/thermal-constrained processors by balancing power consumption of cores. ISQED 2014: 633-638 - [i3]Yanpei Liu, Stark C. Draper, Nam Sung Kim:
SleepScale: Runtime Joint Speed Scaling and Sleep States Management for Power Efficient Data Centers. CoRR abs/1404.5121 (2014) - 2013
- [j12]Ulya R. Karpuzcu, Nam Sung Kim, Josep Torrellas:
Coping with Parametric Variation at Near-Threshold Voltages. IEEE Micro 33(4): 6-14 (2013) - [j11]Hao Wang, Nam Sung Kim:
Improving Throughput of Power-Constrained Many-Core Processors Based on Unreliable Devices. IEEE Micro 33(4): 16-24 (2013) - [j10]David J. Palframan, Nam Sung Kim, Mikko H. Lipasti:
Resilient High-Performance Processors with Spare RIBs. IEEE Micro 33(4): 26-34 (2013) - [j9]Abhishek A. Sinkar, Taejoon Park, Nam Sung Kim:
Clamping Virtual Supply Voltage of Power-Gated Circuits for Active Leakage Reduction and Gate-Oxide Reliability. IEEE Trans. Very Large Scale Integr. Syst. 21(3): 580-584 (2013) - [c53]Daniel W. Chang, Gyungsu Byun, Hoyoung Kim, Minwook Ahn, Soojung Ryu, Nam Sung Kim, Michael J. Schulte:
Reevaluating the latency claims of 3D stacked memories. ASP-DAC 2013: 657-662 - [c52]Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte:
Power-efficient computing for compute-intensive GPGPU applications. HPCA 2013: 330-341 - [c51]Ulya R. Karpuzcu, Abhishek A. Sinkar, Nam Sung Kim, Josep Torrellas:
EnergySmart: Toward energy-efficient manycores for Near-Threshold Computing. HPCA 2013: 542-553 - [c50]Hao Wang, Abhishek A. Sinkar, Nam Sung Kim:
Improving platform energy: chip area trade-off in near-threshold computing environment. ICCAD 2013: 318-325 - [c49]Daniel W. Chang, Young Hoon Son, Jung Ho Ahn, Hoyoung Kim, Minwook Ahn, Michael J. Schulte, Nam Sung Kim:
Dynamic bandwidth scaling for embedded DSPs with 3D-stacked DRAM and wide I/Os. ICCAD 2013: 747-754 - [c48]Jingwen Leng, Tayler H. Hetherington, Ahmed ElTantawy, Syed Zohaib Gilani, Nam Sung Kim, Tor M. Aamodt, Vijay Janapa Reddi:
GPUWattch: enabling energy optimizations in GPGPUs. ISCA 2013: 487-498 - [c47]Vignyan Reddy, Syed Zohaib Gilani, Erika Gunadi, Nam Sung Kim, Michael J. Schulte, Mikko H. Lipasti:
REEL: Reducing effective execution latency of floating point operations. ISLPED 2013: 187-192 - [c46]Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte:
Exploiting GPU peak-power and performance tradeoffs through reduced effective pipeline latency. MICRO 2013: 74-85 - [i2]Yanpei Liu, Stark C. Draper, Nam Sung Kim:
Queuing Theoretic Analysis of Power-performance Tradeoff in Power-efficient Computing. CoRR abs/1303.1561 (2013) - 2012
- [j8]Jungseob Lee, Nam Sung Kim:
Analyzing Potential Throughput Improvement of Power- and Thermal-Constrained Multicore Processors by Exploiting DVFS and PCPG. IEEE Trans. Very Large Scale Integr. Syst. 20(2): 225-235 (2012) - [j7]Nam Sung Kim, Abhishek A. Sinkar, Jun Seomun, Youngsoo Shin:
Maximizing Frequency and Yield of Power-Constrained Designs Using Programmable Power-Gating. IEEE Trans. Very Large Scale Integr. Syst. 20(10): 1885-1890 (2012) - [j6]Nam Sung Kim, Stark C. Draper, Shi-Ting Zhou, Sumeet Katariya, Hamid Reza Ghasemi, Taejoon Park:
Analyzing the Impact of Joint Optimization of Cell Size, Redundancy, and ECC on Low-Voltage SRAM Array Total Area. IEEE Trans. Very Large Scale Integr. Syst. 20(12): 2333-2337 (2012) - [c45]Vijay Sathish, Michael J. Schulte, Nam Sung Kim:
Lossless and lossy memory I/O link compression for improving performance of GPGPU workloads. PACT 2012: 325-334 - [c44]Hao Wang, Vijay Sathish, Ripudaman Singh, Michael J. Schulte, Nam Sung Kim:
Workload and power budget partitioning for single-chip heterogeneous processors. PACT 2012: 401-410 - [c43]Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte:
Power-efficient computing for compute-intensive GPGPU applications. PACT 2012: 445-446 - [c42]Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte:
Virtual Floating-Point Units for Low-Power Embedded Processors. ASAP 2012: 61-68 - [c41]Ardavan Pedram, Syed Zohaib Gilani, Nam Sung Kim, Robert A. van de Geijn, Michael J. Schulte, Andreas Gerstlauer:
A Linear Algebra Core Design for Efficient Level-3 BLAS. ASAP 2012: 149-152 - [c40]Hamid Reza Ghasemi, Abhishek A. Sinkar, Michael J. Schulte, Nam Sung Kim:
Cost-effective power delivery to support per-core voltage domains for power-constrained processors. DAC 2012: 56-61 - [c39]Abhishek A. Sinkar, Hao Wang, Nam Sung Kim:
Workload-aware voltage regulator optimization for power efficient multi-core processors. DATE 2012: 1134-1137 - [c38]Ulya R. Karpuzcu, Krishna B. Kolluru, Nam Sung Kim, Josep Torrellas:
VARIUS-NTV: A microarchitectural model to capture the increased sensitivity of manycores to process variations at near-threshold voltages. DSN 2012: 1-11 - [c37]David J. Palframan, Nam Sung Kim, Mikko H. Lipasti:
Mitigating random variation with spare RIBs: Redundant intermediate bitslices. DSN 2012: 1-11 - [c36]Jacob Adriaens, Katherine Compton, Nam Sung Kim, Michael J. Schulte:
The case for GPGPU spatial multitasking. HPCA 2012: 79-90 - 2011
- [c35]Jungseob Lee, Vijay Sathish, Michael J. Schulte, Katherine Compton, Nam Sung Kim:
Improving Throughput of Power-Constrained GPUs Using Dynamic Voltage/Frequency and Core Scaling. PACT 2011: 111-120 - [c34]Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte:
Energy-efficient floating-point arithmetic for digital signal processors. ACSCC 2011: 1823-1827 - [c33]Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte:
Energy-efficient floating-point arithmetic for software-defined radio architectures. ASAP 2011: 122-129 - [c32]Abhishek A. Sinkar, Nam Sung Kim:
AVS-aware power-gate sizing for maximum performance and power efficiency of power-constrained processors. ASP-DAC 2011: 725-730 - [c31]David J. Palframan, Nam Sung Kim, Mikko H. Lipasti:
Time redundant parity for low-cost transient error detection. DATE 2011: 52-57 - [c30]Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte:
Scratchpad memory optimizations for digital signal processing applications. DATE 2011: 974-979 - [c29]Hamid Reza Ghasemi, Stark C. Draper, Nam Sung Kim:
Low-voltage on-chip cache architecture using heterogeneous cell sizes for high-performance processors. HPCA 2011: 38-49 - [c28]Jungseob Lee, Paritosh Pratap Ajgaonkar, Nam Sung Kim:
Analyzing throughput of GPGPUs exploiting within-die core-to-core frequency variation. ISPASS 2011: 237-246 - [c27]Krishna Bharath, Chunhua Yao, Nam Sung Kim, Parameswaran Ramanathan, Kewal K. Saluja:
A low cost approach to calibrate on-chip thermal sensors. ISQED 2011: 572-576 - [c26]Daniel W. Chang, Nam Sung Kim, Michael J. Schulte:
Analyzing the performance and energy impact of 3D memory integration on embedded DSPs. ICSAMOS 2011: 303-310 - 2010
- [c25]Jungseob Lee, Shi-Ting Zhou, Nam Sung Kim:
Analyzing impact of multiple ABB and AVS domains on throughput of power and thermal-constrained multi-core processors. ASP-DAC 2010: 229-234 - [c24]Dongkeun Oh, Nam Sung Kim, Charlie Chung-Ping Chen, Azadeh Davoodi, Yu Hen Hu:
Runtime temperature-based power estimation for optimizing throughput of thermal-constrained multi-core processors. ASP-DAC 2010: 593-599 - [c23]Danbee Park, Jungseob Lee, Nam Sung Kim, Taewhan Kim:
Optimal algorithm for profile-based power gating: A compiler technique for reducing leakage on execution units in microprocessors. ICCAD 2010: 361-364 - [c22]Shi-Ting Zhou, Sumeet Katariya, Hamid Reza Ghasemi, Stark C. Draper, Nam Sung Kim:
Minimizing total area of low-voltage SRAM arrays through joint optimization of cell size, redundancy, and ECC. ICCD 2010: 112-117 - [c21]Jungseob Lee, Chi-Chao Wang, Hamid Reza Ghasemi, Lloyd Bircher, Yu Cao, Nam Sung Kim:
Workload-adaptive process tuning strategy for power-efficient multi-core processors. ISLPED 2010: 225-230 - [c20]Abhishek A. Sinkar, Nam Sung Kim:
Analyzing and minimizing effects of temperature variation and NBTI on active leakage power of power-gated circuits. ISQED 2010: 791-796 - [c19]Dongkeun Oh, Charlie Chung-Ping Chen, Nam Sung Kim, Yu Hen Hu:
The compatibility analysis of thread migration and DVFS in multi-core processor. ISQED 2010: 866-871 - [c18]Erika Gunadi, Abhishek A. Sinkar, Nam Sung Kim, Mikko H. Lipasti:
Combating Aging with the Colt Duty Cycle Equalizer. MICRO 2010: 103-114
2000 – 2009
- 2009
- [c17]Jungseob Lee, Nam Sung Kim:
Optimizing throughput of power- and thermal-constrained multicore processors using DVFS and per-core power-gating. DAC 2009: 47-50 - [c16]Michael J. Anderson, Azadeh Davoodi, Jungseob Lee, Abhishek A. Sinkar, Nam Sung Kim:
Statistical static timing analysis considering leakage variability in power gated designs. ISLPED 2009: 57-62 - [c15]Nam Sung Kim, Jun Seomun, Abhishek A. Sinkar, Jungseob Lee, Tae Hee Han, Ken Choi, Youngsoo Shin:
Frequency and yield optimization using power gates in power-constrained designs. ISLPED 2009: 121-126 - [c14]Abhishek A. Sinkar, Nam Sung Kim:
Analyzing potential power reduction with adaptive voltage positioning optimized for multicore processors. ISLPED 2009: 189-194 - [c13]Jungseob Lee, Nam Sung Kim:
Optimizing total power of many-core processors considering voltage scaling limit and process variations. ISLPED 2009: 201-206 - 2008
- [j5]David Roberts, Nam Sung Kim, Trevor N. Mudge:
On-chip cache device scaling limits and effective fault repair techniques in future nanoscale technology. Microprocess. Microsystems 32(5-6): 244-253 (2008) - 2007
- [c12]David Roberts, Nam Sung Kim, Trevor N. Mudge:
On-Chip Cache Device Scaling Limits and Effective Fault Repair Techniques in Future Nanoscale Technology. DSD 2007: 570-578 - [c11]Gregory K. Chen, David T. Blaauw, Trevor N. Mudge, Dennis Sylvester, Nam Sung Kim:
Yield-driven near-threshold SRAM design. ICCAD 2007: 660-666 - [i1]Robert Bai, Nam Sung Kim, Taeho Kgil, Dennis Sylvester, Trevor N. Mudge:
Power-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches Considering Total Leakage. CoRR abs/0710.4794 (2007) - 2005
- [j4]Nam Sung Kim, David T. Blaauw, Trevor N. Mudge:
Quantitative analysis and optimization techniques for on-chip cache leakage power. IEEE Trans. Very Large Scale Integr. Syst. 13(10): 1147-1156 (2005) - [c10]Robert Bai, Nam Sung Kim, Taeho Kgil, Dennis Sylvester, Trevor N. Mudge:
Power-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches Considering Total Leakage. DATE 2005: 650-651 - [c9]Robert Bai, Nam Sung Kim, Dennis Sylvester, Trevor N. Mudge:
Total leakage optimization strategies for multi-level caches. ACM Great Lakes Symposium on VLSI 2005: 381-384 - 2004
- [j3]Dan Ernst, Shidhartha Das, Seokwoo Lee, David T. Blaauw, Todd M. Austin, Trevor N. Mudge, Nam Sung Kim, Krisztián Flautner:
Razor: Circuit-Level Correction of Timing Errors for Low-Power Operation. IEEE Micro 24(6): 10-20 (2004) - [j2]Nam Sung Kim, Krisztián Flautner, David T. Blaauw, Trevor N. Mudge:
Circuit and microarchitectural techniques for reducing cache leakage power. IEEE Trans. Very Large Scale Integr. Syst. 12(2): 167-184 (2004) - [c8]Nam Sung Kim, Taeho Kgil, Valeria Bertacco, Todd M. Austin, Trevor N. Mudge:
Microarchitectural power modeling techniques for deep sub-micron microprocessors. ISLPED 2004: 212-217 - 2003
- [j1]Nam Sung Kim, Todd M. Austin, David T. Blaauw, Trevor N. Mudge, Krisztián Flautner, Jie S. Hu, Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan:
Leakage Current: Moore's Law Meets Static Power. Computer 36(12): 68-75 (2003) - [c7]Nam Sung Kim, Trevor N. Mudge, Richard B. Brown:
A 2.3Gb/s fully integrated and synthesizable AES Rijndael core. CICC 2003: 193-196 - [c6]Nam Sung Kim, David T. Blaauw, Trevor N. Mudge:
Leakage Power Optimization Techniques for Ultra Deep Sub-Micron Multi-Level Caches. ICCAD 2003: 627-632 - [c5]Nam Sung Kim, Trevor N. Mudge:
Reducing register ports using delayed write-back queues and operand pre-fetch. ICS 2003: 172-182 - [c4]Nam Sung Kim, Trevor N. Mudge:
The microarchitecture of a low power register file. ISLPED 2003: 384-389 - [c3]Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Rajeev R. Rao, Toan Pham, Conrad H. Ziesler, David T. Blaauw, Todd M. Austin, Krisztián Flautner, Trevor N. Mudge:
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation. MICRO 2003: 7-18 - 2002
- [c2]Krisztián Flautner, Nam Sung Kim, Steven M. Martin, David T. Blaauw, Trevor N. Mudge:
Drowsy Caches: Simple Techniques for Reducing Leakage Power. ISCA 2002: 148-157 - [c1]Nam Sung Kim, Krisztián Flautner, David T. Blaauw, Trevor N. Mudge:
Drowsy instruction caches: leakage power reduction using dynamic voltage scaling and cache sub-bank prediction. MICRO 2002: 219-230
Coauthor Index
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