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ORCIDIuliana Radu
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2020 – today
- 2020
[c12]Alexander Grill, Erik Bury, Jakob Michl
, Stanislav Tyaginov, Dimitri Linten, Tibor Grasser, Bertrand Parvais, Ben Kaczer, Michael Waltl, Iuliana Radu:
Reliability and Variability of Advanced CMOS Devices at Cryogenic Temperatures. IRPS 2020: 1-6- [c11]Jakob Michl, Alexander Grill, Dieter Claes, Gerhard Rzepa, Ben Kaczer, Dimitri Linten, Iuliana Radu, Tibor Grasser, Michael Waltl:
Quantum Mechanical Charge Trap Modeling to Explain BTI at Cryogenic Temperatures. IRPS 2020: 1-6
2010 – 2019
- 2019
- [c10]Yashwanth Balaji, Quentin Smets, Dennis Lin, I. Asselberghs, Iuliana Radu, Guido Groeseneken:
Tunnel FETs using Phosphorene/ReS2 heterostructures. DRC 2019: 113-114 - [i2]Giacomo Talmelli, Thibaut Devolder, Nick Träger, Johannes Förster, Sebastian Wintz, Markus Weigand, Hermann Stoll, Marc M. Heyns, Gisela Schütz, Iuliana Radu, Joachim Gräfe, Florin Ciubotaru, Christoph Adelmann:
Reconfigurable nanoscale spin wave majority gate with frequency-division multiplexing. CoRR abs/1908.02546 (2019) - 2018
- [c9]Giovanni V. Resta, Jorge Romero Gonzalez, Yashwanth Balaji, Tarun Agarwal, Dennis Lin, Francky Catthoor, Iuliana P. Radu, Giovanni De Micheli, Pierre-Emmanuel Gaillardon:
Towards high-performance polarity-controllable FETs with 2D materials. DATE 2018: 637-641 - [c8]Iuliana P. Radu:
Spin-based majority gates for logic applications. DRC 2018: 1-2 - [c7]Giovanni V. Resta, Yashwanth Balaji, Dennis Lin, Iuliana P. Radu, Francky Catthoor, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Doping-free complementary inverter enabled by 2D WSe2 electrostatically-doped reconfigurable transistors. DRC 2018: 1-2 - 2017
- [c6]Tarun Agarwal, Bart Soree, Iuliana Radu, Praveen Raghavan, Gianluca Fiori, Marc M. Heyns, Wim Dehaene:
Material selection and device design guidelines for two-dimensional materials based TFETs. ESSDERC 2017: 54-57 - [c5]Yashwanth Balaji, Quentin Smets, Cesar J. Lockhart de la Rosa, Anh Khoa Augustin Lu, Daniele Chiappe, Tarun Agarwal, Dennis Lin, Cedric Huyghebaert, Iuliana Radu, Dan Mocuta, Guido Groeseneken:
Tunneling transistors based on MoS2/MoTe2 Van der Waals heterostructures. ESSDERC 2017: 106-109 - [c4]Tom Schram, Quentin Smets, Benjamin Groven, M. H. Heyne, E. Kunnen, A. Thiam, K. Devriendt, Annelies Delabie, Dennis Lin, M. Lux, Daniele Chiappe, I. Asselberghs, S. Brus, Cedric Huyghebaert, S. Sayan, A. Juncker, Matty Caymax, Iuliana P. Radu:
WS2 transistors on 300 mm wafers with BEOL compatibility. ESSDERC 2017: 212-215 - 2016
- [c3]Tarun Agarwal, Iuliana Radu, Praveen Raghavan, Gianluca Fiori, Aaron Thean, Marc M. Heyns, Wim Dehaene:
Effect of material parameters on two-dimensional materials based TFETs: An energy-delay perspective. ESSCIRC 2016: 55-58 - [i1]Odysseas Zografos, Sourav Dutta, Mauricio Manfrini, Adrien Vaysset, Bart Sorée, Azad Naeemi, Praveen Raghavan, Rudy Lauwereins, Iuliana P. Radu:
Non-volatile spin wave majority gate at the nanoscale. CoRR abs/1612.02170 (2016) - 2015
- [c2]Odysseas Zografos, Praveen Raghavan, Yasser Sherazi, Adrien Vaysset, Florin Ciubatoru, Bart Soree, Rudy Lauwereins, Iuliana Radu, Aaron Thean:
Area and routing efficiency of SWD circuits compared to advanced CMOS. ICICDT 2015: 1-4 - 2014
- [c1]Odysseas Zografos, Praveen Raghavan, Luca Gaetano Amarù, Bart Soree, Rudy Lauwereins, Iuliana Radu, Diederik Verkest, Aaron Thean:
System-level assessment and area evaluation of Spin Wave logic circuits. NANOARCH 2014: 25-30
Coauthor Index
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