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陳良基
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- unicode name: 陳良基
- affiliation: National Taiwan University, Taipei, Taiwan
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Journal Articles
- 2024
[j113]Everett Fall, Kai-Wei Chang, Liang-Gee Chen:
Tree-managed network ensembles for video prediction. Mach. Vis. Appl. 35(4): 90 (2024)- [j112]Wan-Yu Chen
, Liang-Gee Chen:
3.53-TOPS/W EEAIP: An Energy-Efficient Artificial Intelligence Hardware Architecture for Edge AI Applications. IEEE Trans. Consumer Electron. 70(1): 4333-4344 (2024) - 2021
- [j111]Sih-Sian Wu, Liang-Gee Chen:
CMWMF: Constant Memory Architecture of Weighted Mode/Median Filter for Extremely Large Label Depth Refinement. IEEE Trans. Circuits Syst. Video Technol. 31(8): 2981-2993 (2021) - [j110]Sih-Sian Wu, Hon-Hui Chen, Liang-Gee Chen:
Hardware- and Memory-Efficient Architecture for Disparity Estimation of Large Label Counts. IEEE Trans. Circuits Syst. Video Technol. 31(9): 3679-3693 (2021) - 2020
- [j109]Jan P. Klopp, Liang-Gee Chen, Shao-Yi Chien:
Utilising Low Complexity CNNs to Lift Non-Local Redundancies in Video Coding. IEEE Trans. Image Process. 29: 6372-6385 (2020) - 2017
- [j108]Chao-Tsung Huang, Yu-Wen Wang, Li-Ren Huang, Jui Chin, Liang-Gee Chen:
Fast Physically Correct Refocusing for Sparse Light Fields Using Block-Based Multi-Rate View Interpolation. IEEE Trans. Image Process. 26(2): 603-618 (2017) - 2015
- [j107]Yu-Jung Chen, Chao-Hsien Hsu, Chung-Yao Hung, Chia-Ming Chang, Shan-Yi Chuang, Liang-Gee Chen, Shao-Yi Chien:
A 130.3 mW 16-Core Mobile GPU With Power-Aware Pixel Approximation Techniques. IEEE J. Solid State Circuits 50(9): 2212-2223 (2015) - 2013
- [j106]Chung-Te Li, Yen-Chieh Lai, Chien Wu, Sung-Fang Tsai, Tung-Chien Chen, Shao-Yi Chien, Liang-Gee Chen:
Brain-Inspired Framework for Fusion of Multiple Depth Cues. IEEE Trans. Circuits Syst. Video Technol. 23(7): 1137-1149 (2013) - [j105]Yiannis Andreopoulos, Liang-Gee Chen, Brian L. Evans, Hong Jiang, Rakesh Kumar:
Guest Editorial: Special Section on New Software/Hardware Paradigms for Error-Tolerant Multimedia Systems. IEEE Trans. Multim. 15(2): 241 (2013) - 2012
- [j104]Yu-Chi Su, Keng-Yen Huang, Tse-Wei Chen, Yi-Min Tsai, Shao-Yi Chien, Liang-Gee Chen:
A 52 mW Full HD 160-Degree Object Viewpoint Recognition SoC With Visual Vocabulary Processor for Wearable Vision Applications. IEEE J. Solid State Circuits 47(4): 797-809 (2012) - [j103]Chen-Han Tsai, Chi-Sun Tang, Liang-Gee Chen:
A flexible fully hardwired CABAC encoder for UHDTV H.264/AVC high profile video. IEEE Trans. Consumer Electron. 58(4): 1329-1337 (2012) - [j102]Tse-Wei Chen, Yu-Chi Su, Keng-Yen Huang, Yi-Min Tsai, Shao-Yi Chien, Liang-Gee Chen:
Visual Vocabulary Processor Based on Binary Tree Architecture for Real-Time Object Recognition in Full-HD Resolution. IEEE Trans. Very Large Scale Integr. Syst. 20(12): 2329-2332 (2012) - 2011
- [j101]Mohammad M. Mansour, Liang-Gee Chen, Wonyong Sung:
Trends in Design and Implementation of Signal Processing Systems [In the Spotlight]. IEEE Signal Process. Mag. 28(6): 192-193 (2011) - [j100]Sung-Fang Tsai, Chao-Chung Cheng, Chung-Te Li, Liang-Gee Chen:
A real-time 1080p 2D-to-3D video conversion system. IEEE Trans. Consumer Electron. 57(2): 915-922 (2011) - [j99]Chia-Kai Liang, Chao-Chung Cheng, Yen-Chieh Lai, Liang-Gee Chen, Homer H. Chen:
Hardware-Efficient Belief Propagation. IEEE Trans. Circuits Syst. Video Technol. 21(5): 525-537 (2011) - [j98]Shao-Yi Chien, Liang-Gee Chen:
Reconfigurable Morphological Image Processing Accelerator for Video Object Segmentation. J. Signal Process. Syst. 62(1): 77-96 (2011) - [j97]Hong-Hui Chen, Cheng-Yi Chiang, Tung-Chien Chen, Chien-Sheng Liu, Yu-Jie Huang, Shey-Shi Lu, Chii-Wann Lin, Liang-Gee Chen:
Analysis and Design of On-sensor ECG Processors for Realtime Detection of Cardiac Anomalies Including VF, VT, and PVC. J. Signal Process. Syst. 65(2): 275-285 (2011) - 2010
- [j96]Pei-Kuei Tsung, Li-Fu Ding, Wei-Yin Chen, Tzu-Der Chuang, Yu-Han Chen, Pai-Heng Hsiao, Shao-Yi Chien, Liang-Gee Chen:
Video encoder design for high-definition 3D video communication systems. IEEE Commun. Mag. 48(4): 76-86 (2010) - [j95]Jing-Ying Chang, Huei-Hung Liao, Liang-Gee Chen:
Localized Detection of Abandoned Luggage. EURASIP J. Adv. Signal Process. 2010 (2010) - [j94]Li-Fu Ding, Wei-Yin Chen, Pei-Kuei Tsung, Tzu-Der Chuang, Pai-Heng Hsiao, Yu-Han Chen, Hsu-Kuang Chiu, Shao-Yi Chien, Liang-Gee Chen:
A 212 MPixels/s 4096 ˟ 2160p Multiview Video Encoder Chip for 3D/Quad Full HDTV Applications. IEEE J. Solid State Circuits 45(1): 46-58 (2010) - [j93]Tse-Wei Chen, Chi-Sun Tang, Sung-Fang Tsai, Chen-Han Tsai, Shao-Yi Chien, Liang-Gee Chen:
Tera-Scale Performance Machine Learning SoC (MLSoC) With Dual Stream Processor Architecture for Multimedia Content Analysis. IEEE J. Solid State Circuits 45(11): 2321-2329 (2010) - [j92]Chao-Chung Cheng, Chung-Te Li, Liang-Gee Chen:
A novel 2Dd-to-3D conversion system using edge information. IEEE Trans. Consumer Electron. 56(3): 1739-1745 (2010) - [j91]Wei-Min Chao, Liang-Gee Chen:
Pyramid Architecture for 3840 X 2160 Quad Full High Definition 30 Frames/s Video Acquisition. IEEE Trans. Circuits Syst. Video Technol. 20(11): 1499-1508 (2010) - [j90]Tzu-Der Chuang, Yu-Jen Chen, Yi-Hau Chen, Shao-Yi Chien, Liang-Gee Chen:
Architecture Design of Fine Grain Quality Scalable Encoder with CABAC for H.264/AVC Scalable Extension. J. Signal Process. Syst. 60(3): 363-375 (2010) - 2009
- [j89]Chih-Chi Cheng, Chia-Hua Lin, Chung-Te Li, Liang-Gee Chen:
iVisual: An Intelligent Visual Sensor SoC With 2790 fps CMOS Image Sensor and 205 GOPS/W Vision Processor. IEEE J. Solid State Circuits 44(1): 127-135 (2009) - [j88]Chih-Chi Cheng, Po-Chih Tseng, Liang-Gee Chen:
Multimode Embedded Compression Codec Engine for Power-Aware Video Coding System. IEEE Trans. Circuits Syst. Video Technol. 19(2): 141-150 (2009) - [j87]Yu-Han Chen, Tung-Chien Chen, Chuan-Yung Tsai, Sung-Fang Tsai, Liang-Gee Chen:
Algorithm and Architecture Design of Power-Oriented H.264/AVC Baseline Profile Encoder for Portable Devices. IEEE Trans. Circuits Syst. Video Technol. 19(8): 1118-1128 (2009) - 2008
- [j86]Chia-Ho Pan, Ching-Yen Chien, Wei-Min Chao, Sheng-Chieh Huang, Liang-Gee Chen:
Architecture design of full HD JPEG XR encoder for digital photography applications. IEEE Trans. Consumer Electron. 54(3): 963-971 (2008) - [j85]Yi-Hau Chen, Chih-Chi Cheng, Tzu-Der Chuang, Ching-Yeh Chen, Shao-Yi Chien, Liang-Gee Chen:
Efficient Architecture Design of Motion-Compensated Temporal Filtering/Motion Compensated Prediction Engine. IEEE Trans. Circuits Syst. Video Technol. 18(1): 98-109 (2008) - [j84]Li-Fu Ding, Pei-Kuei Tsung, Shao-Yi Chien, Wei-Yin Chen, Liang-Gee Chen:
Content-Aware Prediction Algorithm With Inter-View Mode Decision for Multiview Video Coding. IEEE Trans. Multim. 10(8): 1553-1564 (2008) - [j83]Yu-Han Chen, Tung-Chien Chen, Chuan-Yung Tsai, Sung-Fang Tsai, Liang-Gee Chen:
Data Reuse Exploration for Low Power Motion Estimation Architecture Design in H.264 Encoder. J. Signal Process. Syst. 50(1): 1-17 (2008) - [j82]Yi-Hau Chen, Shao-Yi Chien, Ching-Yeh Chen, Yu-Wen Huang, Liang-Gee Chen:
Analysis and Hardware Architecture Design of Global Motion Estimation. J. Signal Process. Syst. 53(3): 285-300 (2008) - [j81]Yi-Hau Chen, Tung-Chien Chen, Shao-Yi Chien, Yu-Wen Huang, Liang-Gee Chen:
VLSI Architecture Design of Fractional Motion Estimation for H.264/AVC. J. Signal Process. Syst. 53(3): 335-347 (2008) - 2007
- [j80]Chia-Ho Pan, I-Hsien Lee, Sheng-Chieh Huang, Chung-Jr Lian, Liang-Gee Chen:
A Quality-of-Experience Video Adaptor for Serving Scalable Video Applications. IEEE Trans. Consumer Electron. 53(3): 1130-1137 (2007) - [j79]Tung-Chien Chen, Chuan-Yung Tsai, Yu-Wen Huang, Liang-Gee Chen:
Single Reference Frame Multiple Current Macroblocks Scheme for Multiple Reference Frame Motion Estimation in H.264/AVC. IEEE Trans. Circuits Syst. Video Technol. 17(2): 242-247 (2007) - [j78]Yu-Wei Chang, Chih-Chi Cheng, Chun-Chia Chen, Hung-Chi Fang, Liang-Gee Chen:
124 MSamples/s Pixel-Pipelined Motion-JPEG 2000 Codec Without Tile Memory. IEEE Trans. Circuits Syst. Video Technol. 17(4): 398-406 (2007) - [j77]Tung-Chien Chen, Yu-Han Chen, Sung-Fang Tsai, Shao-Yi Chien, Liang-Gee Chen:
Fast Algorithm and Architecture Design of Low-Power Integer Motion Estimation for H.264/AVC. IEEE Trans. Circuits Syst. Video Technol. 17(5): 568-577 (2007) - [j76]Chih-Chi Cheng, Chao-Tsung Huang, Ching-Yeh Chen, Chung-Jr Lian, Liang-Gee Chen:
On-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based Two-Dimentional Discrete Wavelet Transform. IEEE Trans. Circuits Syst. Video Technol. 17(7): 814-822 (2007) - [j75]Yu-Wei Chang, Hung-Chi Fang, Chun-Chia Chen, Chung-Jr Lian, Liang-Gee Chen:
Word-Level Parallel Architecture of JPEG 2000 Embedded Block Coding Decoder. IEEE Trans. Multim. 9(6): 1103-1112 (2007) - 2006
- [j74]Ching-Yeh Chen, Shao-Yi Chien, Yu-Wen Huang, Tung-Chien Chen, Tu-Chih Wang, Liang-Gee Chen:
Analysis and architecture design of variable block-size motion estimation for H.264/AVC. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(3): 578-593 (2006) - [j73]Tung-Chien Chen, Yu-Wen Huang, Chuan-Yung Tsai, Bing-Yu Hsieh, Liang-Gee Chen:
Architecture Design of Context-Based Adaptive Variable-Length Coding for H.264/AVC. IEEE Trans. Circuits Syst. II Express Briefs 53-II(9): 832-836 (2006) - [j72]Yu-Wen Huang, Bing-Yu Hsieh, Shao-Yi Chien, Shyh-Yih Ma, Liang-Gee Chen:
Analysis and complexity reduction of multiple reference frames motion estimation in H.264/AVC. IEEE Trans. Circuits Syst. Video Technol. 16(4): 507-522 (2006) - [j71]Ching-Yeh Chen, Chao-Tsung Huang, Yi-Hau Chen, Liang-Gee Chen:
Level C+ data reuse scheme for motion estimation with corresponding coding orders. IEEE Trans. Circuits Syst. Video Technol. 16(4): 553-558 (2006) - [j70]Tung-Chien Chen, Shao-Yi Chien, Yu-Wen Huang, Chen-Han Tsai, Ching-Yeh Chen, To-Wei Chen, Liang-Gee Chen:
Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoder. IEEE Trans. Circuits Syst. Video Technol. 16(6): 673-688 (2006) - [j69]Li-Fu Ding, Shao-Yi Chien, Liang-Gee Chen:
Joint Prediction Algorithm and Architecture for Stereo Video Hybrid Coding Systems. IEEE Trans. Circuits Syst. Video Technol. 16(11): 1324-1337 (2006) - [j68]Yu-Wei Chang, Hung-Chi Fang, Chih-Chi Cheng, Chun-Chia Chen, Liang-Gee Chen:
Precompression Quality-Control Algorithm for JPEG 2000. IEEE Trans. Image Process. 15(11): 3279-3293 (2006) - [j67]Hung-Chi Fang, Yu-Wei Chang, Tu-Chih Wang, Chao-Tsung Huang, Liang-Gee Chen:
High-Performance JPEG 2000 Encoder With Rate-Distortion Optimization. IEEE Trans. Multim. 8(4): 645-653 (2006) - [j66]Ching-Yeh Chen, Yu-Wen Huang, Chia-Lin Lee, Liang-Gee Chen:
One-Pass Computation-Aware Motion Estimation With Adaptive Search Strategy. IEEE Trans. Multim. 8(4): 698-706 (2006) - [j65]Ching-Yeh Chen, Chao-Tsung Huang, Yi-Hau Chen, Shao-Yi Chien, Liang-Gee Chen:
System Analysis of VLSI Architecture for 5/3 and 1/3 Motion-Compensated Temporal Filtering. IEEE Trans. Signal Process. 54(10): 4004-4014 (2006) - [j64]Hung-Chi Fang, Yu-Wei Chang, Chih-Chi Cheng, Liang-Gee Chen:
Memory Efficient JPEG 2000 Architecture With Stripe Pipeline Scheduling. IEEE Trans. Signal Process. 54(12): 4807-4816 (2006) - [j63]Yung-Chi Chang, Wei-Min Chao, Chih-Wei Hsu, Liang-Gee Chen:
Platform-Based MPEG-4 SOC Design for Video Communications. J. VLSI Signal Process. 42(1): 7-19 (2006) - [j62]Shao-Yi Chien, Bing-Yu Hsieh, Yu-Wen Huang, Shyh-Yih Ma, Liang-Gee Chen:
Hybrid Morphology Processing Unit Architecture for Moving Object Segmentation Systems. J. VLSI Signal Process. 42(3): 241-255 (2006) - [j61]Yu-Wen Huang, Ching-Yeh Chen, Chen-Han Tsai, Chun-Fu Shen, Liang-Gee Chen:
Survey on Block Matching Motion Estimation Algorithms and Architectures with New Results. J. VLSI Signal Process. 42(3): 297-320 (2006) - [j60]Yung-Chi Chang, Chih-Wei Hsu, Wei-Min Chao, Liang-Gee Chen:
Interactive Content-aware Video Streaming System with Fine Granularity Scalability. J. VLSI Signal Process. 44(1-2): 117-134 (2006) - 2005
- [j59]Tao-Yuan Chien, Yu-Wen Huang, Ching-Yeh Chen, Homer H. Chen, Liang-Gee Chen:
Hardware architecture design of video compression for multimedia communication systems. IEEE Commun. Mag. 43(8): 122-131 (2005) - [j58]Pei-Jun Lee, Homer H. Chen, Wen-June Wang, Liang-Gee Chen:
Feature-Based Error Concealment for Object-Based Video. IEICE Trans. Commun. 88-B(6): 2616-2626 (2005) - [j57]Wenwu Zhu, Ming-Ting Sun, Liang-Gee Chen, Thomas Sikora:
Special Issue on Advances in Video Coding and Delivery. Proc. IEEE 93(1): 3-5 (2005) - [j56]Po-Chih Tseng, Yung-Chi Chang, Yu-Wen Huang, Hung-Chi Fang, Chao-Tsung Huang, Liang-Gee Chen:
Advances in Hardware Architectures for Image and Video Coding - A Survey. Proc. IEEE 93(1): 184-197 (2005) - [j55]Shih-Way Huang, Tsung-Han Tsai, Liang-Gee Chen:
Fast decomposition of filterbanks for the state-of-the-art audio coding. IEEE Signal Process. Lett. 12(10): 693-696 (2005) - [j54]Yu-Wen Huang, Bing-Yu Hsieh, Tung-Chien Chen, Liang-Gee Chen:
Analysis, fast algorithm, and VLSI architecture design for H.264/AVC intra frame coder. IEEE Trans. Circuits Syst. Video Technol. 15(3): 378-401 (2005) - [j53]Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen:
Generic RAM-based architectures for two-dimensional discrete wavelet transform with line-based method. IEEE Trans. Circuits Syst. Video Technol. 15(7): 910-920 (2005) - [j52]Hung-Chi Fang, Yu-Wei Chang, Tu-Chih Wang, Chung-Jr Lian, Liang-Gee Chen:
Parallel embedded block coding architecture for JPEG 2000. IEEE Trans. Circuits Syst. Video Technol. 15(9): 1086-1097 (2005) - [j51]Shao-Yi Chien, Shyh-Yih Ma, Liang-Gee Chen:
Partial-result-reuse architecture and its design technique for morphological operations with flat structuring elements. IEEE Trans. Circuits Syst. Video Technol. 15(9): 1156-1169 (2005) - [j50]Yu-Lin Chang, Shyh-Feng Lin, Ching-Yeh Chen, Liang-Gee Chen:
Video de-interlacing by adaptive 4-field global/local motion compensated approach. IEEE Trans. Circuits Syst. Video Technol. 15(12): 1569-1582 (2005) - [j49]Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen:
Analysis and VLSI architecture for 1-D and 2-D discrete wavelet transform. IEEE Trans. Signal Process. 53(4): 1575-1586 (2005) - [j48]Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen:
VLSI Architecture for Lifting-Based Shape-Adaptive Discrete Wavelet Transform with Odd-Symmetric Filters. J. VLSI Signal Process. 40(2): 175-188 (2005) - [j47]Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen:
VLSI Architecture for Forward Discrete Wavelet Transform Based on B-spline Factorization. J. VLSI Signal Process. 40(3): 343-353 (2005) - [j46]Po-Chih Tseng, Chao-Tsung Huang, Liang-Gee Chen:
Reconfigurable Discrete Wavelet Transform Processor for Heterogeneous Reconfigurable Multimedia Systems. J. VLSI Signal Process. 41(1): 35-47 (2005) - [j45]Yung-Chi Chang, Chao-Chih Huang, Wei-Min Chao, Liang-Gee Chen:
An Efficient Embedded Bitstream Parsing Processor for MPEG-4 Video Decoding System. J. VLSI Signal Process. 41(2): 183-191 (2005) - 2004
- [j44]Shyh-Feng Lin, Sheng-Chieh Huang, Feng-Sung Yang, Chung-Wei Ku, Liang-Gee Chen:
Power-efficient FIR filter architecture design for wireless embedded system. IEEE Trans. Circuits Syst. II Express Briefs 51-II(1): 21-25 (2004) - [j43]Shih-Way Huang, Tsung-Han Tsai, Liang-Gee Chen:
A low complexity design of psycho-acoustic model for MPEG-2/4 advanced audio coding. IEEE Trans. Consumer Electron. 50(4): 1209-1217 (2004) - [j42]Yu-Wen Huang, Shao-Yi Chien, Bing-Yu Hsieh, Liang-Gee Chen:
Global elimination algorithm and architecture design for fast block matching motion estimation. IEEE Trans. Circuits Syst. Video Technol. 14(6): 898-907 (2004) - [j41]Shao-Yi Chien, Yu-Wen Huang, Bing-Yu Hsieh, Shyh-Yih Ma, Liang-Gee Chen:
Fast video segmentation algorithm with shadow cancellation, global motion compensation, and adaptive threshold techniques. IEEE Trans. Multim. 6(5): 732-748 (2004) - [j40]Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen:
Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform. IEEE Trans. Signal Process. 52(4): 1080-1089 (2004) - 2003
- [j39]Chung-Jr Lian, Zhong-Lan Yang, Hao-Chieh Chang, Liang-Gee Chen:
Hardware-Efficient Architecture Design for Zerotree Coding in MPEG-4 Still Texture Coder. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(2): 472-479 (2003) - [j38]Shyh-Feng Lin, Yu-Ling Chang, Liang-Gee Chen:
Motion adaptive interpolation with horizontal motion detection for deinterlacing. IEEE Trans. Consumer Electron. 49(4): 1256-1265 (2003) - [j37]Pei-Jun Lee, Liang-Gee Chen:
Error concealment algorithm using interested direction for JPEG 2000 image transmission. IEEE Trans. Consumer Electron. 49(4): 1395-1401 (2003) - [j36]Yu-Wen Huang, Shyh-Yih Ma, Chun-Fu Shen, Liang-Gee Chen:
Predictive line search: an efficient motion estimation algorithm for MPEG-4 encoding systems on multimedia processors. IEEE Trans. Circuits Syst. Video Technol. 13(1): 111-117 (2003) - [j35]Chung-Jr Lian, Kuanfu Chen, Hong-Hui Chen, Liang-Gee Chen:
Analysis and architecture design of block-coding engine for EBCOT in JPEG 2000. IEEE Trans. Circuits Syst. Video Technol. 13(3): 219-230 (2003) - [j34]Shao-Yi Chien, Yu-Wen Huang, Liang-Gee Chen:
Predictive watershed: a fast watershed algorithm for video segmentation. IEEE Trans. Circuits Syst. Video Technol. 13(5): 453-461 (2003) - 2002
- [j33]Shao-Yi Chien, Shyh-Yih Ma, Liang-Gee Chen:
Efficient moving object segmentation algorithm using background registration technique. IEEE Trans. Circuits Syst. Video Technol. 12(7): 577-586 (2002) - [j32]Hao-Chieh Chang, Yung-Chi Chang, Yi-Chu Wang, Wei-Ming Chao, Liang-Gee Chen:
VLSI architecture design of MPEG-4 shape coding. IEEE Trans. Circuits Syst. Video Technol. 12(9): 741-751 (2002) - [j31]Tu-Chih Wang, Hung-Chi Fang, Liang-Gee Chen:
Low-delay and error-robust wireless video transmission for video communications. IEEE Trans. Circuits Syst. Video Technol. 12(12): 1049-1058 (2002) - 2001
- [j30]Po-Chih Tseng, Chi-Kuang Chen, Liang-Gee Chen:
CDSP: an application-specific digital signal processor for third generation wireless communications. IEEE Trans. Consumer Electron. 47(3): 672-677 (2001) - [j29]Po-Cheng Wu, Liang-Gee Chen:
An efficient architecture for two-dimensional discrete wavelet transform. IEEE Trans. Circuits Syst. Video Technol. 11(4): 536-545 (2001) - [j28]Jun-Fu Shen, Tu-Chih Wang, Liang-Gee Chen:
A novel low-power full-search block-matching motion-estimation design for H.263+. IEEE Trans. Circuits Syst. Video Technol. 11(7): 890-897 (2001) - [j27]Chien-Yu Chen, Zhong-Lan Yang, Tu-Chih Wang, Liang-Gee Chen:
A Programmable Parallel VLSI Architecture for 2-D Discrete Wavelet Transform. J. VLSI Signal Process. 28(3): 151-163 (2001) - [j26]Liang-Gee Chen, Hsueh-Ming Hang, Ichiro Kuroda:
Guest Editors' Introduction. J. VLSI Signal Process. 29(3): 155-156 (2001) - [j25]Tsung-Han Tsai, Ren-Jr Wu, Liang-Gee Chen:
A Cost-Effective Design for MPEG-2 Audio Decoder with Embedded RISC Core. J. VLSI Signal Process. 29(3): 255-265 (2001) - 2000
- [j24]Ruei-Xi Chen, Liang-Gee Chen, Li-Lin Chen:
System design consideration for digital wheelchair controller. IEEE Trans. Ind. Electron. 47(4): 898-907 (2000) - [j23]Hao-Chieh Chang, Jiun-Ying Jiu, Li-Lin Chen, Liang-Gee Chen:
A Low Power 8 x 8 Direct 2-D DCT Chip Design. J. VLSI Signal Process. 26(3): 319-332 (2000) - 1999
- [j22]Shyh-Yih Ma, Liang-Gee Chen:
A single-chip CMOS APS camera with direct frame difference output. IEEE J. Solid State Circuits 34(10): 1415-1418 (1999) - [j21]Sheng-Chieh Huang, Liang-Gee Chen:
A LOG-EXP still image compression chip design. IEEE Trans. Consumer Electron. 45(3): 812-819 (1999) - 1998
- [j20]Yeong-Kang Lai, Liang-Gee Chen:
A data-interlacing architecture with two-dimensional data-reuse for full-search block-matching algorithm. IEEE Trans. Circuits Syst. Video Technol. 8(2): 124-127 (1998) - 1997
- [j19]Yung-Pin Lee, Thou-Ho Chen, Liang-Gee Chen, Mei-Juan Chen, Chung-Wei Ku:
A cost-effective architecture for 8×8 two-dimensional DCT/IDCT using direct method. IEEE Trans. Circuits Syst. Video Technol. 7(3): 459-467 (1997) - [j18]Mei-Juan Chen, Liang-Gee Chen, Ro-Min Weng:
Error concealment of lost motion vectors with overlapped motion compensation. IEEE Trans. Circuits Syst. Video Technol. 7(3): 560-563 (1997) - [j17]Chun-Te Chen, Liang-Gee Chen, Jue-Hsuan Hsiao:
A bit-level pipelined VLSI architecture for the running order algorithm. IEEE Trans. Signal Process. 45(8): 2140-2144 (1997) - [j16]Yee-Wen Chen, Liang-Gee Chen, Mei-Juan Chen:
Jointly Optimal Region-Classified Adaptive Vector Quantization for Very Low Bit Rate Video Coding. J. VLSI Signal Process. 17(2-3): 189-200 (1997) - 1996
- [j15]Po-Cheng Wu, Liang-Gee Chen, Tzi-Dar Chiueh:
Scalable implementation scheme for multirate FIR filters and its application in efficient design of subband filter banks. IEEE Trans. Circuits Syst. Video Technol. 6(4): 407-410 (1996) - [j14]Sheng-Chieh Huang, Liang-Gee Chen, Thou-Ho Chen:
A 32-bit logarithmic number system processor. J. VLSI Signal Process. 14(3): 311-319 (1996) - 1995
- [j13]Jue-Hsuan Hsiao, Liang-Gee Chen, Tzi-Dar Chiueh, Chun-Te Chen:
High throughput CORDIC-based systolic array design for the discrete cosine transform. IEEE Trans. Circuits Syst. Video Technol. 5(3): 218-225 (1995) - [j12]Mei-Juan Chen, Liang-Gee Chen, Tzi-Dar Chiueh, Yung-Pin Lee:
A new block-matching criterion for motion estimation and its implementation. IEEE Trans. Circuits Syst. Video Technol. 5(3): 231-236 (1995) - [j11]Liang-Gee Chen, Yeu-Shen Jehng, Tzi-Dar Chiueh:
Pipeline interleaving design for FIR, IIR, and FFT array processors. J. VLSI Signal Process. 10(3): 275-293 (1995) - 1994
- [j10]Tzi-Dar Chiueh, Tser-Tzi Tang, Liang-Gee Chen:
Vector quantization using tree-structured self-organizing feature maps. IEEE J. Sel. Areas Commun. 12(9): 1594-1599 (1994) - [j9]Her-Ming Jong, Liang-Gee Chen, Tzi-Dar Chiueh:
Accuracy improvement and cost reduction of 3-step search block matching algorithm for video coding. IEEE Trans. Circuits Syst. Video Technol. 4(1): 88-90 (1994) - [j8]Liang-Gee Chen, Yuan-Chen Liu:
A high quality MC-OBTC Codec for video signal processing. IEEE Trans. Circuits Syst. Video Technol. 4(1): 92-98 (1994) - [j7]Her-Ming Jong, Liang-Gee Chen, Tzi-Dar Chiueh:
Parallel architectures for 3-step hierarchical search block-matching algorithm. IEEE Trans. Circuits Syst. Video Technol. 4(4): 407-416 (1994) - [j6]Mei-Juan Chen, Liang-Gee Chen, Tzi-Dar Chiueh:
One-dimensional full search motion estimation algorithm for video coding. IEEE Trans. Circuits Syst. Video Technol. 4(5): 504-509 (1994) - [j5]Lih-Gwo Jeng, Liang-Gee Chen:
Rate-optimal DSP synthesis by pipeline and minimum unfolding. IEEE Trans. Very Large Scale Integr. Syst. 2(1): 81-88 (1994) - 1993
- [j4]Thou-Ho Chen, Liang-Gee Chen:
Concurrent error-detectable butterfly chip for real-time FFT processing through time redundancy. IEEE J. Solid State Circuits 28(5): 537-547 (1993) - [j3]Yeu-Shen Jehng, Liang-Gee Chen, Tzi-Dar Chiueh:
An efficient and simple VLSI tree architecture for motion estimation algorithms. IEEE Trans. Signal Process. 41(2): 889-900 (1993) - 1991
- [j2]Yeu-Shen Jehng, Liang-Gee Chen, Tai-Ming Parng:
ASG: Automatic schematic generator. Integr. 11(1): 11-27 (1991) - [j1]Liang-Gee Chen, Wai-Ting Chen, Yeu-Shen Jehng, Tzi-Dar Chiueh:
An efficient parallel motion estimation algorithm for digital image processing. IEEE Trans. Circuits Syst. Video Technol. 1(4): 378-385 (1991)
Conference and Workshop Papers
- 2021
- [c261]Jan P. Klopp, Keng-Chi Liu, Liang-Gee Chen, Shao-Yi Chien:
How To Exploit the Transferability of Learned Image Compression to Conventional Codecs. CVPR 2021: 16165-16174 - [c260]Jan P. Klopp, Keng-Chi Liu, Shao-Yi Chien, Liang-Gee Chen:
Online-trained Upsampler for Deep Low Complexity Video Compression. ICCV 2021: 7909-7918 - [c259]Tan Huang, Sih-Sian Wu, Jan Klopp, Po-Hsiang Yu, Liang-Gee Chen:
A Computational Efficient Architecture for Extremely Sparse Stereo Network. ISCAS 2021: 1-5 - [c258]Yu-Sheng Wu, Sih-Sian Wu, Tan Huang, Liang-Gee Chen:
Online Training Refinement Network and Architecture Design for Stereo Matching. ISCAS 2021: 1-5 - 2020
- [c257]Everett Fall, Kai-Wei Chang, Liang-Gee Chen:
Dynamically Expanded CNN Array for Video Coding. ICIGP 2020: 85-90 - 2019
- [c256]Keng-Chi Liu, Yi-Ting Shen, Jan Klopp, Liang-Gee Chen:
What Synthesis Is Missing: Depth Adaptation Integrated With Weak Supervision for Indoor Scene Parsing. ICCV 2019: 7344-7353 - 2018
- [c255]Jan Klopp, Yu-Chiang Frank Wang, Shao-Yi Chien, Liang-Gee Chen:
Learning a Code-Space Predictor by Exploiting Intra-Image-Dependencies. BMVC 2018: 124 - [c254]Zhi-Yi Lin, Jia-Lin Chen, Liang-Gee Chen:
A 203 FPS VLSI Architecture of Improved Dense Trajectories for Real-Time Human Action Recognition. ICASSP 2018: 1115-1119 - [c253]Chia-Ho Lin, Yuhsiang M. Tsai, Weichung Wang, Liang-Gee Chen:
GPU-accelerated high-resolution image stitching with better initial guess. ICCE 2018: 1-3 - [c252]Keng-Chi Liu, Yi-Ting Shen, Liang-Gee Chen:
Simple online and realtime tracking with spherical panoramic camera. ICCE 2018: 1-6 - [c251]Hsin-Yu Hou, Sih-Sian Wu, Da-Fang Chang, Liang-Gee Chen:
Video Stereo Matching with Temporally Consistent Belief Propagation. ICME 2018: 1-6 - [c250]Chung-Yan Chih, Sih-Sian Wu, Jan P. Klopp, Liang-Gee Chen:
Accurate and Bandwidth Efficient Architecture for CNN-based Full-HD Super-Resolution. ISCAS 2018: 1-5 - [c249]Zhi-Yi Lin, Jia-Lin Chen, Liang-Gee Chen:
A 65 fps Full-HD Hardware Implementation of HOG, HOF, MBHx, and MBHy for Real-Time Action Recognition. ISCAS 2018: 1-5 - [c248]Kun-Ying Yeh, Yu-Jie Huang, Tung-Chien Chen, Liang-Gee Chen, Shey-Shi Lu:
A 473 μW wireless 16-channel neural recording SoC with RF energy harvester. VLSI-DAT 2018: 1-4 - 2017
- [c247]Chung-Yan Chih, Yi-Chen Wan, Yu-Chi Hsu, Liang-Gee Chen:
Interactive sticker system with Intel RealSense. ICCE 2017: 174-175 - [c246]Chun-Ting Yen, Wan-Yu Chen, Liang-Gee Chen:
A 120 fps 1080p resolution block-based feature extraction architecture implementation for real-time action recognition. ISCAS 2017: 1-4 - [c245]Da-Fang Chang, Sih-Sian Wu, Hsin-Yu Hou, Liang-Gee Chen:
Accurate and fast segment-based cost aggregation algorithm for stereo matching. MMSP 2017: 1-6 - 2016
- [c244]Yi-Ting Shen, Guan-Lin Liu, Sih-Sian Wu, Liang-Gee Chen:
3-D perception enhancement in autostereoscopic TV by depth cue for 3-D model interaction. ICCE 2016: 279-282 - [c243]Jia-Lin Chen, Zhi-Yi Lin, Yi-Chen Wan, Liang-Gee Chen:
Accelerated local feature extraction in a reuse scheme for efficient action recognition. ICIP 2016: 296-299 - [c242]Sih-Sian Wu, Chen-Han Tsai, Liang-Gee Chen:
Efficient Hardware Architecture for Large Disparity Range Stereo Matching Based on Belief Propagation. SiPS 2016: 236-241 - 2015
- [c241]Chao-Tsung Huang, Jui Chin, Hong-Hui Chen, Yu-Wen Wang, Liang-Gee Chen:
Fast realistic refocusing for sparse light fields. ICASSP 2015: 1176-1180 - [c240]Chun-Wei Yu, Che-Wei Chang, Liang-Gee Chen:
A real-time 3D interactive system with stereo camera in the uncertain background. ICCE 2015: 661-662 - [c239]Sih-Sian Wu, Hong-Hui Chen, Chen-Han Tsai, Liang-Gee Chen:
Memory efficient architecture for belief propagation based disparity estimation. ISCAS 2015: 2521-2524 - [c238]Che-Wei Chang, Liang-Gee Chen:
Incremental new actions learning system with limited cost and storage. ISCE 2015: 1-2 - [c237]Chia-Jung Hsu, Jia-Lin Chen, Liang-Gee Chen:
An efficient hardware implementation of HON4D feature extraction for real-time action recognition. ISCE 2015: 1-2 - [c236]Hong-Hui Chen, Chao-Tsung Huang, Sih-Sian Wu, Chia-Liang Hung, Tsung-Chuan Ma, Liang-Gee Chen:
23.2 A 1920×1080 30fps 611 mW five-view depth-estimation processor for light-field applications. ISSCC 2015: 1-3 - 2014
- [c235]Tsung-Chuan Ma, Tung-Chien Chen, Liang-Gee Chen:
Design and implementation of a low power spike detection processor for 128-channel spike sorting microsystem. ICASSP 2014: 3889-3892 - [c234]I-Kuei Chen, Chung-Yu Chi, Szu-Lu Hsu, Liang-Gee Chen:
An integrated system for object tracking, detection, and online learning with real-time RGB-D video. ICASSP 2014: 6558-6562 - [c233]Wan-Yu Chen, Ti-Fen Pan, Liang-Gee Chen:
A spatial first 3-D XYT feature point extraction algorithm for efficient human action recognition. ICCE-TW 2014: 101-102 - [c232]Jia-Lin Chen, Wan-Yu Chen, I-Kuei Chen, Chung-Yu Chi, Liang-Gee Chen:
Interactive clothing retrieval system. ICCE 2014: 347-348 - [c231]I-Kuei Chen, Chung-Yu Chi, Szu-Lu Hsu, Liang-Gee Chen:
A real-time system for object detection and location reminding with RGB-D camera. ICCE 2014: 412-413 - [c230]I-Kuei Chen, Szu-Lu Hsu, Chung-Yu Chi, Liang-Gee Chen:
Automatic video segmentation and object tracking with real-time RGB-D data. ICCE 2014: 486-487 - [c229]Wan-Yu Chen, Jia-Lin Chen, Liang-Gee Chen:
On-the-fly fashion photograph recommendation system with robust face shape features. ICCE 2014: 502-503 - [c228]Jia-Lin Chen, Chun-Chen Kuo, Liang-Gee Chen:
Region-of-unpredictable determination for accelerated full-frame feature generation in video sequences. VCIP 2014: 434-437 - 2013
- [c227]Cheng-Yuan Ko, Chung-Te Li, Chen-Han Chung, Liang-Gee Chen:
3D hand localization by low-cost webcams. Three-Dimensional Image Processing (3DIP) and Applications 2013: 86500W - [c226]Wan-Yu Chen, Jia-Lin Chen, Yu-Chi Su, Liang-Gee Chen:
Intelligent document capturing and blending system based on robust feature matching with an active camera. ICCE 2013: 131-132 - [c225]Li-Fang Cheng, Tung-Chien Chen, Liang-Gee Chen:
Low-power multi-processor system architecture design for universal biomedical signal processing. ISCAS 2013: 857-860 - [c224]Chun-Ting Liu, Liang-Gee Chen, Cheul-Hee Hahm, Answer Sung, Yung-Sheng Chang:
Evolving technology integration for consumer electronics. ISCE 2013: 11-17 - [c223]Cheng-Yuan Ko, Liang-Gee Chen:
Acquire user's distance by face detection. ISCE 2013: 113-114 - 2012
- [c222]Hong-Hui Chen, Tung-Chien Chen, Liang-Gee Chen:
Assessing normality of heart sound by matching pursuit residue with frequency-domain-based templates. EMBC 2012: 2917-2920 - [c221]Li-Fang Cheng, Tung-Chien Chen, Liang-Gee Chen:
Architecture design of the multi-functional wavelet-based ECG microprocessor for realtime detection of abnormal cardiac events. EMBC 2012: 4466-4469 - [c220]Tung-Chien Chen, Tsung-Chuan Ma, Yun-Yu Chen, Liang-Gee Chen:
Low power and high accuracy spike sorting microprocessor with on-line interpolation and re-alignment in 90nm CMOS process. EMBC 2012: 4485-4488 - [c219]Nai-Fu Chang, Tung-Chien Chen, Cheng-Yi Chiang, Liang-Gee Chen:
Channel selection for epilepsy seizure prediction method based on machine learning. EMBC 2012: 5162-5165 - [c218]Chia-Hsiang Lee, Yu-Chi Su, Liang-Gee Chen:
Accurate positioning system based on street view recognition. ICASSP 2012: 2305-2308 - [c217]Hsuan-Hung Chen, Sung-Fang Tsai, Chung-Te Li, Pei-Kuei Tsung, Liang-Gee Chen:
Fast adaptive loop filter algorithm for high efficiency video coding. ICCE-Berlin 2012: 24-25 - [c216]Chien Wu, Chung-Te Li, Chen-Han Chung, Cheng-Yuan Ko, Liang-Gee Chen:
A viewer centric depth adjustment for stereoscopic images. ICCE-Berlin 2012: 178-179 - [c215]Chieh-Han Wu, Chung-Yu Chi, Yi-Min Tsai, Liang-Gee Chen:
Compressive Sensing based Client-Cloud system for 3D depth reconstruction. ICCE-Berlin 2012: 180-182 - [c214]Chia-Hsiang Lee, Yu-Chi Su, Liang-Gee Chen:
An intelligent depth-based obstacle detection for mobile applications. ICCE-Berlin 2012: 223-225 - [c213]I-Kuei Chen, Yi-Min Tsai, Jyh-Jing Hwang, Liang-Gee Chen:
A real-time multi-user face unlock system via fast sparse coding approximation. ICCE-Berlin 2012: 274-276 - [c212]Chung-Te Li, Yen-Chieh Lai, Chien Wu, Sung-Fang Tsai, Liang-Gee Chen:
3D image correction by Hilbert Huang decomposition. ICCE 2012: 271-272 - [c211]Sung-Fang Tsai, Pei-Kuei Tsung, Kuan-Yu Chen, Chung-Te Li, Liang-Gee Chen:
iSense3D: A real-time viewpoint-aware 3D video synthesis system. ICCE 2012: 461-462 - [c210]Yi-Sheng Hsieh, Yu-Chi Su, Liang-Gee Chen:
Robust moving object tracking and trajectory prediction for visual navigation in dynamic environments. ICCE 2012: 696-697 - [c209]Keng-Yen Huang, Yi-Min Tsai, Tien-Ju Yang, Liang-Gee Chen:
A high speed feature matching architecture for real-time video stabilization. ISCAS 2012: 1436-1439 - [c208]Yun-Yu Chen, Tung-Chien Chen, Chien-Chung Chen, Hsin-I Liao, Luk-Ting Sio, Liang-Gee Chen:
Exploration of reusing the pre-recorded training data set to improve the supervised classifier for EEG-based motor-imagery brain computer interfaces. ISCAS 2012: 2067-2070 - [c207]Tien-Ju Yang, Yi-Min Tsai, Chung-Te Li, Liang-Gee Chen:
WarmL1: A warm-start homotopy-based reconstruction algorithm for sparse signals. ISIT 2012: 2226-2230 - [c206]Chuan-Yung Tsai, Yu-Ju Lee, Chun-Ting Chen, Liang-Gee Chen:
A 1.0TOPS/W 36-core neocortical computing processor with 2.3Tb/s Kautz NoC for universal visual recognition. ISSCC 2012: 480-482 - [c205]Yi-Min Tsai, Keng-Yen Huang, H. T. Kung, Dario Vlah, Youngjune Gwon, Liang-Gee Chen:
A Chip Architecture for Compressive Sensing Based Detection of IC Trojans. SiPS 2012: 61-66 - [c204]Yi-Min Tsai, Tien-Ju Yang, Chih-Chung Tsai, Keng-Yen Huang, Liang-Gee Chen:
A 69mW 140-meter/60fps and 60-meter/300fps intelligent vision SoC for versatile automotive applications. VLSIC 2012: 152-153 - [c203]Chia-Hsiang Lee, Yu-Chi Su, Liang-Gee Chen:
An intelligent depth-based obstacle detection system for visually-impaired aid applications. WIAMIS 2012: 1-4 - 2011
- [c202]Chia-Ming Chang, Yu-Jung Chen, Yen-Chang Lu, Chun-Yi Lin, Liang-Gee Chen, Shao-Yi Chien:
A 172.6mW 43.8GFLOPS energy-efficient scalable eight-core 3D graphics processor for mobile multimedia applications. A-SSCC 2011: 405-408 - [c201]Wei-Kai Chan, Yu-Hsiang Tseng, Pei-Kuei Tsung, Tzu-Der Chuang, Yi-Min Tsai, Wei-Yin Chen, Liang-Gee Chen, Shao-Yi Chien:
ReSSP: A 5.877 TOPS/W Reconfigurable Smart-camera Stream Processor. CICC 2011: 1-4 - [c200]Yu-Hsin Chen, Hong-Hui Chen, Tung-Chien Chen, Liang-Gee Chen:
Robust heart rate measurement with phonocardiogram by on-line template extraction and matching. EMBC 2011: 1957-1960 - [c199]Hong-Hui Chen, Yu-Hsin Chen, Tung-Chien Chen, Liang-Gee Chen:
Mobile energy expenditure tracking system based on heart rate and motion providing extra extensions for personalized care. EMBC 2011: 5256-5259 - [c198]Nai-Fu Chang, Cheng-Yi Chiang, Tung-Chien Chen, Liang-Gee Chen:
Cubic spline interpolation with overlapped window and data reuse for on-line Hilbert Huang transform biomedical microprocessor. EMBC 2011: 7091-7094 - [c197]Cheng-Yi Chiang, Nai-Fu Chang, Tung-Chien Chen, Hong-Hui Chen, Liang-Gee Chen:
Seizure prediction based on classification of EEG synchronization patterns with on-line retraining and post-processing scheme. EMBC 2011: 7564-7569 - [c196]Liang-Gee Chen:
System perspective on embedded multimedia. ESTIMedia 2011: 1 - [c195]Hong-Hui Chen, Tung-Chien Chen, Cheng-Yi Chiang, Liang-Gee Chen:
Power estimation scheme for lowpower oriented biomedical SoC extended to very deep submicron technology. ICASSP 2011: 749-752 - [c194]Tung-Chien Chen, Yun-Yu Chen, Tsung-Chuan Ma, Liang-Gee Chen:
Design and implementation of cubic spline interpolation for spike sorting microsystems. ICASSP 2011: 1641-1644 - [c193]Yun-Yu Chen, Yi-Min Tsai, Liang-Gee Chen:
Algorithm and implementation of multi-channel spike sorting using GPU in a home-care surveillance system. ICME 2011: 1-6 - [c192]Yi-Min Tsai, Chih-Chung Tsai, Keng-Yen Huang, Liang-Gee Chen:
Algorithm and architecture design of a knowledge-based vehicle tracking for intelligent cruise control. ICME 2011: 1-6 - [c191]Pei-Kuei Tsung, Pin-Chih Lin, Kuan-Yu Chen, Liang-Gee Chen:
Six-dimensional free-viewpoint synthesis flow for QFHD free-viewpoint/multiview 3DTV applications. ICME 2011: 1-4 - [c190]Tien-Ju Yang, Yi-Min Tsai, Liang-Gee Chen:
Smart display: A mobile self-adaptive projector-camera system. ICME 2011: 1-6 - [c189]Yu-Ju Lee, Chuan-Yung Tsai, Liang-Gee Chen:
A cortex-like model for rapid object recognition using feature-selective hashing. IJCNN 2011: 996-1002 - [c188]Pei-Kuei Tsung, Pin-Chih Lin, Kuan-Yu Chen, Tzu-Der Chuang, Hsin-Jung Yang, Shao-Yi Chien, Li-Fu Ding, Wei-Yin Chen, Chih-Chi Cheng, Tung-Chien Chen, Liang-Gee Chen:
A 216fps 4096×2160p 3DTV set-top box SoC for free-viewpoint 3DTV applications. ISSCC 2011: 124-126 - [c187]Chung-Te Li, Yen-Chieh Lai, Chien Wu, Liang-Gee Chen:
Perceptual multi-cues 2D-to-3D conversion system. VCIP 2011: 1 - 2010
- [c186]Chih-Chi Cheng, Yi-Min Tsai, Liang-Gee Chen, Anantha P. Chandrakasan:
A 0.077 to 0.168 nJ/bit/iteration scalable 3GPP LTE turbo decoder with an adaptive sub-block parallel scheme and an embedded DVFS engine. CICC 2010: 1-4 - [c185]Yen-Chieh Lai, Chao-Chung Cheng, Chia-Kai Liang, Liang-Gee Chen:
Efficient message reduction algorithm for stereo matching using belief propagation. ICIP 2010: 2977-2980 - [c184]Keng-Yen Huang, Yi-Min Tsai, Chih-Chung Tsai, Liang-Gee Chen:
Video stabilization for vehicular applications using SURF-like descriptor and KD-tree. ICIP 2010: 3517-3520 - [c183]Yi-Min Tsai, Keng-Yen Huang, Chih-Chung Tsai, Liang-Gee Chen:
An exploration of on-road vehicle detection using hierarchical scaling schemes. ICIP 2010: 3937-3940 - [c182]Yi-Min Tsai, Keng-Yen Huang, Chih-Chung Tsai, Liang-Gee Chen:
Learning-Based Vehicle Detection Using Up-Scaling Schemes and Predictive Frame Pipeline Structures. ICPR 2010: 3101-3104 - [c181]Pei-Kuei Tsung, Hsin-Jung Yang, Pin-Chih Lin, Kuan-Yu Chen, Liang-Gee Chen:
Hybrid color compensation for virtual view synthesis in multiview video applications. ISCAS 2010: 121-124 - [c180]Yun-Yu Chen, Tung-Chien Chen, Liang-Gee Chen:
Accuracy and power tradeoff in spike sorting microsystems with cubic spline interpolation. ISCAS 2010: 1508-1511 - [c179]Yu-Hsin Chen, Tung-Chien Chen, Tsung-Hsueh Lee, Liang-Gee Chen:
Sub-microwatt correlation integral processor for implantable closed-loop epileptic neuromodulator. ISCAS 2010: 2083-2086 - [c178]Tzu-Der Chuang, Pei-Kuei Tsung, Pin-Chih Lin, Lo-Mei Chang, Tsung-Chuan Ma, Yi-Hau Chen, Liang-Gee Chen:
Low bandwidth decoder framework for H.264/AVC scalable extension. ISCAS 2010: 2960-2963 - [c177]Pin-Chih Lin, Pei-Kuei Tsung, Liang-Gee Chen:
Low-cost hardware architecture design for 3D warping engine in multiview video applications. ISCAS 2010: 2964-2967 - [c176]Chao-Chung Cheng, Chung-Te Li, Chia-Kai Liang, Yen-Chieh Lai, Liang-Gee Chen:
Architecture design of stereo matching using belief propagation. ISCAS 2010: 4109-4112 - [c175]Tzu-Der Chuang, Pei-Kuei Tsung, Pin-Chih Lin, Lo-Mei Chang, Tsung-Chuan Ma, Yi-Hau Chen, Liang-Gee Chen:
A 59.5mW scalable/multi-view video decoder chip for Quad/3D Full HDTV and video streaming applications. ISSCC 2010: 330-331 - [c174]Tse-Wei Chen, Yi-Ling Chen, Teng-Yuan Cheng, Chi-Sun Tang, Pei-Kuei Tsung, Tzu-Der Chuang, Liang-Gee Chen, Shao-Yi Chien:
A multimedia semantic analysis SoC (SASoC) with machine-learning engine. ISSCC 2010: 338-339 - 2009
- [c173]Tse-Wei Chen, Chi-Sun Tang, Sung-Fang Tsai, Chen-Han Tsai, Shao-Yi Chien, Liang-Gee Chen:
Tera-scale performance machine learning SoC with dual stream processor architecture for multimedia content analysis. CICC 2009: 491-494 - [c172]Chia-Kai Liang, Chao-Chung Cheng, Yen-Chieh Lai, Liang-Gee Chen, Homer H. Chen:
Hardware-efficient belief propagation. CVPR 2009: 80-87 - [c171]Chao-Chung Cheng, Chia-Kai Liang, Yen-Chieh Lai, Homer H. Chen, Liang-Gee Chen:
Fast belief propagation process element for high-quality stereo estimation. ICASSP 2009: 745-748 - [c170]Tzu-Der Chuang, Lo-Mei Chang, Tsai-Wei Chiu, Yi-Hau Chen, Liang-Gee Chen:
Bandwidth-efficient cache-based motion compensation architecture with DRAM-friendly data access control. ICASSP 2009: 2009-2012 - [c169]Pei-Kuei Tsung, Wei-Yin Chen, Li-Fu Ding, Shao-Yi Chien, Liang-Gee Chen:
Cache-based integer motion/disparity estimation for quad-HD H.264/AVC and HD multiview video coding. ICASSP 2009: 2013-2016 - [c168]Pei-Kuei Tsung, Wei-Yin Chen, Li-Fu Ding, Chuan-Yung Tsai, Tzu-Der Chuang, Liang-Gee Chen:
Single-iteration full-search fractional motion estimation for quad full HD H.264/AVC encoding. ICME 2009: 9-12 - [c167]Tzu-Heng Wang, Jing-Ying Chang, Liang-Gee Chen:
Algorithm and architecture for object tracking using particle filter. ICME 2009: 1374-1377 - [c166]Pin-Chih Lin, Tzu-Der Chuang, Liang-Gee Chen:
A Branch Selection Multi-symbol High throughput CABAC Decoder Architecture for H.264/AVC. ISCAS 2009: 365-368 - [c165]Tung-Chien Chen, Wentai Liu, Liang-Gee Chen:
128-channel Spike Sorting Processor with a Parallel-folding Structure in 90nm Process. ISCAS 2009: 1253-1256 - [c164]Tung-Chien Chen, Kuanfu Chen, Wentai Liu, Liang-Gee Chen:
On-chip Principal Component Analysis with a Mean Pre-estimation Method for Spike Sorting. ISCAS 2009: 3110-3113 - [c163]Li-Fu Ding, Wei-Yin Chen, Pei-Kuei Tsung, Tzu-Der Chuang, Hsu-Kuang Chiu, Yu-Han Chen, Pai-Heng Hsiao, Shao-Yi Chien, Tung-Chien Chen, Ping-Chih Lin, Chia-Yu Chang, Liang-Gee Chen:
A 212MPixels/s 4096×2160p multiview video encoder chip for 3D/quad HDTV applications. ISSCC 2009: 154-155 - [c162]Yu-Chi Su, Sung-Fang Tsai, Tzu-Der Chuang, You-Ming Tsao, Liang-Gee Chen:
Mapping Scalable Video Coding decoder on multi-core stream processors. PCS 2009: 1-4 - [c161]Liang-Gee Chen:
Plenary presentation B. SoCC 2009: 6 - 2008
- [c160]Yu-Lin Chang, Wei-Yin Chen, Jing-Ying Chang, Yi-Min Tsai, Chia-Lin Lee, Liang-Gee Chen:
Priority depth fusion for the 2D to 3D conversion system. Three-Dimensional Image Capture and Applications 2008: 680513 - [c159]Huei-Hung Liao, Jing-Ying Chang, Liang-Gee Chen:
A Localized Approach to Abandoned Luggage Detection with Foreground-Mask Sampling. AVSS 2008: 132-139 - [c158]Chih-Chi Cheng, Chia-Hua Lin, Chung-Te Li, Samuel C. Chang, Liang-Gee Chen:
iVisual: an intelligent visual sensor SoC with 2790fps CMOS image sensor and 205GOPS/W vision processor. DAC 2008: 90-95 - [c157]Li-Fu Ding, Pei-Kuei Tsung, Wei-Yin Chen, Shao-Yi Chien, Liang-Gee Chen:
Fast motion estimation with inter-view motion vector prediction for stereo and multiview video coding. ICASSP 2008: 1373-1376 - [c156]Wei-Yin Chen, Li-Fu Ding, Pei-Kuei Tsung, Liang-Gee Chen:
Algorithm and architecture design of cache system for motion estimation in high definition H.264/AVC. ICASSP 2008: 2193-2196 - [c155]Ching-Yen Chien, Sheng-Chieh Huang, Shih-Hsiang Lin, Yu-Chieh Huang, Yi-Cheng Chen, Lei-Chun Chou, Tzu-Der Chuang, Yu-Wei Chang, Chia-Ho Pan, Liang-Gee Chen:
A 100 MHz 1920×1080 HD-Photo 20 frames/sec JPEG XR encoder design. ICIP 2008: 1384-1387 - [c154]Yu-Lin Chang, Yi-Min Tsai, Liang-Gee Chen:
A real-time augmented view synthesis system for transparent car pillars. ICIP 2008: 1972-1975 - [c153]Chia-Ho Pan, Sheng-Chieh Huang, I-Hsien Lee, Chung-Jr Lian, Liang-Gee Chen:
Scalable video adaptation optimization using soft decision scheme. ICME 2008: 469-472 - [c152]Wei-Yin Chen, Li-Fu Ding, Pei-Kuei Tsung, Liang-Gee Chen:
Architecture design of high performance embedded compression for high definition video coding. ICME 2008: 825-828 - [c151]Pei-Kuei Tsung, Chun-Yi Lin, Wei-Yin Chen, Li-Fu Ding, Liang-Gee Chen:
Multiview video hybrid coding system with texture-depth synthesis. ICME 2008: 1581-1584 - [c150]Yi-Hau Chen, Tzu-Der Chuang, Yu-Han Chen, Chen-Han Tsai, Liang-Gee Chen:
Frame-parallel design strategy for high definition B-frame H.264/AVC encoder. ISCAS 2008: 29-32 - [c149]You-Ming Tsao, Ka-Hang Lok, Yu-Cheng Lin, Chih-Hao Sun, Shao-Yi Chien, Liang-Gee Chen:
A cost effective reconfigurable memory for multimedia multithreading streaming architecture. ISCAS 2008: 3406-3409 - [c148]Jing-Ying Chang, Tzu-Heng Wang, Shao-Yi Chien, Liang-Gee Chen:
Spatial-temporal consistent labeling for multi-camera multi-object surveillance systems. ISCAS 2008: 3530-3533 - [c147]Chih-Chi Cheng, Chia-Hua Lin, Chung-Te Li, Samuel C. Chang, Chia-Jung Hsu, Liang-Gee Chen:
iVisual: An Intelligent Visual Sensor SoC with 2790fps CMOS Image Sensor and 205GOPS/W Vision Processor. ISSCC 2008: 306-307 - [c146]Chen-Han Chung, Yu-Chieh Kao, Liang-Gee Chen, Fu-Shan Jaw:
Intelligent Content-Aware Model-Free Low Power Evoked Neural Signal Compression. PCM 2008: 898-901 - [c145]Chao-Chung Cheng, Chia-Kai Liang, Yen-Chieh Lai, Homer H. Chen, Liang-Gee Chen:
Analysis of belief propagation for hardware realization. SiPS 2008: 152-157 - [c144]Chi-Wei Lin, Yu-Han Chen, Liang-Gee Chen:
Bio-inspired unified model of visual segmentation system for CAPTCHA character recognition. SiPS 2008: 158-163 - 2007
- [c143]Chuan-Yuan Tsai, Chen-Han Chung, Yu-Han Chen, Tung-Chien Chen, Liang-Gee Chen:
Low Power Cache Algorithm and Architecture Design for Fast Motion Estimation in H.264/AVC Encoder System. ICASSP (2) 2007: 97-100 - [c142]Shao-Yi Chien, Chi-Sheng Shih, Mong-Kai Ku, Chia-Lin Yang, Yao-Wen Chang, Tei-Wei Kuo, Liang-Gee Chen:
3D Video Applications and Intelligent Video Surveillance Camera and its VLSI Design. ICME 2007: 9 - [c141]Yu-Lin Chang, Chih-Ying Fang, Li-Fu Ding, Shao-Yi Chien, Liang-Gee Chen:
Depth Map Generation for 2D-to-3D Conversion by Short-Term Motion Assisted Color Segmentation. ICME 2007: 1958-1961 - [c140]Pei-Kuei Tsung, Li-Fu Ding, Wei-Yin Chen, Shao-Yi Chien, Tung-Chien Chen, Liang-Gee Chen:
System Bandwidth Analysis of Multiview Video Coding with Precedence Constraint. ISCAS 2007: 1001-1004 - [c139]Michel Harrand, Liang-Gee Chen:
Multimedia and Parrallel Signal Processors. ISSCC 2007: 268-269 - [c138]Yu-Jen Chen, Yi-Hau Chen, Tzu-Der Chuang, Chung-Te Li, Shao-Yi Chien, Liang-Gee Chen:
Architecture Design of Fine Grain SNR Scalable Encoder with CABAC for H.264/AVC Scalable Extension. SiPS 2007: 515-520 - [c137]Chung-Jr Lian, Po-Chih Tseng, Tung-Chien Chen, Yu-Wei Chang, Liang-Gee Chen:
Reconfigurable architecture for video applications. SoCC 2007: 21-24 - [c136]Yi-Hau Chen, Chia-Hua Lin, Ching-Yeh Chen, Liang-Gee Chen:
Fast prediction algorithm of adaptive GOP structure for SVC. VCIP 2007: 65080U - [c135]Yi-Min Tsai, Yu-Lin Chang, Liang-Gee Chen:
Symmetric trinocular dense disparity estimation for car surrounding camera array. VCIP 2007: 65081F - [c134]Wei-Yin Chen, Li-Fu Ding, Liang-Gee Chen:
Fast luminance and chrominance correction based on motion compensated linear regression for multi-view video coding. VCIP 2007: 650823 - 2006
- [c133]Tung-Chien Chen, Chung-Jr Lian, Liang-Gee Chen:
Hardware architecture design of an H.264/AVC video codec. ASP-DAC 2006: 750-757 - [c132]Liang-Gee Chen:
Dances with multimedia: embedded video codec design. CASES 2006: 1 - [c131]Yu-Wei Chang, Hung-Chi Fang, Chun-Chia Chen, Liang-Gee Chen:
Design and Implementation Of Word-Level Embedded Block Coding Architecture in JPEG 2000 Decoder. ICASSP (2) 2006: 449-452 - [c130]Tung-Chien Chen, Yu-Han Chen, Sung-Fang Tsai, Liang-Gee Chen:
Architecture Design of Low Power Integer Motion Estimation for H. 264/AVC. ICASSP (3) 2006: 900-903 - [c129]Chih-Chi Cheng, Chao-Tsung Huang, Jing-Ying Chang, Liang-Gee Chen:
Line Buffer Wordlength Analysis for Line-Based 2-D DWT. ICASSP (3) 2006: 924-927 - [c128]Jing-Ying Chang, Chao-Chung Cheng, Shao-Yi Chien, Liang-Gee Chen:
Relative Depth Layer Extraction for Monoscopic Video by Use of Multidimensional Filter. ICME 2006: 221-224 - [c127]Yu-Han Chen, Tung-Chien Chen, Liang-Gee Chen:
Power-Scalable Algorithm and Reconfigurable Macro-Block Pipelining Architecture of H.264 Encoder for Mobile Application. ICME 2006: 281-284 - [c126]Yi-Hau Chen, Ching-Yeh Chen, Chih-Chi Cheng, Liang-Gee Chen:
Scalable Rate-Distortion-Computation Hardware Accelerator for MCTF and ME. ICME 2006: 365-368 - [c125]Chuan-Yung Tsai, Tung-Chien Chen, Liang-Gee Chen:
Low Power Entropy Coding Hardware Design for H.264/AVC Baseline Profile Encoder. ICME 2006: 1941-1944 - [c124]Wan-Yu Chen, Yu-Lin Chang, Hsu-Kuang Chiu, Shao-Yi Chien, Liang-Gee Chen:
Real-Time Depth Image based Rendering Hardware Accelerator for Advanced Three Dimensional Television System. ICME 2006: 2069-2072 - [c123]Ching-Yeh Chen, Yi-Hau Chen, Chih-Chi Cheng, Liang-Gee Chen:
Frame-level data reuse for motion-compensated temporal filtering. ISCAS 2006 - [c122]Chun-Chia Chen, Yu-Wei Chang, Hung-Chi Fang, Liang-Gee Chen:
Analysis of scalable architecture for the embedded block coding in JPEG 2000. ISCAS 2006 - [c121]Tung-Chien Chen, Yu-Han Chen, Chuan-Yung Tsai, Liang-Gee Chen:
Low power and power aware fractional motion estimation of H.264/AVC for mobile applications. ISCAS 2006 - [c120]Yu-Jen Chen, Chen-Han Tsai, Liang-Gee Chen:
Architecture design of area-efficient SRAM-based multi-symbol arithmetic encoder in H.264/AVC. ISCAS 2006 - [c119]Chih-Chi Cheng, Ching-Yeh Chen, Yi-Hau Chen, Liang-Gee Chen:
Analysis and VLSI architecture of update step in motion-compensated temporal filtering. ISCAS 2006 - [c118]Chi-Sun Tang, Chen-Han Tsai, Shao-Yi Chien, Liang-Gee Chen:
Algorithm and hardware architecture design for weighted prediction in H.264/MPEG-4 AVC. ISCAS 2006 - [c117]You-Ming Tsao, Chi-Ling Wu, Shao-Yi Chien, Liang-Gee Chen:
Adaptive tile depth filter for the depth buffer bandwidth minimization in the low power graphics systems. ISCAS 2006 - [c116]Yu-Wei Chang, Hung-Chi Fang, Chih-Chi Cheng, Chun-Chia Chen, Chung-Jr Lian, Shao-Yi Chien, Liang-Gee Chen:
124Ms/s pixel-pipelined motion-JPEG 2000 codec without tile memory. ISSCC 2006: 1586-1595 - [c115]Chia-Ping Lin, Po-Chih Tseng, Yao-Ting Chiu, Siou-Shen Lin, Chih-Chi Cheng, Hung-Chi Fang, Wei-Min Chao, Liang-Gee Chen:
A 5mW MPEG4 SP encoder with 2D bandwidth-sharing motion estimation for mobile applications. ISSCC 2006: 1626-1635 - [c114]Yu-Wei Chang, Chih-Chi Cheng, Chun-Chia Chen, Hung-Chi Fang, Liang-Gee Chen:
Design and Implementation of JPEG 2000 Codec with Bit-Plane Scalable Architecture. SiPS 2006: 428-433 - 2005
- [c113]Chung-Jr Lian, Yu-Wen Huang, Hung-Chi Fang, Yung-Chi Chang, Liang-Gee Chen:
PEG, MPEG-4, and H.264 Codec IP Development. DATE 2005: 1118-1119 - [c112]Hung-Chi Fang, Yu-Wei Chang, Chih-Chi Cheng, Chun-Chia Chen, Liang-Gee Chen:
Memory efficient JPEG2000 architecture with stripe pipeline scheme. ICASSP (5) 2005: 1-4 - [c111]Chao-Tsung Huang, Ching-Yeh Chen, Yi-Hau Chen, Liang-Gee Chen:
Memory analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering [video coding applications]. ICASSP (5) 2005: 93-96 - [c110]Yu-Lin Chang, Ching-Yeh Chen, Shyh-Feng Lin, Liang-Gee Chen:
Four field variable block size motion compensated adaptive de-interlacing. ICASSP (2) 2005: 913-916 - [c109]Ching-Yeh Chen, Chao-Tsung Huang, Yi-Hau Chen, Chung-Jr Lian, Liang-Gee Chen:
System analysis of VLSI architecture for motion-compensated temporal filtering. ICIP (3) 2005: 992-995 - [c108]Chia-Ping Lin, Po-Chih Tseng, Liang-Gee Chen:
Nearly Lossless Content-Dependent Low-Power DCT Design for Mobile Video Applications. ICME 2005: 1238-1241 - [c107]Wan-Yu Chen, Yu-Lin Chang, Shyh-Feng Lin, Li-Fu Ding, Liang-Gee Chen:
Efficient Depth Image Based Rendering with Edge Dependent Depth Filter and Interpolation. ICME 2005: 1314-1317 - [c106]Tung-Chien Chen, Yu-Wen Huang, Chuan-Yung Tsai, Chao-Tsung Huang, Liang-Gee Chen:
Single reference frame multiple current macroblocks scheme for multi-frame motion estimation in H.264/AVC. ISCAS (2) 2005: 1790-1793 - [c105]Yi-Hau Chen, Ching-Yeh Chen, Liang-Gee Chen:
Architecture of global motion compensation for MPEG-4 advanced simple profile. ISCAS (5) 2005: 1798-1801 - [c104]To-Wei Chen, Yu-Wen Huang, Tung-Chien Chen, Yu-Han Chen, Chuan-Yung Tsai, Liang-Gee Chen:
Architecture design of H.264/AVC decoder with hybrid task pipelining for high definition videos. ISCAS (3) 2005: 2931-2934 - [c103]Shih-Way Huang, Liang-Gee Chen, Tsung-Han Tsai:
Memory and computationally efficient psychoacoustic model for MPEG AAC on 16-bit fixed-point processors. ISCAS (4) 2005: 3155-3158 - [c102]Chih-Chi Cheng, Chao-Tsung Huang, Po-Chih Tseng, Chia-Ho Pan, Liang-Gee Chen:
Multiple-lifting scheme: memory-efficient VLSI implementation for line-based 2-D DWT. ISCAS (5) 2005: 5190-5193 - [c101]Yu-Wen Huang, Chia-Lin Lee, Ching-Yeh Chen, Liang-Gee Chen:
One-pass computation-aware motion estimation with adaptive search strategy. ISCAS (6) 2005: 5469-5472 - [c100]Li-Fu Ding, Shao-Yi Chien, Yu-Wen Huang, Yu-Lin Chang, Liang-Gee Chen:
Stereo video coding system with hybrid coding based on joint prediction scheme. ISCAS (6) 2005: 6082-6085 - [c99]Chia-Ho Pan, I-Hsien Lee, Sheng-Chieh Huang, Chih-Chi Cheng, Chung-Jr Lian, Liang-Gee Chen:
Application Layer Error Correction Scheme for Video Header Protection on Wireless Network. ISM 2005: 499-505 - [c98]Chi-Sheng Shih, Chia-Lin Yang, Mong-Kai Ku, Tei-Wei Kuo, Shao-Yi Chien, Yao-Wen Chang, Liang-Gee Chen:
Reconfigurable Platform for Content Science Research. RTCSA 2005: 481-486 - 2004
- [c97]Tung-Chien Chen, Yu-Wen Huang, Liang-Gee Chen:
Fully utilized and reusable architecture for fractional motion estimation of H.264/AVC. ICASSP (5) 2004: 9-12 - [c96]Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen:
Memory analysis and architecture for two-dimensional discrete wavelet transform. ICASSP (5) 2004: 13-16 - [c95]Yu-Wen Huang, Chen-Han Tsai, Liang-Gee Chen:
Parallel global elimination algorithm and architecture design for fast block matching motion estimation. ICASSP (5) 2004: 153-156 - [c94]Yu-Lin Chang, Ping-Hao Wu, Shyh-Feng Lin, Liang-Gee Chen:
Four field local motion compensated de-interlacing. ICASSP (5) 2004: 253-256 - [c93]Jing-Kng Chang, Hung-Chi Fang, Yen-Wei Huang, Liang-Gee Chen:
Architecture of MPEG-7 color structure description generator for realtime video applications. ICIP 2004: 2813-2816 - [c92]Yu-Wen Huang, Bing-Yu Hsieh, Tung-Chien Chen, Liang-Gee Chen:
Hardware architecture design for H.264/AVC intra frame coder. ISCAS (2) 2004: 269-272 - [c91]Tung-Chien Chen, Yu-Wen Huang, Liang-Gee Chen:
Analysis and design of macroblock pipelining for H.264/AVC VLSI architecture. ISCAS (2) 2004: 273-276 - [c90]Ching-Yeh Chen, Shao-Yi Chien, Wei-Min Chao, Yu-Wen Huang, Liang-Gee Chen:
Hardware architecture for global motion estimation for MPEG-4 Advanced Simple Profile. ISCAS (2) 2004: 301-304 - [c89]Siou-Shen Lin, Po-Chih Tseng, Liang-Gee Chen:
Low-power parallel tree architecture for full search block-matching motion estimation. ISCAS (2) 2004: 313-316 - [c88]Yu-Lin Chang, Shyh-Feng Lin, Liang-Gee Chen:
Extended intelligent edge-based line average with its implementation and test method. ISCAS (2) 2004: 341-344 - [c87]Po-Chih Tseng, Chao-Tsung Huang, Liang-Gee Chen:
Reconfigurable discrete cosine transform processor for object-based video signal processing. ISCAS (2) 2004: 353-356 - [c86]Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen:
B-spline factorization-based architecture for inverse discrete wavelet transform. ISCAS (2) 2004: 829-832 - [c85]Yung-Chi Chang, Chih-Wei Hsu, Liang-Gee Chen:
MPEG-4 FGS Encoder Design for an Interactive Content-aware MPEG-4 Video Streaming SOC. IWSOC 2004: 172-175 - [c84]Jing-Ying Chang, Chung-Jr Lian, Hung-Chi Fang, Liang-Gee Chen:
Architecture and Analysis of Color Structure Descriptor for Real-Time Video Indexing and Retrieval. PCM (2) 2004: 130-137 - [c83]Yu-Wei Chang, Hung-Chi Fang, Chung-Jr Lian, Liang-Gee Chen:
Novel precompression rate-distortion optimization algorithm for JPEG 2000. VCIP 2004 - 2003
- [c82]Yu-Wen Huang, Bing-Yu Hsieh, Tu-Chih Wang, Shao-Yi Chien, Shyh-Yih Ma, Chun-Fu Shen, Liang-Gee Chen:
Analysis and reduction of reference frames for motion estimation in MPEG-4 AVC/JVT/H.264. ICASSP (3) 2003: 145-148 - [c81]Hung-Chi Fang, Tu-Chih Wang, Yu-Wei Chang, Liang-Gee Chen:
Hardware oriented rate control algorithm and implementation for realtime video coding. ICASSP (2) 2003: 489-492 - [c80]Tu-Chih Wang, Yu-Wen Huang, Hung-Chi Fang, Liang-Gee Chen:
Performance analysis of hardware oriented algorithm modifications in H.264. ICASSP (2) 2003: 493-496 - [c79]Wei-Min Chao, Yung-Chi Chang, Chih-Wei Hsu, Liang-Gee Chen:
Platform architecture design for MEG-4 video coding. ICIP (3) 2003: 93-96 - [c78]Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen:
Hardware implementation of shape-adaptive discrete wavelet transform with the JPEG2000 defaulted (9, 7) filter bank. ICIP (2) 2003: 571-574 - [c77]Yu-Lin Chang, Ching-Yeh Chen, Shyh-Feng Lin, Liang-Gee Chen:
Motion compensated de-interlacing with adaptive global motion estimation and compensation. ICIP (3) 2003: 693-696 - [c76]Shao-Yi Chien, Shu-Han Yu, Li-Fu Ding, Yun-Nien Huang, Liang-Gee Chen:
Efficient stereo video coding system for immersive teleconference with two-stage hybrid disparity estimation algorithm. ICIP (1) 2003: 749-752 - [c75]Hung-Chi Fang, Tu-Chih Wang, Yu-Wei Chang, Ya-Yun Shih, Liang-Gee Chen:
Novel word-level algorithm of embedded block coding in JPEG 2000. ICME 2003: 137-140 - [c74]Ching-Yeh Chen, Shao-Yi Chien, Yi-Hau Chen, Yu-Wen Huang, Liang-Gee Chen:
Unsupervised object-based sprite coding system for tennis sport. ICME 2003: 337-340 - [c73]Hung-Chi Fang, Tu-Chih Wang, Yu-Wei Chang, Liang-Gee Chen:
Hardware oriented rate control algorithm and implementation for realtime video coding. ICME 2003: 421-424 - [c72]Tu-Chih Wang, Yu-Wen Huang, Hung-Chi Fang, Liang-Gee Chen:
Performance analysis of hardware oriented algorithm modification in H.264. ICME 2003: 601-604 - [c71]Yu-Wen Huang, To-Wei Chen, Bing-Yu Hsieh, Tu-Chih Wang, Te-Hao Chang, Liang-Gee Chen:
Architecture design for deblocking filter in H.264/JVT/AVC. ICME 2003: 693-696 - [c70]Yu-Wen Huang, Bing-Yu Hsieh, Tu-Chih Wang, Shao-Yi Chien, Shyh-Yih Ma, Chun-Fu Shen, Liang-Gee Chen:
Analysis and reduction of reference frames for motion estimation in MPEG-4 AVC/JVT/H.264. ICME 2003: 809-812 - [c69]Tsung-Han Tsai, Shih-Way Huang, Liang-Gee Chen:
Design of a low power psycho-acoustic model co-processor for MPEG-2/4 AAC LC stereo encoder. ISCAS (2) 2003: 552-555 - [c68]Te-Hao Chang, Chung-Jr Lian, Hong-Hui Chen, Jing-Ying Chang, Liang-Gee Chen:
Effective hardware-oriented technique for the rate control of JPEG2000 encoding. ISCAS (2) 2003: 684-687 - [c67]Shyh-Feng Lin, Yu-Lin Chang, Liang-Gee Chen:
Motion adaptive de-interlacing by horizontal motion detection and enhanced ELA processing. ISCAS (2) 2003: 696-699 - [c66]Shao-Yi Chien, Ching-Yeh Chen, Wei-Min Chao, Yu-Wen Huang, Liang-Gee Chen:
Analysis and hardware architecture for global motion estimation in MPEG-4 Advanced Simple Profile. ISCAS (2) 2003: 720-723 - [c65]Hung-Chi Fang, Tu-Chih Wang, Chung-Jr Lian, Te-Hao Chang, Liang-Gee Chen:
High speed memory efficient EBCOT architecture for JPEG2000. ISCAS (2) 2003: 736-739 - [c64]Chih-Wei Hsu, Yung-Chi Chang, Wei-Min Chao, Liang-Gee Chen:
Hardware-oriented optimization and block-level architecture design for MPEG-4 FGS encoder. ISCAS (2) 2003: 784-787 - [c63]Wei-Min Chao, Tung-Chien Chen, Yung-Chi Chang, Chih-Wei Hsu, Liang-Gee Chen:
Computationally controllable integer, half, and quarter-pel motion estimator for MPEG-4 Advanced Simple Profile. ISCAS (2) 2003: 788-791 - [c62]Yu-Wen Huang, Tu-Chih Wang, Bing-Yu Hsieh, Liang-Gee Chen:
Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264. ISCAS (2) 2003: 796-799 - [c61]Tu-Chih Wang, Yu-Wen Huang, Hung-Chi Fang, Liang-Gee Chen:
Parallel 4×4 2D transform and inverse transform architecture for MPEG-4 AVC/H.264. ISCAS (2) 2003: 800-803 - [c60]Shao-Yi Chien, Shu-Han Yu, Li-Fu Ding, Yun-Nien Huang, Liang-Gee Chen:
Fast disparity estimation algorithm for mesh-based stereo image/video compression with two-stage hybrid approach. VCIP 2003: 1521-1530 - [c59]Bing-Yu Hsieh, Yu-Wen Huang, Tu-Chih Wang, Shao-Yi Chien, Liang-Gee Chen:
Fast motion estimation algorithm for H.264/MPEG-4 AVC by using multiple reference frame skipping criteria. VCIP 2003: 1551-1560 - 2002
- [c58]Po-Chih Tseng, Chao-Tsung Huang, Liang-Gee Chen:
Generic RAM-based architecture for two-dimensional discrete wavelet transform with line-based method. APCCAS (1) 2002: 363-366 - [c57]Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen:
Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform. APCCAS (1) 2002: 383-388 - [c56]Pei-Jun Lee, Liang-Gee Chen:
Error recovery for MPEG-4 shape and texture information. APCCAS (1) 2002: 525-528 - [c55]Hung-Chi Fang, Tu-Chih Wang, Liang-Gee Chen:
Real-time deblocking filter for MPEG-4 systems. APCCAS (1) 2002: 541-544 - [c54]Yu-Wen Huang, Shao-Yi Chien, Bing-Yu Hsieh, Liang-Gee Chen:
An efficient and low power architecture design for motion estimation using global elimination algorithm. ICASSP 2002: 3120-3123 - [c53]Shao-Yi Chien, Yu-Wen Huang, Shyh-Yih Ma, Liang-Gee Chen:
Predictive watershed for image sequences segmentation. ICASSP 2002: 3196-3199 - [c52]Te-Hao Chang, Li-Lin Chen, Chung-Jr Lian, Hong-Hui Chen, Liang-Gee Chen:
Computation reduction technique for lossy JPEG2000 encoding through EBCOT Tier-2 feedback processing. ICIP (3) 2002: 85-88 - [c51]Shao-Yi Chien, Ching-Yeh Chen, Wei-Min Chao, Chih-Wei Hsu, Yu-Wen Huang, Liang-Gee Chen:
A fast and high subjective quality sprite generation algorithm with frame skipping and multiple sprites techniques. ICIP (1) 2002: 193-196 - [c50]Pei-Jun Lee, Liang-Gee Chen:
Bit-plane error recovery via cross subband for image transmission in JPEG2000. ICME (1) 2002: 149-152 - [c49]Tu-Chih Wang, Hung-Chi Fang, Liang-Gee Chen:
Low delay, error robust wireless video transmission architecture for video communication. ICME (1) 2002: 265-268 - [c48]Shao-Yi Chien, Ching-Yeh Chen, Yu-Wen Huang, Liang-Gee Chen:
Multiple sprites and frame skipping techniques for sprite generation with high subjective quality and fast speed. ICME (1) 2002: 785-788 - [c47]Yu-Wen Huang, Bing-Yu Hsieh, Shao-Yi Chien, Liang-Gee Chen:
Simple and effective algorithm for automatic tracking of a single object using a pan-tilt-zoom camera. ICME (1) 2002: 789-792 - [c46]Hong-Hui Chen, Chung-Jr Lian, Te-Hao Chang, Liang-Gee Chen:
Analysis of EBCOT decoding algorithm and its VLSI implementation for JPEG 2000. ISCAS (4) 2002: 329-332 - [c45]Shao-Yi Chien, Yu-Wen Huang, Liang-Gee Chen:
A hardware accelerator for video segmentation using programmable morphology PE array. ISCAS (4) 2002: 341-344 - [c44]Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen:
Efficient VLSI architectures of lifting-based discrete wavelet transform by systematic design method. ISCAS (5) 2002: 565-568 - [c43]Yu-Wen Huang, Shao-Yi Chien, Bing-Yu Hsieh, Liang-Gee Chen:
Automatic threshold decision of background registration technique for video segmentation. VCIP 2002: 552-563 - [c42]Po-Chih Tseng, Chao-Tsung Huang, Liang-Gee Chen:
VLSI implementation of shape-adaptive discrete wavelet transform. VCIP 2002: 655-666 - 2001
- [c41]Chung-Jr Lian, Liang-Gee Chen, Hao-Chieh Chang, Yung-Chi Chang:
Design and implementation of JPEG encoder IP core. ASP-DAC 2001: 29-30 - [c40]Shao-Yi Chien, Shyh-Yih Ma, Liang-Gee Chen:
Partial-result-reuse architecture and its design technique for morphological operations. ICASSP 2001: 1185-1188 - [c39]Yung-Chi Chang, Chao-Chih Huang, Hao-Chieh Chang, Hung-Chi Fang, Liang-Gee Chen:
Error-Propagation Analysis and Concealment Strategy for MPEG-4 Video Bitstream with Data Partitioning. ICME 2001 - [c38]Liang-Gee Chen, Chung-Jr Lian, Kuanfu Chen, Hong-Hui Chen:
Analysis and Architecture Design of JPEG2000. ICME 2001 - [c37]Shao-Yi Chien, Yu-Wen Huang, Shyh-Yih Ma, Liang-Gee Chen:
Automatic Video Segmentation For MPEG-4 Using Predictivewatershed. ICME 2001 - [c36]Hao-Chieh Chang, Zhong-Lan Yang, Chung-Jr Lian, Liang-Gee Chen:
Hardware-efficient architecture design of tree-depth scanning and multiple quantization scheme for MPEG-4 still texture coding. ISCAS (2) 2001: 193-196 - [c35]Mei-Yun Hsu, Hao-Chieh Chang, Yi-Chu Wang, Liang-Gee Chen:
Scalable module-based architecture for MPEG-4 BMA motion estimation. ISCAS (2) 2001: 245-248 - [c34]Shao-Yi Chien, Yu-Wen Huang, Shyh-Yih Ma, Liang-Gee Chen:
A hybrid morphology processing units architecture for real-time video segmentation systems. ISCAS (5) 2001: 275-278 - [c33]Chung-Jr Lian, Kuanfu Chen, Hong-Hui Chen, Liang-Gee Chen:
Lifting based discrete wavelet transform architecture for JPEG2000. ISCAS (2) 2001: 445-448 - [c32]Kuanfu Chen, Chung-Jr Lian, Hong-Hui Chen, Liang-Gee Chen:
Analysis and architecture design of EBCOT for JPEG-2000. ISCAS (2) 2001: 765-768 - [c31]Yi-Chu Wang, Hao-Chieh Chang, Wei-Ming Chao, Liang-Gee Chen:
Efficient architecture of binary motion estimation for MPEG-4 shape coding. VCIP 2001: 959-967 - 2000
- [c30]Hao-Chieh Chang, Yung-Chi Chang, Yuan-Bin Tsai, Chih-Peng Fan, Liang-Gee Chen:
MPEG-4 video bitstream structure analysis and its parsing architecture design. ISCAS 2000: 184-187 - [c29]Hao-Chieh Chang, Liang-Gee Chen, Mei-Yun Hsu, Yung-Chi Chang:
Performance analysis and architecture evaluation of MPEG-4 video codec system. ISCAS 2000: 449-452 - [c28]Chien-Yu Chen, Zhong-Lan Yang, Tu-Chih Wang, Liang-Gee Chen:
A programmable VLSI architecture for 2-D discrete wavelet transform. ISCAS 2000: 619-622 - [c27]Shao-Yi Chien, Shyh-Yih Ma, Liang-Gee Chen:
Efficient video segmentation algorithm for real-time MPEG-4 camera system. VCIP 2000: 1087-1098 - 1999
- [c26]Shyh-Yih Ma, Liang-Gee Chen:
A single chip CMOS APS camera with direct frame difference output. CICC 1999: 287-290 - [c25]Sheng-Chieh Huang, Liang-Gee Chen, Hao-Chieh Chang:
A novel image compression algorithm by using Log-Exp transform. ISCAS (4) 1999: 17-20 - [c24]Jun-Fu Shen, Liang-Gee Chen, Hao-Chieh Chang, Tu-Chih Wang:
Low power full-search block-matching motion estimation chip for H.263+. ISCAS (4) 1999: 299-302 - [c23]Hao-Chieh Chang, Liang-Gee Chen, Yung-Chi Chang, Sheng-Chieh Huang:
A VLSI architecture design of VLC encoder for high data rate video/image coding. ISCAS (4) 1999: 398-401 - [c22]Tsung-Han Tsai, Liang-Gee Chen:
A cost effective architecture design of inverse quantization and multichannel processing for MPEG-2 audio decoding. ISCAS (3) 1999: 548-551 - 1998
- [c21]Liang-Gee Chen, Juing-Ying Jiu, Hao-Chieh Chang, Yung-Pin Lee, Chung-Wei Ku:
A Low Power 2-D DCT Chip Design Using Direct 2-D Algorithm. ASP-DAC 1998: 145-150 - 1997
- [c20]Yeong-Kang Lai, Liang-Gee Chen, Yung-Pin Lee:
A flexible data-interlacing architecture for full-search block-matching algorithm. ASAP 1997: 96- - [c19]Mei-Juan Chen, Liang-Gee Chen, Ruei-Xi Chen:
Error Resilience for Block Loss with Overlapped Motion Compensation. ICIP (2) 1997: 105-108 - [c18]Yeong-Kang Lai, Liang-Gee Chen, Tsung-Han Tsai, Po-Cheng Wu:
A Flexible High-Throughput VLSI Architecture with 2-D Data-Reuse for Full-Search Motion Estimation. ICIP (2) 1997: 144-147 - 1996
- [c17]Yee-Wen Chen, Liang-Gee Chen, Mei-Juan Chen:
A very low bit rate video coding system using adaptive region-classified vector quantization. ICASSP 1996: 1205-1208 - [c16]Chung-Wei Ku, You-Ming Chiu, Liang-Gee Chen, Yung-Pin Lee:
Building a pseudo object-oriented very low bit-rate video coding system from a modified optical flow motion estimation algorithm. ICASSP 1996: 2064-2067 - [c15]Chun-Te Chen, Liang-Gee Chen:
A self-adjusting weighted median filter for removing impulse noise in images. ICIP (1) 1996: 419-422 - [c14]Po-Cheng Wu, Liang-Gee Chen, Yeong-Kang Lai, Tsung-Han Tsai:
Design strategy for three-dimensional subband filter banks. ICIP (1) 1996: 605-608 - [c13]Chung-Wei Ku, Liang-Gee Chen, You-Ming Chiu, Yung-Pin Lee:
A pseudo-object-oriented very low bit-rate video coding system with cache VQ for detail compensation. ICIP (1) 1996: 653-656 - 1995
- [c12]Chun-Te Chen, Liang-Gee Chen, Jue-Hsuan Hsiao:
A hardware-oriented design for weighted median filters. ASP-DAC 1995 - 1994
- [c11]Jue-Hsuan Hsiao, Liang-Gee Chen, Tzi-Dar Chiueh, Chun-Te Chen:
High Throughput CORDIC-Based Systolic Array Design for the Discrete Cosine Transform. ISCAS 1994: 85-88 - [c10]Chung-Wei Ku, Liang-Gee Chen, Tzi-Dar Chiueh, Her-Ming Jong:
Tree-Structure Architecture and VLSI Implementation for Vector Quantization Algorithms. ISCAS 1994: 139-142 - [c9]Sheng-Chieh Huang, Liang-Gee Chen, Thou-Ho Chen:
The Chip Design of A 32-b Logarithmic Number System. ISCAS 1994: 167-170 - [c8]Her-Ming Jong, Liang-Gee Chen, Tzi-Dar Chiueh:
Parallel Architectures of 3-Step Search Block-Matching Algorithm for Video Coding. ISCAS 1994: 209-212 - 1993
- [c7]Pinhong Chen, Jyuo-Min Shyu, Liang-Gee Chen:
Hardware Verification Using Symbolic State Transition Graphs. ICCD 1993: 54-57 - [c6]Jue-Hsuan Hsiao, Liang-Gee Chen, Tzi-Dar Chiueh, Chun-Te Chen:
Novel Systolic Array Design for the Discrete Hartley Transform with High Throughput Rate. ISCAS 1993: 1567-1570 - [c5]Lih-Gwo Jeng, Liang-Gee Chen:
Rate-Optimal DSP Synthesis by Pipeline and Minimum Undolding. VLSI Design 1993: 148-153 - 1992
- [c4]Thou-Ho Chen, Liang-Gee Chen, Yi-Shing Chang:
Design of Concurrent Error-Detectable VLSI-Based Array Dividers. ICCD 1992: 72-75 - 1991
- [c3]Chin-Yuan Kuo, Liang-Gee Chen, Tai-Ming Parng:
An automatic synthesizer for CMOS operational amplifiers. EURO-DAC 1991: 470-474 - [c2]Lih-Gwo Jeng, Liang-Gee Chen:
A globally static rate optimal scheduling for recursive DSP algorithms. ICASSP 1991: 1005-1008 - [c1]Liang-Gee Chen, Wai-Ting Chen, Yeu-Shen Jehng, Tzi-Dar Chiueh:
A Predictive Parallel Motion Estimation Algorithm for Digital Image Processing. ICCD 1991: 617-620
Parts in Books or Collections
- 2014
- [p3]Sung-Fang Tsai, Cheng-Han Tsai, Liang-Gee Chen:
Encoder Hardware Architecture for HEVC. High Efficiency Video Coding 2014: 343-375 - 2013
- [p2]Yu-Han Chen, Liang-Gee Chen:
Video Compression. Handbook of Signal Processing Systems 2013: 49-67 - 2010
- [p1]Yu-Han Chen, Liang-Gee Chen:
Video Compression. Handbook of Signal Processing Systems 2010: 103-121
Informal and Other Publications
- 2021
- [i6]Po-Hsiang Yu, Sih-Sian Wu, Liang-Gee Chen:
KCP: Kernel Cluster Pruning for Dense Labeling Neural Networks. CoRR abs/2101.06686 (2021) - 2020
- [i5]Po-Hsiang Yu, Sih-Sian Wu, Jan P. Klopp, Liang-Gee Chen, Shao-Yi Chien:
Joint Pruning & Quantization for Extremely Sparse Neural Networks. CoRR abs/2010.01892 (2020) - [i4]Jan P. Klopp, Keng-Chi Liu, Liang-Gee Chen, Shao-Yi Chien:
How to Exploit the Transferability of Learned Image Compression to Conventional Codecs. CoRR abs/2012.01874 (2020) - 2019
- [i3]Keng-Chi Liu, Yi-Ting Shen, Jan P. Klopp, Liang-Gee Chen:
What Synthesis is Missing: Depth Adaptation Integrated with Weak Supervision for Indoor Scene Parsing. CoRR abs/1903.09781 (2019) - [i2]Everett Fall, Kai-Wei Chang, Liang-Gee Chen:
Dynamically Expanded CNN Array for Video Coding. CoRR abs/1905.04326 (2019) - [i1]Jan P. Klopp, Liang-Gee Chen, Shao-Yi Chien:
Utilising Low Complexity CNNs to Lift Non-Local Redundancies in Video Coding. CoRR abs/1910.08737 (2019)
Coauthor Index
[j106] [j97] [j87] [j83] [j81] [j79] [j77] [j74] [j73] [j70] [j54] [c248] [c235] [c225] [c222] [c221] [c220] [c219] [c208] [c200] [c199] [c198] [c197] [c195] [c194] [c188] [c180] [c179] [c165] [c164] [c163] [c143] [c140] [c137] [c133] [c130] [c127] [c125] [c121] [c106] [c104] [c97] [c92] [c91] [c63]
Yuhan Chen
aka: Yu-Han Chen
aka: Yu-Han Chen
[j109] [j107] [j106] [j104] [j102] [j98] [j96] [j94] [j93] [j90] [j85] [j84] [j82] [j81] [j77] [j74] [j72] [j70] [j69] [j65] [j62] [j51] [j42] [j41] [j34] [j33] [c261] [c260] [c255] [c202] [c201] [c188] [c174] [c173] [c169] [c163] [c157] [c149] [c148] [c142] [c141] [c140] [c138] [c128] [c124] [c118] [c117] [c116] [c100] [c98] [c90] [c82] [c76] [c74] [c70] [c66] [c60] [c59] [c54] [c53] [c51] [c48] [c47] [c45] [c43] [c40] [c37] [c34] [c27] [i5] [i4] [i1]
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