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ORCIDISCAS 2005: Kobe, Japan - Volume 5
- International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. IEEE 2005, ISBN 0-7803-8834-8
- Weerakorn Ongsakul
, Peerapol Jirapong:
Optimal allocation of FACTS devices to enhance total transfer capability using evolutionary programming. 4175-4178 - Vaibhav Donde, Ian A. Hiskens:
Observed hybrid oscillations in an electrical distribution system. 4179-4182 - Garng M. Huang, Nirmal-Kumar C. Nair:
Power flow based allocation procedures for voltage security and transmission losses in deregulated power markets. 4183-4186 - Satish J. Ranade, Ramchander Kolluru, Joydeep Mitra:
Identification of chains of events leading to catastrophic failures of power systems. 4187-4190 - Nader A. Samaan, Chanan Singh:
Using genetic algorithms for reliability calculations of complex power systems. 4191-4195 - William D. Rosehart, Antony Schellenberg, Laleh Behjat, Pouyan Jazayeri, José A. Aguado:
Coordinated static stability margin management of inter-regional electricity systems. 4196-4200 - Timothy K. Horiuchi, Hisham Abdalla:
An ultrasonic filterbank with spiking neurons. 4201-4204 - Pedro Julián, Andreas G. Andreou, Gert Cauwenberghs, Milutin Stanacevic, David H. Goldberg, Pablo Sergio Mandolesi, Laurence Riddle, Shihab Shamma:
Field test results for low power bearing estimator sensor nodes. 4205-4208 - Gabriel Abadal, Jaume Verd, Jordi Teva, Arantxa Uranga, Núria Barniol, Jaume Esteve, Marta Duch, Francesc Pérez-Murano:
High-sensitivity capacitive readout system for resonant submicrometer-scale cantilevers based sensors. 4209-4212 - André van Schaik, Shih-Chii Liu:
AER EAR: a matched silicon cochlea pair with address event representation interface. 4213-4216 - Rock Z. Shi, Timothy K. Horiuchi:
A VLSI model of the bat dorsal nucleus of the lateral lemniscus for azimuthal echolocation. 4217-4220 - Peter R. Kinget, Aurel A. Lazar, László T. Tóth:
On the robustness of an analog VLSI implementation of a time encoding machine. 4221-4224 - Xiaoyin Xu, Xiaowei Chen, Kuang-Yu Liu, Jinmin Zhu, Xiaobo Zhou, Stephen T. C. Wong:
A computer-based system to analyze neuron images. 4225-4228 - Xiaowei Chen, Stephen T. C. Wong:
Automated dynamic cellular analysis in high throughput drug screens. 4229-4232 - Susu Yao, Keng Pang Lim, Xiao Lin, Susanto Rahardja:
A post-processing algorithm using histogram-driven anisotropic diffusion. 4233-4236 - Youngjae Kim, Takashi Morie:
A pixel-parallel anisotropic diffusion algorithm for subjective contour generation. 4237-4240 - Birgir Bjorn Saevarsson, Johannes R. Sveinsson, Jón Atli Benediktsson:
Translation invariant combined denoising algorithm. 4241-4244 - Vishal Gupta, Gabriel A. Rincón-Mora:
A low dropout, CMOS regulator with high PSR over wideband frequencies. 4245-4248 - Q. X. Zhang, Liter Siek:
A new 4.3 ppm/°C voltage reference using standard CMOS process with 1V supply voltage. 4249-4252 - Hongchin Lin, Chao-Jui Liang:
A sub-1V bandgap reference circuit using subthreshold current. 4253-4256 - Simon Rioux, Alain Lacourse, Yvon Savaria, Michel Meunier:
Design methods for CMOS low-current finely tunable voltage references covering a wide output range. 4257-4260 - Mohammad M. Ahmadi, Graham A. Jullien:
A new CMOS charge pump for low voltage applications. 4261-4264 - Nima Maghari, Omid Shoaei:
A dynamic start-up circuit for low voltage CMOS current mirrors with power-down support. 4265-4268 - Jussi-Pekka Jansson, Antti Mäntyniemi, Juha Kostamovaara:
A delay line based CMOS time digitizer IC with 13 ps single-shot precision. 4269-4272 - Enrique Barajas, Luis Elvira, Miguel A. Méndez, Ferran Martorell, Diego Mateo, José Luis González:
Discrete and continuous substrate noise spectrum dependence on digital circuit characteristics. 4273-4276 - Debashis Mandal, Pradip Mandal:
High voltage tolerant output buffer design for mixed voltage interfaces. 4277-4280 - Takanori Komuro, Naoto Hayasaka, Haruo Kobayashi, Hiroshi Sakayori:
A practical BIST circuit for analog portion in deep sub-micron CMOS system LSI. 4281-4284 - Hanjun Jiang, Degang Chen, Randall L. Geiger:
Dither incorporated deterministic dynamic element matching for high resolution ADC test using extremely low resolution DACs. 4285-4288 - Hanqing Xing, Degang Chen, Randall L. Geiger:
A two-step DDEM ADC for accurate and cost-effective DAC testing. 4289-4292 - Morio Ikehara, Yuji Kobayashi:
A novel lattice structure of M-channel paraunitary filter banks. 4293-4296 - Shing-Chow Chan, Kai Man Tsui:
Multi-plet two-channel perfect reconstruction filter banks. 4297-4300 - Lei Zhang, Anamitra Makur, Ce Zhu:
Design of 2-channel linear phase filter bank: a lifting approach. 4301-4304 - Jun Wei Lee, Yong Ching Lim:
A multiplierless filter bank with deep stopband suppression and narrow transition width. 4305-4308 - Sergio L. Netto, Luiz C. R. de Barcellos, Paulo S. R. Diniz:
On a modified structure for cosine-modulated filter banks using the frequency-response masking approach. 4309-4312 - Shishu Yin, Shang Chow Chan:
Factorization of a class of perfect reconstruction modified DFT filter banks with IIR filters. 4313-4316 - S. C. Chan, Z. G. Zhang, K. W. Tse:
A new robust Kalman filter algorithm under outliers and system uncertainties. 4317-4320 - Shing-Chow Chan, Haihua Chen, Ka-Leung Ho:
Adaptive beamforming using uniform concentric circular arrays with frequency invariant characteristics. 4321-4324 - Zhongkai Zhang, Tamal Bose, Jacob H. Gunther:
A unified framework for least square and mean square based adaptive filtering algorithms. 4325-4328 - Marcelo J. Bruno, Juan E. Cousseau, Pedro D. Doñate:
On reduced complexity IIR adaptive filters. 4329-4332 - S. C. Chan, Yi Zhou, W. Y. Lau:
Approximate QR-based algorithms for recursive nonlinear least squares estimation. 4333-4336 - Felix Albu, Hon Keung Kwan:
A new block exact affine projection algorithm [acoustic echo cancellation system example]. 4337-4340 - Sheng-Yu Peng, Bradley A. Minch, Paul E. Hasler:
A programmable floating-gate bump circuit with variable width. 4341-4344 - Serdar Özoguz, Nüfer Yasin Ates, Ahmed S. Elwakil:
An integrated circuit chaotic oscillator and its application for high speed random bit generation. 4345-4348 - Fabio Pareschi, Gianluca Setti, Riccardo Rovatti:
A macro-model for the efficient simulation of an ADC-based RNG. 4349-4352 - Rizwan Murji, M. Jamal Deen:
A low-power wideband frequency doubler in 0.18µm CMOS. 4353-4356 - Haiyan Shu, Lap-Pui Chau:
Frame layer bit allocation for video transcoding. 4357-4360 - Amit Kumar Gupta, Saeid Nooshabadi, David S. Taubman:
Efficient VLSI architecture for buffer used in EBCOT of JPEG2000 encoder. 4361-4364 - Peng Yin, Alexis M. Tourapis, Jill M. Boyce:
Localized weighted prediction for video coding. 4365-4368 - Minqiang Jiang, Nam Ling:
Frame-layer H.264 rate control improvement using Lagrange multiplier and quantizer. 4369-4372 - Amit Kumar Gupta, Saeid Nooshabadi, David S. Taubman:
Optimal 2 sub-bank memory architecture for bit plane coder of JPEG2000. 4373-4376 - Gounyoung Kim, Yeong-Yil Yang, Alexandros Eleftheriadis:
Motion-assisted rate control for ME/MC-based codecs [video coding]. 4377-4380 - Byunghoo Jung, Yi-Hung Tseng, Jackson Harvey, Ramesh Harjani:
Pulse generator design for UWB IR communication systems. 4381-4384 - Anand Gopalan, Tejasvi Das, Clyde Washburn, Ponnathpur R. Mukund:
Use of source degeneration for non-intrusive BIST of RF front-end circuits. 4385-4388 - Hyung-Seuk Kim, Mourad N. El-Gamal:
A 1-V fully integrated CMOS frequency synthesizer for 5-GHz WLAN. 4389-4392 - Byunghoo Jung, Shubha Bommalingaiahnapallya, Ramesh Harjani:
Power optimized LC VCO and mixer co-design. 4393-4396 - Xuefeng Yu, Foster F. Dai, Yin Shi, Ronghua Zhu:
2 GHz 8-bit CMOS ROM-less direct digital frequency synthesizer. 4397-4400 - Sayfe Kiaei, Shahin Mehdizad Taleie, Bertan Bakkaloglu:
Low-power high-Q NEMS receiver architecture. 4401-4404 - Jun Cheng, Alex C. Kot, Jun Liu, Hong Cao:
Steganalysis of data hiding in binary text images. 4405-4408 - Foo Say Wei, Xue Feng, Li Mengyuan:
A blind audio watermarking scheme using peak point extraction. 4409-4412 - Kaliappan Gopalan:
Robust watermarking of music signals by cepstrum modification. 4413-4416 - Fan Gu, Zhe-Ming Lu, Jeng-Shyang Pan:
Multipurpose image watermarking in DCT domain using subsampling. 4417-4420 - Shinji Nakamura, Yasuo Nagazumi:
Programmable matched filter by charge-domain operation. 4421-4424 - Sami Karvonen, Juha Kostamovaara:
Charge-domain FIR sampler with programmable filtering coefficients. 4425-4428 - Yi-Ran Sun, Svante Signell:
Generalized quadrature bandpass sampling with FIR filtering. 4429-4432 - Rafal Karakiewicz, Roman Genov:
Minimal activity mixed-signal VLSI architecture for real-time linear transforms in video. 4433-4436 - Behrouz Nowrouzian, Arthur T. G. Fuller, M. N. S. Swamy:
A novel approach to the exact design of first- and second-order Bode-type variable-amplitude bilinear-LDI switched-capacitor equalizers. 4437-4440 - Srinivasan Venkatesh, Jeff Dugger, Paul E. Hasler:
An adaptive analog synapse circuit that implements the least-mean-square learning rule. 4441-4444 - C. K. Michael Tse, Octavian Dranga, Herbert H. C. Iu:
Bifurcation in parallel-connected buck converters under current-mode control. 4445-4448 - Jianbing Li, Zhongxia Niu, Dongfiang Zhou, Yujie Shi:
Analysis of series-parallel resonant converter with multipliers. 4449-4452 - Gerard Villar, Eduard Alarcón, Jordi Madrenas, Francesc Guinjoan, Alberto Poveda:
Energy optimization of tapered buffers for CMOS on-chip switching power converters. 4453-4456 - Gerard Villar, Eduard Alarcón, Herminio Martínez, Eva Vidal, Sonia Porta, Francesc Guinjoan, Alberto Poveda:
Multi-mode controller CMOS integrated circuit for switching power converters. 4457-4460 - Hirak Patangia, Tandi Wijaya, Dennis Gregory:
A multi-level inverter for driving a high voltage display. 4461-4464 - Stephan Lang, Babak Daneshrad:
From architecture to implementation of a wireless, multiple antenna testbed. 4465-4468 - Tord Johnson, Johnny Holmberg:
Nonlinear state-space model of charge-pump based frequency synthesizers. 4469-4472 - Dinesh Divakaran, Vijay K. Jain:
Channel estimation for a new high performance MIMO STC-OFDM WLAN system. 4473-4476 - Jaehyun Baek, Ju Hyung Hong, Myung Hoon Sunwoo:
Novel digital signal processing unit for Ethernet receiver. 4477-4480 - Ediz Çetin, Izzet Kale, Richard C. S. Morling:
Joint compensation of IQ-imbalance and carrier phase synchronization errors in communication receivers. 4481-4484 - S. I. Ahmed, Tad A. Kwasniewski:
An all-digital data recovery circuit optimization using Matlab/Simulink. 4485-4488 - Fredrik Edman, Viktor Öwall:
A scalable pipelined complex valued matrix inversion architecture. 4489-4492 - Michael H. F. Leung, Francis Chung-Ming Lau:
Testing system for measuring and calibrating the transmission power of EDGE mobiles. 4493-4496 - Ryosuke Fujiwara, M. Shida, Akira Maeki, Kenichi Mizugaki, Masaru Kokubo, Masayuki Miyazaki:
Rapid signal acquisition for low-rate carrier-based ultra-wideband impulse radio. 4497-4500 - Xiaoyu Ruan, Rajendra S. Katti:
On the signed-binary window method [cryptosystem applications]. 4501-4504 - Der-Feng Tseng:
A low-complexity iterative interference suppressor for coded aperiodic spreading CDMA systems. 4505-4508 - Hideaki Okazaki, Chiho Okazaki, Hirohiko Honda, Takuji Kawamoto:
Simulink based model realization for CDMA communication over power lines. 4509-4512 - Ramkrishna Swamy, Stephen Bates, Tyler L. Brandon:
Architectures for ASIC implementations of low-density parity-check convolutional encoders and decoders. 4513-4516 - Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang:
An efficient direct 2-D transform coding IP design for MPEG-4 AVC/H.264. 4517-4520 - Yan-Chen Lu, Chun-Fu Shen, Chi-Kuang Chen, Ju-Lung Fann:
Performance-driven optimization for video accelerator design [video coding]. 4521-4524 - Jian-Wen Chen, Cheng-Ru Chang, Youn-Long Lin:
A hardware accelerator for context-based adaptive binary arithmetic decoding in H.264/AVC. 4525-4528 - Sheng-Yu Shih, Cheng-Ru Chang, Youn-Long Lin:
An AMBA-compliant deblocking filter IP for H.264/AVC. 4529-4532 - YuLong Fan, ChingYao Huang, YuRu Hong:
Timer based scheduling control algorithm in WLAN for real-time services. 4533-4537 - Kouji Miyata, Akira Taguchi:
A novel MPEG-4 rate control method with spatial resolution conversion for low bit-rate coding. 4538-4541 - Chih-Da Chien, Ho-Chun Chen, Lin-Chieh Huang, Jiun-In Guo:
A low-power motion compensation IP core design for MPEG-1/2/4 video decoding. 4542-4545 - Kyusik Chung, Donghyun Kim, Lee-Sup Kim:
A 3-way SIMD engine for programmable triangle setup in embedded 3D graphics hardware. 4546-4549 - Chen-Wei Fan, Feng-Cheng Chang, Hsueh-Ming Hang:
An MPEG-4 IPMPX design and implementation on MPEG-21 test bed. 4550-4553 - Jen-Shiun Chiang, Chih-Hsien Hsia, Hsin-Jung Chen, Te-Jung Lo:
VLSI architecture of low memory and high speed 2D lifting-based discrete wavelet transform for JPEG2000 applications. 4554-4557 - Sheng-Zen Wang, Ting-An Lin, Tsu-Ming Liu, Chen-Yi Lee:
A new motion compensation design for H.264/AVC decoder. 4558-4561 - Ming-Sui Lee, Mei-Yin Shen, Akio Yoneyama, C.-C. Jay Kuo:
DCT-domain image registration techniques for compressed video. 4562-4565 - Mladen Panovic, Andreas Demosthenous:
Architectures for analog motion estimation processors: a comparison. 4566-4569 - Jaewan Bae, Donghyun Kim, Lee-Sup Kim:
An 11M-triangles/sec 3D graphics clipping engine for triangle primitives. 4570-4573 - Chang-Hyo Yu, Donghyun Kim, Lee-Sup Kim:
A 33.2M vertices/sec programmable geometry engine for multimedia embedded systems. 4574-4577 - Yeong-Kang Lai, Lien-Fei Chen, Jian-Chou Chen, Chun-Wei Chiu:
A two-way SIMD-based reconfigurable computing architecture for multimedia applications. 4578-4581 - Haiyan Shu, Lap-Pui Chau:
A new scene change feature for video transcoding. 4582-4585 - Kam-Fai Lo, Kin-Man Lam:
A new cubic rate distortion model for low-delay video communication. 4586-4589 - Tsung-Han Tsai, Yung-Chien Chen:
A robust shot change detection method for content-based retrieval. 4590-4593 - Jen-Hao Yeh, Jun-Cheng Chen, Jin-Hau Kuo, Ja-Ling Wu:
TV commercial detection in news program videos. 4594-4597 - Xiaodan Song, Ching-Yung Lin, Ming-Ting Sun:
Autonomous learning of visual concept models. 4598-4601 - Min-wuk Lee, Byeong-Gyu Nam, Ju-Ho Sohn, Namjun Cho, Hyejung Kim, Kwanho Kim, Hoi-Jun Yoo:
A fixed-point 3D graphics library with energy-efficient cache architecture for mobile multimedia systems. 4602-4605 - Frank H. Hsiao, Terng-Yin Hsu:
A frequency domain equalizer for WLAN 802.11g single-carrier transmission mode. 4606-4609 - Safar Hatami, Reshad Hosseini, Mahmoud Kamarei, Hossein Ahmadi:
Wavelet based fingerprint image enhancement. 4610-4613 - Jannik Hammel Nielsen, Pietro Andreani, Piero Malcovati, Andrea Baschirotto:
Technology scaling impact on embedded ADC design for telecom receivers. 4614-4617 - Reza Lotfi, Mohammad Taherzadeh-Sani, Omid Shoaei:
Power consumption issues in high-speed high-resolution pipelined A/D converters. 4618-4621 - Jaana Riikonen, Mikko Aho, Väinö Hakkarainen, Kari Halonen, Lauri Sumanen:
A 10-bit 400-MS/s 170 mW 4-times interleaved A/D converter in 0.35µm BiCMOS. 4622-4625 - Manuel Delgado-Restituto, Jesús Ruiz-Amaya, José M. de la Rosa, Juan Francisco Fernández-Bootello, Leila Díez, Rocío del Río Fernández, Ángel Rodríguez-Vázquez:
An embedded 12-bit 80MS/s A/D/A interface for power-line communications in 0.13µm pure digital CMOS technology. 4626-4629 - Shubha Bommalingaiahnapallya, Ramesh Harjani:
Process tolerant design of N-tone Sigma-Delta converters. 4630-4633 - Hua Li:
A new CAM based S/S-1-box look-up table in AES. 4634-4636 - Hua Li, Zachary Friggstad:
An efficient architecture for the AES mix columns operation. 4637-4640 - Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou:
A RAM-based FPGA implementation of the 64-bit MISTY1 block cipher. 4641-4644 - Apostolos P. Fournaris, Odysseas G. Koufopavlou:
A new RSA encryption architecture and hardware implementation based on optimized Montgomery multiplication. 4645-4648 - Yonghong Yang, Zine Abid, Wei Wang, Z. Zhang, C. Yang:
Efficient multi-prime RSA immune against hardware fault attack. 4649-4652