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Hao-Chieh Chang
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2010 – 2019
- 2011
- [j4]Tein-Yaw Chung, Hao-Chieh Chang, Hsiao-Chih George Lee:
A novel cross-layer mesh router placement scheme for wireless mesh networks. EURASIP J. Wirel. Commun. Netw. 2011: 134 (2011)
2000 – 2009
- 2003
- [j3]Chung-Jr Lian, Zhong-Lan Yang, Hao-Chieh Chang, Liang-Gee Chen:
Hardware-Efficient Architecture Design for Zerotree Coding in MPEG-4 Still Texture Coder. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(2): 472-479 (2003) - 2002
- [j2]Hao-Chieh Chang, Yung-Chi Chang, Yi-Chu Wang, Wei-Ming Chao, Liang-Gee Chen:
VLSI architecture design of MPEG-4 shape coding. IEEE Trans. Circuits Syst. Video Technol. 12(9): 741-751 (2002) - 2001
- [c11]Chung-Jr Lian, Liang-Gee Chen, Hao-Chieh Chang, Yung-Chi Chang:
Design and implementation of JPEG encoder IP core. ASP-DAC 2001: 29-30 - [c10]Yung-Chi Chang, Chao-Chih Huang, Hao-Chieh Chang, Hung-Chi Fang, Liang-Gee Chen:
Error-Propagation Analysis and Concealment Strategy for MPEG-4 Video Bitstream with Data Partitioning. ICME 2001 - [c9]Hao-Chieh Chang, Zhong-Lan Yang, Chung-Jr Lian, Liang-Gee Chen:
Hardware-efficient architecture design of tree-depth scanning and multiple quantization scheme for MPEG-4 still texture coding. ISCAS (2) 2001: 193-196 - [c8]Mei-Yun Hsu, Hao-Chieh Chang, Yi-Chu Wang, Liang-Gee Chen:
Scalable module-based architecture for MPEG-4 BMA motion estimation. ISCAS (2) 2001: 245-248 - [c7]Yi-Chu Wang, Hao-Chieh Chang, Wei-Ming Chao, Liang-Gee Chen:
Efficient architecture of binary motion estimation for MPEG-4 shape coding. VCIP 2001: 959-967 - 2000
- [j1]Hao-Chieh Chang, Jiun-Ying Jiu, Li-Lin Chen, Liang-Gee Chen:
A Low Power 8 x 8 Direct 2-D DCT Chip Design. J. VLSI Signal Process. 26(3): 319-332 (2000) - [c6]Hao-Chieh Chang, Yung-Chi Chang, Yuan-Bin Tsai, Chih-Peng Fan, Liang-Gee Chen:
MPEG-4 video bitstream structure analysis and its parsing architecture design. ISCAS 2000: 184-187 - [c5]Hao-Chieh Chang, Liang-Gee Chen, Mei-Yun Hsu, Yung-Chi Chang:
Performance analysis and architecture evaluation of MPEG-4 video codec system. ISCAS 2000: 449-452
1990 – 1999
- 1999
- [c4]Sheng-Chieh Huang, Liang-Gee Chen, Hao-Chieh Chang:
A novel image compression algorithm by using Log-Exp transform. ISCAS (4) 1999: 17-20 - [c3]Jun-Fu Shen, Liang-Gee Chen, Hao-Chieh Chang, Tu-Chih Wang:
Low power full-search block-matching motion estimation chip for H.263+. ISCAS (4) 1999: 299-302 - [c2]Hao-Chieh Chang, Liang-Gee Chen, Yung-Chi Chang, Sheng-Chieh Huang:
A VLSI architecture design of VLC encoder for high data rate video/image coding. ISCAS (4) 1999: 398-401 - 1998
- [c1]Liang-Gee Chen, Juing-Ying Jiu, Hao-Chieh Chang, Yung-Pin Lee, Chung-Wei Ku:
A Low Power 2-D DCT Chip Design Using Direct 2-D Algorithm. ASP-DAC 1998: 145-150
Coauthor Index
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