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ORCIDISLPED 2018: Seattle, WA, USA
- Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED 2018, Seattle, WA, USA, July 23-25, 2018. ACM 2018, ISBN 978-1-4503-5704-3
Machine Learning - Inference
- Zhiyuan Yang, Ankur Srivastava
:
Value-driven Synthesis for Neural Network ASICs. 1:1-1:6 - Zhe Chen, Andrew Howe, Hugh T. Blair, Jason Cong:
CLINK: Compact LSTM Inference Kernel for Energy Efficient Neurofeedback Devices. 2:1-2:6 - Jinseok Kim, Yulhwa Kim, Sungho Kim, Jae-Joon Kim:
Compact Convolution Mapping on Neuromorphic Hardware using Axonal Delay. 3:1-3:6 - Liu Ke, Xin He, Xuan Zhang:
NNest: Early-Stage Design Space Exploration Tool for Neural Network Inference Accelerators. 4:1-4:6
Hardware Security
- Sheng Zhang, Adrian Tang, Zhewei Jiang, Simha Sethumadhavan, Mingoo Seok:
Blacklist Core: Machine-Learning Based Dynamic Operating-Performance-Point Blacklisting for Mitigating Power-Management Security Attacks. 5:1-5:6 - Anirudh Srikant Iyengar, Deepak Vontela, Ithihasa Reddy Nirmala, Swaroop Ghosh, Seyedhamidreza Motaman, Jae-Won Jang:
Threshold Defined Camouflaged Gates in 65nm Technology for Reverse Engineering Protection. 6:1-6:6 - Pramesh Pandey, Asmita Pal, Koushik Chakraborty, Sanghamitra Roy:
Reliability and Uniformity Enhancement in 8T-SRAM based PUFs operating at NTC. 7:1-7:6 - Hongxiang Gu, Miodrag Potkonjak:
Efficient and Secure Group Key Management in IoT using Multistage Interconnected PUF. 8:1-8:6
Energy Efficient Wireline Circuits
- Lejie Lu, Yong Wang, Hui Wu:
An Energy-Efficient High-Swing PAM-4 Voltage-Mode Transmitter. 9:1-9:6 - Jae-Whan Lee, Joo-Hyung Chae, Jihwan Park, Hyunkyu Park, Jaekwang Yun, Suhwan Kim:
Energy-Efficient Dynamic Comparator with Active Inductor for Receiver of Memory Interfaces. 10:1-10:6 - Jeongho Hwang, Hong-Seok Choi, Hyungrok Do, Gyu-Seob Jeong, Daehyun Koh, Seong Ho Park, Deog-Kyoon Jeong:
4-Channel Push-Pull VCSEL Drivers for HDMI Active Optical Cable in 0.18-μm CMOS. 11:1-11:6
Approximate Computing
- Mohsen Imani, Ricardo Garcia, Saransh Gupta, Tajana Rosing:
RMAC: Runtime Configurable Floating Point Multiplier for Approximate Computing. 12:1-12:6 - Sarvenaz Tajasob, Morteza Rezaalipour, Masoud Dehyadegari, Mahdi Nazm Bojnordi:
Designing Efficient Imprecise Adders using Multi-bit Approximate Building Blocks. 13:1-13:6 - Marzieh Vaeztourshizi, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram:
An Energy-Efficient, Yet Highly-Accurate, Approximate Non-Iterative Divider. 14:1-14:6
Architectural Techniques
- Gokul Subramanian Ravi, Mikko H. Lipasti:
Aggressive Slack Recycling via Transparent Pipelines. 15:1-15:6 - Martin Rapp, Anuj Pathania, Jörg Henkel:
Pareto-Optimal Power- and Cache-Aware Task Mapping for Many-Cores with Distributed Shared Last-Level Cache. 16:1-16:6 - Hossein Farrokhbakht, Hadi Mardani Kamali, Natalie D. Enright Jerger, Shaahin Hessabi:
SPONGE: A Scalable Pivot-based On/Off Gating Engine for Reducing Static Power in NoC Routers. 17:1-17:6
Machine Learning - Training
- Swagath Venkataramani, Vijayalakshmi Srinivasan, Jungwook Choi, Kailash Gopalakrishnan, Leland Chang:
Taming the beast: Programming Peta-FLOP class Deep Learning Systems. 18:1 - Seungkyu Choi, Jaehyeong Sim, Myeonggu Kang, Lee-Sup Kim:
TrainWare: A Memory Optimized Weight Update Architecture for On-Device Convolutional Neural Network Training. 19:1-19:6 - Xin He, Liu Ke, Wenyan Lu, Guihai Yan, Xuan Zhang:
AxTrain: Hardware-Oriented Neural Network Training for Approximate Inference. 20:1-20:6 - Gyuseong Kang, Yunho Jang, Jongsun Park:
Spin Orbit Torque Device based Stochastic Multi-bit Synapses for On-chip STDP Learning. 21:1-21:6
Non-volatile Memory
- Tyler Garrett, Jun Yang, Youtao Zhang:
Enabling Intra-Plane Parallel Block Erase in NAND Flash to Alleviate the Impact of Garbage Collection. 22:1-22:6 - Shuo-Han Chen, Yuan-Hao Chang, Tseng-Yi Chen, Yu-Ming Chang, Pei-Wen Hsiao, Hsin-Wen Wei, Wei-Kuan Shih:
Enhancing the Energy Efficiency of Journaling File System via Exploiting Multi-Write Modes on MLC NVRAM. 23:1-23:6 - Dayane Alfenas Reis, Michael T. Niemier, Xiaobo Sharon Hu:
Computing in memory with FeFETs. 24:1-24:6 - Mohammad Nasim Imtiaz Khan, Swaroop Ghosh:
Information Leakage Attacks on Emerging Non-Volatile Memory and Countermeasures. 25:1-25:6
Energy-efficient Parallelism
- Zhenhong Liu, Daniel Wong, Nam Sung Kim:
Load-Triggered Warp Approximation on GPU. 26:1-26:6 - Minxuan Zhou, Mohsen Imani, Saransh Gupta, Tajana Rosing:
GAS: A Heterogeneous Memory Architecture for Graph Processing. 27:1-27:6 - Tahmoures Shabanian, Aatreyi Bal, Prabal Basu, Koushik Chakraborty, Sanghamitra Roy:
ACE-GPU: Tackling Choke Point Induced Performance Bottlenecks in a Near-Threshold Computing GPU. 28:1-28:6
Self-powered Devices
- Chih-Kai Kang, Chun-Han Lin, Pi-Cheng Hsiu, Ming-Syan Chen:
HomeRun: HW/SW Co-Design for Program Atomicity on Self-Powered Intermittent Systems. 29:1-29:6 - Cheng-Ting Lee, Yun-Hao Liang, Pai H. Chou, Ali Heydari Gorji, Seyede Mahya Safavi, Wen-Chan Shih, Wen-Tsuen Chen:
EcoMicro: A Miniature Self-Powered Inertial Sensor Node Based on Bluetooth Low Energy. 30:1-30:6 - Sandeep Krishna Thirumala, Arnab Raha, Hrishikesh Jayakumar, Kaisheng Ma, Narayanan Vijaykrishnan, Vijay Raghunathan, Sumeet Kumar Gupta:
Dual Mode Ferroelectric Transistor based Non-Volatile Flip-Flops for Intermittently-Powered Systems. 31:1-31:6
Design and 3D Integration
- Arijit Banerjee, Sumanth Kamineni, Benton H. Calhoun:
Multiple Combined Write-Read Peripheral Assists in 6T FinFET SRAMs for Low-VMIN IoT and Cognitive Applications. 32:1-32:6 - Kyungwook Chang, Sai Pentapati, Da Eun Shim, Sung Kyu Lim:
Road to High-Performance 3D ICs: Performance Optimization Methodologies for Monolithic 3D ICs. 33:1-33:6 - Srivatsa Rangachar Srinivasa, Akshay Krishna Ramanathan, Xueqing Li, Wei-Hao Chen, Fu-Kuo Hsueh, Chih-Chao Yang, Chang-Hong Shen, Jia-Min Shieh, Sumeet Kumar Gupta, Meng-Fan Marvin Chang, Swaroop Ghosh, Jack Sampson, Vijaykrishnan Narayanan:
A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support. 34:1-34:6
Industry ML/AI Compute
- Vijayalakshmi Srinivasan, Bruce M. Fleischer, Sunil Shukla, Matthew M. Ziegler, Joel Silberman, Jinwook Oh, Jungwook Choi, Silvia M. Mueller, Ankur Agrawal, Tina Babinsky, Nianzheng Cao, Chia-Yu Chen, Pierce Chuang, Thomas W. Fox, George Gristede, Michael Guillorn, Howard Haynie, Michael J. Klaiber, Dongsoo Lee, Shih-Hsien Lo, Gary W. Maier, Michael Scheuermann, Swagath Venkataramani, Christos Vezyrtzis, Naigang Wang, Fanchieh Yee, Ching Zhou, Pong-Fei Lu, Brian W. Curran, Leland Chang, Kailash Gopalakrishnan:
Across the Stack Opportunities for Deep Learning Acceleration. 35:1-35:2
Mobile Applications
- Jihoon Park, Seokjun Lee, Hojung Cha:
App-Oriented Thermal Management of Mobile Devices. 36:1-36:6 - Zirui Xu, Zhuwei Qin, Fuxun Yu, Chenchen Liu, Xiang Chen:
DiReCt: Resource-Aware Dynamic Model Reconfiguration for Convolutional Neural Network in Mobile Systems. 37:1-37:6
Posters
- Ke Xu, Yu Li, Bo Huang, Xiangkai Liu, Hong Wang, Zhuoyan Wu, Zhanpeng Yan, Xueying Tu, Tongqing Wu, Daibing Zeng:
A Low-power 4096x2160@30fps H.265/HEVC Video Encoder for Smart Video Surveillance. 38:1-38:6 - Mohammad Reza Mahmoodi, Dmitri B. Strukov:
Breaking POps/J Barrier with Analog Multiplier Circuits Based on Nonvolatile Memories. 39:1-39:6 - Jia Guo, Hongxiang Gu, Miodrag Potkonjak:
Efficient Image Sensor Subsampling for DNN-Based Image Classification. 40:1-40:6 - Yulhwa Kim, Hyungjun Kim, Daehyun Ahn, Jae-Joon Kim:
Input-Splitting of Large Neural Networks for Power-Efficient Accelerator with Resistive Crossbar Memory Array. 41:1-41:6 - Artem Aleksandrovich Andreev, Fulya Kaplan, Marina Zapater, Ayse K. Coskun, David Atienza:
Design Optimization of 3D Multi-Processor System-on-Chip with Integrated Flow Cell Arrays. 42:1-42:6 - Swaminathan Narayanaswamy, Sangyoung Park, Sebastian Steinhorst, Samarjit Chakraborty:
Multi-Pattern Active Cell Balancing Architecture and Equalization Strategy for Battery Packs. 43:1-43:6 - Ahish Shylendra, Swarup Bhunia, Amit Ranjan Trivedi:
Intrinsic and Database-free Watermarking in ICs by Exploiting Process and Design Dependent Variability in Metal-Oxide-Metal Capacitances. 44:1-44:6 - Sumanta Pyne:
Scheduling of Hybrid Battery-Supercapacitor Control Instructions for Longevity in Systems with Power Gating. 45:1-45:6 - Dongkwun Kim, Mingoo Seok:
Better-Than-Worst-Case Design Methodology for a Compact Integrated Switched-Capacitor DC-DC Converter. 46:1-46:6 - Daniele Jahier Pagliari, Enrico Macii, Massimo Poncino:
Dynamic Bit-width Reconfiguration for Energy-Efficient Deep Learning Hardware. 47:1-47:6 - Mahdi Nazemi, Massoud Pedram:
Deploying Customized Data Representation and Approximate Computing in Machine Learning Applications. 48:1-48:6 - Donkyu Baek, Yukai Chen, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino:
Battery-Aware Energy Model of Drone Delivery Tasks. 49:1-49:6 - Li Yang, Zhezhi He, Deliang Fan:
A Fully Onchip Binarized Convolutional Neural Network FPGA Impelmentation with Accurate Inference. 50:1-50:6 - Ankit Mondal, Ankur Srivastava:
In-situ Stochastic Training of MTJ Crossbar based Neural Networks. 51:1-51:6 - Ioannis Tsiokanos, Lev Mukhanov, Dimitrios S. Nikolopoulos, Georgios Karakonstantis:
Variation-Aware Pipelined Cores through Path Shaping and Dynamic Cycle Adjustment: Case Study on a Floating-Point Unit. 52:1-52:6 - Sana Arshad, Azam Beg, Rashad Ramzan:
A 2.6 mW Single-Ended Positive Feedback LNA for 5G Applications. 53:1-53:5
Far-out Ideas
- Louis K. Scheffer:
Insights from Biology: Low Power Circuits in the Fruit Fly. 54:1-54:3
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