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ORCIDIEEE Computer Architecture Letters, Volume 22
Volume 22, Number 1, January - June 2023
- Gyeongseo Park
, Ki-Dong Kang, Minho Kim, Daehoon Kim:
CoreNap: Energy Efficient Core Allocation for Latency-Critical Workloads. 1-4 - Joonseop Sim, Soohong Ahn, Taeyoung Ahn, Seungyong Lee, Myunghyun Rhee, Jooyoung Kim, Kwangsik Shin, Donguk Moon, Euiseok Kim, Kyoung Park:
Computational CXL-Memory Solution for Accelerating Memory-Intensive Applications. 5-8 - Burkhard Ringlein, François Abel, Dionysios Diamantopoulos, Beat Weiss, Christoph Hagleitner, Dietmar Fey:
Advancing Compilation of DNNs for FPGAs Using Operation Set Architectures. 9-12 - Seonho Lee, Ranggi Hwang, Jongse Park, Minsoo Rhu:
HAMMER: Hardware-Friendly Approximate Computing for Self-Attention With Mean-Redistribution And Linearization. 13-16 - Daniel A. Jiménez, Elvira Teran, Paul V. Gratz:
Last-Level Cache Insertion and Promotion Policy in the Presence of Aggressive Prefetching. 17-20 - Yaebin Moon, Wanju Doh, Kwanhee Kyung, Eojin Lee, Jung Ho Ahn:
ADT: Aggressive Demotion and Promotion for Tiered Memory. 21-24 - Hanyeoreum Bae, Donghyun Gouk, Seungjun Lee, Jiseon Kim, Sungjoon Koh, Jie Zhang, Myoungsoo Jung:
Intelligent SSD Firmware for Zero-Overhead Journaling. 25-28 - Xia Zhao, Guangda Zhang, Lu Wang, Yangmei Li, Yongjun Zhang:
RouteReplies: Alleviating Long Latency in Many-Chip-Module GPUs. 29-32 - Kevin Weston, Farabi Mahmud, Vahid Janfaza, Abdullah Muzahid:
SmartIndex: Learning to Index Caches to Improve Performance. 33-36 - Soroosh Khoram, Kyle Daruwalla, Mikko H. Lipasti:
Energy-Efficient Bayesian Inference Using Bitstream Computing. 37-40 - Jennifer Brana, Brian C. Schwedock, Yatin A. Manerkar, Nathan Beckmann:
Kobold: Simplified Cache Coherence for Cache-Attached Accelerators. 41-44 - Jackson Melchert, Keyi Zhang, Yuchen Mei, Mark Horowitz, Christopher Torng, Priyanka Raina:
Canal: A Flexible Interconnect Generator for Coarse-Grained Reconfigurable Arrays. 45-48 - Samer Kurzum, Gil Shomron, Freddy Gabbay, Uri C. Weiser:
Enhancing DNN Training Efficiency Via Dynamic Asymmetric Architecture. 49-52 - Anurag Kar, Xueyang Liu, Yonghae Kim, Gururaj Saileshwar, Hyesoon Kim, Tushar Krishna:
Mitigating Timing-Based NoC Side-Channel Attacks With LLC Remapping. 53-56 - Pengzhou He, Yazheng Tu, Çetin Kaya Koç, Jiafeng Xie:
Hardware-Implemented Lightweight Accelerator for Large Integer Polynomial Multiplication. 57-60 - Jueon Park, Hyojin Sung:
XLA-NDP: Efficient Scheduling and Code Generation for Deep Learning Model Training on Near-Data Processing Memory. 61-64 - David Andrew Roberts, Haojie Ye, Tony Brewer, Sean Eilert:
In-Memory Versioning (IMV). 65-68 - Shiqing Zhang, Mahmood Naderan-Tahan, Magnus Jahre, Lieven Eeckhout:
Balancing Performance Against Cost and Sustainability in Multi-Chip-Module GPUs. 145-148 - Chanyoung Park, Chun-Yi Liu, Kyungtae Kang, Mahmut T. Kandemir, Wonil Choi:
Design of a High-Performance, High-Endurance Key-Value SSD for Large-Key Workloads. 149-152 - Jie Liu, Zhongyuan Zhao, Zijian Ding, Benjamin Brock, Hongbo Rong, Zhiru Zhang:
An Intermediate Language for General Sparse Format Customization. 153-156 - Seunghak Lee, Ki-Dong Kang, Gyeongseo Park, Nam Sung Kim, Daehoon Kim:
NoHammer: Preventing Row Hammer With Last-Level Cache Management. 157-160 - Pau Escofet, Anabel Ovide, Carmen G. Almudéver, Eduard Alarcón, Sergi Abadal:
Hungarian Qubit Assignment for Optimized Mapping of Quantum Circuits on Multi-Core Architectures. 161-164
Volume 22, Number 2, July - December 2023
- Kiseok Jeon, Junghee Lee, Bumsoo Kim, James J. Kim:
Hardware Accelerated Reusable Merkle Tree Generation for Bitcoin Blockchain Headers. 69-72 - Hwanjun Lee, Seunghak Lee, Yeji Jung, Daehoon Kim:
T-CAT: Dynamic Cache Allocation for Tiered Memory Systems With Memory Interleaving. 73-76 - Ipoom Jeong, Jiaqi Lou, Yongseok Son, Yongjoo Park, Yifan Yuan, Nam Sung Kim:
LADIO: Leakage-Aware Direct I/O for I/O-Intensive Workloads. 77-80 - Chandana S. Deshpande, Arthur Perais, Frédéric Pétrot:
Toward Practical 128-Bit General Purpose Microarchitectures. 81-84 - Achilleas Tzenetopoulos, Dimosthenis Masouros, Dimitrios Soudris, Sotirios Xydis:
DVFaaS: Leveraging DVFS for FaaS Workflows. 85-88 - Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn:
X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands. 89-92 - Ahmed Nematallah, Chang Hyun Park, David Black-Schaffer:
Exploring the Latency Sensitivity of Cache Replacement Policies. 93-96 - Fernando Mosquera, Krishna Kavi, Gayatri Mehta, Lizy K. John:
Guard Cache: Creating Noisy Side-Channels. 97-100 - Jason Mars, Yiping Kang, Roland Daynauth, Baichuan Li, Ashish Mahendra, Krisztián Flautner, Lingjia Tang:
The Jaseci Programming Paradigm and Runtime Stack: Building Scale-Out Production Applications Easy and Fast. 101-104 - Naorin Hossain, Alper Buyuktosunoglu, John-David Wellman, Pradip Bose, Margaret Martonosi:
SoCurity: A Design Approach for Enhancing SoC Security. 105-108 - Justin Feng, Fatemeh Arkannezhad, Christopher Ryu, Enoch Huang, Siddhant Gupta, Nader Sehatbakhsh:
Simulating Our Way to Safer Software: A Tale of Integrating Microarchitecture Simulation and Leakage Estimation Modeling. 109-112 - Jaewan Choi, Jaehyun Park, Kwanhee Kyung, Nam Sung Kim, Jung Ho Ahn:
Unleashing the Potential of PIM: Accelerating Large Batched Inference of Transformer-Based Generative Models. 113-116 - Yonghae Kim, Anurag Kar, Jaewon Lee, Jaekyu Lee, Hyesoon Kim:
Hardware-Assisted Code-Pointer Tagging for Forward-Edge Control-Flow Integrity. 117-120 - Gururaj Saileshwar, Moinuddin K. Qureshi:
The Mirage of Breaking MIRAGE: Analyzing the Modeling Pitfalls in Emerging "Attacks" on MIRAGE. 121-124 - Yun-Chen Lo, Yu-Chih Tsai, Ren-Shuo Liu:
LV: Latency-Versatile Floating-Point Engine for High-Performance Deep Neural Networks. 125-128 - Maziar Goudarzi, Reza Azimi, Julian Humecki, Faizaan Rehman, Richard Zhang, Chirag Sethi, Tanishq Bomman, Yuqi Yang:
By-Software Branch Prediction in Loops. 129-132 - Yugyoung Yun, Eunhyeok Park:
Fast Performance Prediction for Efficient Distributed DNN Training. 133-136 - Meng Wu, Mingyu Yan, Xiaocheng Yang, Wenming Li, Zhimin Zhang, Xiaochun Ye, Dongrui Fan:
Characterizing and Understanding Defense Methods for GNNs on GPUs. 137-140 - Pratyush Patel, Zibo Gong, Syeda Rizvi, Esha Choukse, Pulkit A. Misra, Thomas E. Anderson, Akshitha Sriraman:
Towards Improved Power Management in Cloud GPUs. 141-144 - Lingfei Lu, Yudi Qiu, Shiyan Yi, Yibo Fan:
A Flexible Embedding-Aware Near Memory Processing Architecture for Recommendation System. 165-168 - Hailong Li, Jaewan Choi, Yongsuk Kwon, Jung Ho Ahn:
A Hardware-Friendly Tiled Singular-Value Decomposition-Based Matrix Multiplication for Transformer-Based Models. 169-172 - Adam Hastings, Ryan Piersma, Simha Sethumadhavan:
Architectural Security Regulation. 173-176 - Theodoros Trochatos, Chuanqi Xu, Sanjay Deshpande, Yao Lu, Yongshan Ding, Jakub Szefer:
A Quantum Computer Trusted Execution Environment. 177-180 - Peiyun Wu, Trung Le, Zhichun Zhu, Zhao Zhang:
Redundant Array of Independent Memory Devices. 181-184 - Jonathan Garcia-Mallen, Shuohao Ping, Alex Miralles-Cordal, Ian Martin, Mukund Ramakrishnan, Yipeng Huang:
Towards an Accelerator for Differential and Algebraic Equations Useful to Scientists. 185-188
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