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H.-S. Philip Wong
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Publications
- 2023
- [j33]Gert Cauwenberghs, Jason Cong, X. Sharon Hu, Siddharth Joshi, Subhasish Mitra, Wolfgang Porod, H.-S. Philip Wong:
Micro/Nano Circuits and Systems Design and Design Automation: Challenges and Opportunities. Proc. IEEE 111(6): 561-574 (2023) - [c73]Gregory Pitner, Nathaniel Safron, Tzu-Ang Chao, Shengman Li, Sheng-Kai Su, Gilad Zeevi, Qing Lin, Hsin-Yuan Chiu, Matthias Passlack, Zichen Zhang, D. Mahaveer Sathaiya, Aslan Wei, Carlo Gilardi, Edward Chen, San Lin Liew, Vincent D.-H. Hou, Chung-Wei Wu, Jeff Wu, Zhiwei Lin, Jeffrey Fagan, Ming Zheng, Han Wang, Subhasish Mitra, H.-S. Philip Wong, Iuliana P. Radu:
Building high performance transistors on carbon nanotube channel. VLSI Technology and Circuits 2023: 1-2 - 2022
- [i14]Richard A. Gottscho, Edlyn V. Levine, Tsu-Jae King Liu, Paul C. McIntyre, Subhasish Mitra, Boris Murmann, Jan M. Rabaey, Sayeef S. Salahuddin, Willy C. Shih, H.-S. Philip Wong:
Innovating at Speed and at Scale: A Next Generation Infrastructure for Accelerating Semiconductor Technologies. CoRR abs/2204.02216 (2022) - 2020
- [j29]H.-S. Philip Wong, Kerem Akarvardar, Dimitri A. Antoniadis, Jeffrey Bokor, Chenming Hu, Tsu-Jae King Liu, Subhasish Mitra, James D. Plummer, Sayeef S. Salahuddin:
A Density Metric for Semiconductor Technology [Point of View]. Proc. IEEE 108(4): 478-482 (2020) - [j28]H.-S. Philip Wong, Kerem Akarvardar, Dimitri A. Antoniadis, Jeffrey Bokor, Chenming Hu, Tsu-Jae King Liu, Subhasish Mitra, James D. Plummer, Sayeef S. Salahuddin, Lei Deng, Xin-Guo Li, Song Han, Luping Shi, Yuan Xie, Elias Yaacoub, Mohamed-Slim Alouini, Ahmed Douik, Hayssam Dahrouj, Tareq Y. Al-Naffouri:
Scanning the Issue. Proc. IEEE 108(4): 483-484 (2020) - 2019
- [j27]Mindy D. Bishop, H.-S. Philip Wong, Subhasish Mitra, Max M. Shulaker:
Monolithic 3-D Integration. IEEE Micro 39(6): 16-27 (2019) - [j26]Mohamed M. Sabry Aly, Tony F. Wu, Andrew Bartolo, Yash H. Malviya, William Hwang, Gage Hills, Igor L. Markov, Mary Wootters, Max M. Shulaker, H.-S. Philip Wong, Subhasish Mitra:
The N3XT Approach to Energy-Efficient Abundant-Data Computing. Proc. IEEE 107(1): 19-48 (2019) - [c57]Tony F. Wu, Binh Q. Le, Robert M. Radway, Andrew Bartolo, William Hwang, Seungbin Jeong, Haitong Li, Pulkit Tandon, Elisa Vianello, Pascal Vivet, Etienne Nowak, Mary Wootters, H.-S. Philip Wong, Mohamed M. Sabry Aly, Edith Beigné, Subhasish Mitra:
A 43pJ/Cycle Non-Volatile Microcontroller with 4.7μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques. ISSCC 2019: 226-228 - 2018
- [j25]Tony F. Wu, Haitong Li, Ping-Chen Huang, Abbas Rahimi, Gage Hills, Bryce Hodson, William Hwang, Jan M. Rabaey, H.-S. Philip Wong, Max M. Shulaker, Subhasish Mitra:
Hyperdimensional Computing Exploiting Carbon Nanotube FETs, Resistive RAM, and Their Monolithic 3D Integration. IEEE J. Solid State Circuits 53(11): 3183-3196 (2018) - [c56]Gage Hills, Daniel Bankman, Bert Moons, Lita Yang, Jake Hillard, Alex Kahng, Rebecca Park, Marian Verhelst, Boris Murmann, Max M. Shulaker, H.-S. Philip Wong, Subhasish Mitra:
TRIG: hardware accelerator for inference-based applications and experimental demonstration using carbon nanotube FETs. DAC 2018: 74:1-74:10 - [c51]William Hwang, Weier Wan, Subhasish Mitra, H.-S. Philip Wong:
Coming Up N3XT, After 2D Scaling of Si CMOS. ISCAS 2018: 1-5 - [c50]Tony F. Wu, Haitong Li, Ping-Chen Huang, Abbas Rahimi, Jan M. Rabaey, H.-S. Philip Wong, Max M. Shulaker, Subhasish Mitra:
Brain-inspired computing exploiting carbon nanotube FETs and resistive RAM: Hyperdimensional computing case study. ISSCC 2018: 492-494 - [i9]Abbas Rahimi, Tony F. Wu, Haitong Li, Jan M. Rabaey, H.-S. Philip Wong, Max M. Shulaker, Subhasish Mitra:
Hyperdimensional Computing Nanosystem. CoRR abs/1811.09557 (2018) - 2017
- [j23]Haitong Li, Tony F. Wu, Subhasish Mitra, H.-S. Philip Wong:
Resistive RAM-Centric Computing: Design and Modeling Methodology. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(9): 2263-2273 (2017) - [c49]William Hwang, Mohamed M. Sabry Aly, Yash H. Malviya, Mingyu Gao, Tony F. Wu, Christos Kozyrakis, H.-S. Philip Wong, Subhasish Mitra:
3D nanosystems enable embedded abundant-data computing: special session paper. CODES+ISSS 2017: 29:1-29:2 - [c47]Ameya Patil, Naresh R. Shanbhag, Lav R. Varshney, Eric Pop, H.-S. Philip Wong, Subhasish Mitra, Jan M. Rabaey, Jeffrey A. Weldon, Larry T. Pileggi, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young:
A Systems Approach to Computing in Beyond CMOS Fabrics: Invited. DAC 2017: 18:1-18:2 - 2016
- [j22]Tony F. Wu, Karthik Ganesan, Yunqing Alexander Hu, H.-S. Philip Wong, S. Simon Wong, Subhasish Mitra:
TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(4): 521-534 (2016) - [j21]Georges G. E. Gielen, Jelle Van Rethy, Jorge Marin, Max M. Shulaker, Gage Hills, H.-S. Philip Wong, Subhasish Mitra:
Time-Based Sensor Interface Circuits in CMOS and Carbon Nanotube Technologies. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(5): 577-586 (2016) - [c46]Rubén Braojos, David Atienza, Mohamed M. Sabry Aly, Tony F. Wu, H.-S. Philip Wong, Subhasish Mitra, Giovanni Ansaloni:
Nano-engineered architectures for ultra-low power wireless body sensor nodes. CODES+ISSS 2016: 23:1-23:10 - [c44]Max Marcel Shulaker, Gage Hills, H.-S. Philip Wong, Subhasish Mitra:
Transforming nanodevices to next generation nanosystems. SAMOS 2016: 288-292 - 2015
- [j20]Mohamed M. Sabry, Mingyu Gao, Gage Hills, Chi-Shuen Lee, Greg Pitner, Max M. Shulaker, Tony F. Wu, Mehdi Asheghi, Jeffrey Bokor, Franz Franchetti, Kenneth E. Goodson, Christos Kozyrakis, Igor L. Markov, Kunle Olukotun, Larry T. Pileggi, Eric Pop, Jan M. Rabaey, Christopher Ré, H.-S. Philip Wong, Subhasish Mitra:
Energy-Efficient Abundant-Data Computing: The N3XT 1, 000x. Computer 48(12): 24-33 (2015) - [j19]Gage Hills, Jie Zhang, Max Marcel Shulaker, Hai Wei, Chi-Shuen Lee, Arjun Balasingam, H.-S. Philip Wong, Subhasish Mitra:
Rapid Co-Optimization of Processing and Circuit Design to Overcome Carbon Nanotube Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(7): 1082-1095 (2015) - [c40]Max M. Shulaker, Tony F. Wu, Mohamed M. Sabry, Hai Wei, H.-S. Philip Wong, Subhasish Mitra:
Monolithic 3D integration: a path from concept to reality. DATE 2015: 1197-1202 - [c37]Georges G. E. Gielen, Jelle Van Rethy, Max M. Shulaker, Gage Hills, H.-S. Philip Wong, Subhasish Mitra:
Time-based sensor interface circuits in carbon nanotube technology. ISCAS 2015: 2924-2927 - [i5]Tony F. Wu, Karthik Ganesan, Yunqing Alexander Hu, H.-S. Philip Wong, S. Simon Wong, Subhasish Mitra:
TPAD: Hardware Trojan Prevention and Detection for Trusted Integrated Circuits. CoRR abs/1505.02211 (2015) - [i4]Gage Hills, Jie Zhang, Max Marcel Shulaker, Hai Wei, Chi-Shuen Lee, Arjun Balasingam, H.-S. Philip Wong, Subhasish Mitra:
Rapid Co-optimization of Processing and Circuit Design to Overcome Carbon Nanotube Variations. CoRR abs/1507.05679 (2015) - 2014
- [j18]Shashikanth Bobba, Jie Zhang, Pierre-Emmanuel Gaillardon, H.-S. Philip Wong, Subhasish Mitra, Giovanni De Micheli:
System Level Benchmarking with Yield-Enhanced Standard Cell Library for Carbon Nanotube VLSI Circuits. ACM J. Emerg. Technol. Comput. Syst. 10(4): 33:1-33:19 (2014) - [j17]Max M. Shulaker, Jelle Van Rethy, Gage Hills, Hai Wei, Hong-Yu Chen, Georges G. E. Gielen, H.-S. Philip Wong, Subhasish Mitra:
Sensor-to-Digital Interface Built Entirely With Carbon Nanotube FETs. IEEE J. Solid State Circuits 49(1): 190-201 (2014) - [c35]Gage Hills, Max M. Shulaker, Hai Wei, Hong-Yu Chen, H.-S. Philip Wong, Subhasish Mitra:
Robust design and experimental demonstrations of carbon nanotube digital circuits. CICC 2014: 1-4 - 2013
- [j15]Daesung Lee, W. Scott Lee, Chen Chen, Farzan Fallah, J. Provine, Soogine Chong, John Watkins, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra:
Combinational Logic Design Using Six-Terminal NEM Relays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(5): 653-666 (2013) - [c29]Gage Hills, Jie Zhang, Charles Mackin, Max M. Shulaker, Hai Wei, H.-S. Philip Wong, Subhasish Mitra:
Rapid exploration of processing and design guidelines to overcome carbon nanotube variations. DAC 2013: 105:1-105:10 - [c28]Max M. Shulaker, Jelle Van Rethy, Gage Hills, Hong-Yu Chen, Georges G. E. Gielen, H.-S. Philip Wong, Subhasish Mitra:
Sacha: the Stanford carbon nanotube controlled handshaking robot. DAC 2013: 124:1-124:3 - [c27]Hai Wei, Max M. Shulaker, Gage Hills, Hong-Yu Chen, Chi-Shuen Lee, Luckshitha Liyanage, Jie Zhang, H.-S. Philip Wong, Subhasish Mitra:
Carbon nanotube circuits: opportunities and challenges. DATE 2013: 619-624 - [c25]Max M. Shulaker, Jelle Van Rethy, Gage Hills, Hong-Yu Chen, Georges G. E. Gielen, H.-S. Philip Wong, Subhasish Mitra:
Experimental demonstration of a fully digital capacitive sensor interface built entirely using carbon-nanotube FETs. ISSCC 2013: 112-113 - 2012
- [j12]Jie Zhang, Albert Lin, Nishant Patil, Hai Wei, Lan Wei, H.-S. Philip Wong, Subhasish Mitra:
Carbon Nanotube Robust Digital VLSI. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(4): 453-471 (2012) - [c24]Chen Chen, W. Scott Lee, J. Provine, Soogine Chong, Roozbeh Parsa, Daesung Lee, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra:
Nano-Electro-Mechanical (NEM) relays and their application to FPGA routing. ASP-DAC 2012: 639 - [c22]Chen Chen, W. Scott Lee, Roozbeh Parsa, Soogine Chong, J. Provine, Jeff Watt, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra:
Nano-Electro-Mechanical relays for FPGA routing: Experimental demonstration and a design technique. DATE 2012: 1361-1366 - 2011
- [j11]Jie Zhang, Nishant Patil, Arash Hazeghi, H.-S. Philip Wong, Subhasish Mitra:
Characterization and Design of Logic Circuits in the Presence of Carbon Nanotube Density Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(8): 1103-1113 (2011) - [c19]Hai Wei, Jie Zhang, Lan Wei, Nishant Patil, Albert Lin, Max M. Shulaker, Hong-Yu Chen, H.-S. Philip Wong, Subhasish Mitra:
Carbon nanotube imperfection-immune digital VLSI: Frequently asked questions updated. ICCAD 2011: 227-230 - 2010
- [c17]Jie Zhang, Shashikanth Bobba, Nishant Patil, Albert Lin, H.-S. Philip Wong, Giovanni De Micheli, Subhasish Mitra:
Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement. DAC 2010: 889-892 - [c16]Jie Zhang, Nishant Patil, Albert Lin, H.-S. Philip Wong, Subhasish Mitra:
Carbon nanotube circuits: Living with imperfections and variations. DATE 2010: 1159-1164 - [c15]Chen Chen, Roozbeh Parsa, Nishant Patil, Soogine Chong, Kerem Akarvardar, J. Provine, David Lewis, Jeff Watt, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra:
Efficient FPGAs using nanoelectromechanical relays. FPGA 2010: 273-282 - 2009
- [c12]Nishant Patil, Albert Lin, Jie Zhang, H.-S. Philip Wong, Subhasish Mitra:
Digital VLSI logic technology using Carbon Nanotube FETs: frequently asked questions. DAC 2009: 304-309 - [c11]Soogine Chong, Kerem Akarvardar, Roozbeh Parsa, Jun-Bo Yoon, Roger T. Howe, Subhasish Mitra, H.-S. Philip Wong:
Nanoelectromechanical (NEM) relays integrated with CMOS SRAM for improved stability and low leakage. ICCAD 2009: 478-484 - 2008
- [j7]Nishant Patil, Jie Deng, Albert Lin, H.-S. Philip Wong, Subhasish Mitra:
Design Methods for Misaligned and Mispositioned Carbon-Nanotube Immune Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(10): 1725-1736 (2008) - 2007
- [c8]Nishant Patil, Jie Deng, H.-S. Philip Wong, Subhasish Mitra:
Automated Design of Misaligned-Carbon-Nanotube-Immune Circuits. DAC 2007: 958-961 - [c6]Jie Deng, Nishant Patil, Koungmin Ryu, Alexander Badmaev, Chongwu Zhou, Subhasish Mitra, H.-S. Philip Wong:
Carbon Nanotube Transistor Circuits: Circuit-Level Performance Benchmarking and Design Options for Living with Imperfections. ISSCC 2007: 70-588
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last updated on 2024-05-02 23:43 CEST by the dblp team
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