![](https://dblp1.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp1.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp1.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
default search action
ACM Journal on Emerging Technologies in Computing Systems, Volume 10
Volume 10, Number 1, January 2014
- Rahul Rao, Fadi H. Gebara:
Introduction to special issue on reliability and device degradation in emerging technologies. 1:1-1:2 - Haldun Küflüoglu, Cathy Chancellor, Min Chen, Claude Cirba, Vijay Reddy:
Recovery modeling of negative bias temperature instability (NBTI) for SPICE-compatible circuit aging simulators. 2:1-2:16 - Senthil Arasu, Mehrdad Nourani, Vijay Reddy, John M. Carulli Jr., Gautam Kapila, Min Chen:
Reliability improvement of logic and clock paths in power-efficient designs. 3:1-3:23 - Jin Sun, Roman L. Lysecky, Karthik Shankar, Avinash Karanth Kodi, Ahmed Louri, Janet Roveda:
Workload assignment considering NBTI degradation in multicore systems. 4:1-4:22 - Djaafar Chabi, Damien Querlioz, Weisheng Zhao, Jacques-Olivier Klein
:
Robust learning approach for neuro-inspired nanoscale crossbar architecture. 5:1-5:20 - Stefano Frache, Mariagrazia Graziano, Maurizio Zamboni
:
Nanoarray architectures multilevel simulation. 6:1-6:20 - Alberto Avritzer, Tadashi Dohi
:
Introduction to special issue on WoSAR 2011. 7:1-7:2 - Domenico Cotroneo, Roberto Natella
, Roberto Pietrantuono
, Stefano Russo
:
A survey of software aging and rejuvenation studies. 8:1-8:34 - Jing Zhao, Yuliang Jin, Kishor S. Trivedi, Rivalino Matias Jr., Yanbin Wang:
Software rejuvenation scheduling using accelerated life testing. 9:1-9:23 - Fumio Machida, Victor F. Nicola, Kishor S. Trivedi:
Job completion time on a virtualized server with software rejuvenation. 10:1-10:26 - Jean Araujo
, Rúbens de Souza Matos Júnior, Vandi Alves, Paulo Romero Martins Maciel, F. Vieira de Souza, Rivalino Matias Jr., Kishor S. Trivedi:
Software aging in the eucalyptus cloud computing infrastructure: Characterization and rejuvenation. 11:1-11:22
Volume 10, Number 2, February 2014
- Jifeng Chen, Shuo Wang, Mohammad Tehranipoor:
Critical-reliability path identification and delay analysis. 12:1-12:21 - Michael Gladshtein:
Delay-based processing-in-wire for design of QCA serial decimal arithmetic units. 13:1-13:18 - Chia-Chun Lin, Niraj K. Jha:
RMDDS: Reed-muller decision diagram synthesis of reversible logic circuits. 14:1-14:25 - Weichen Liu
, Xuan Wang, Jiang Xu
, Wei Zhang, Yaoyao Ye, Xiaowen Wu, Mahdi Nikdast, Zhehui Wang
:
On-chip sensor networks for soft-error tolerant real-time multiprocessor systems-on-chip. 15:1-15:20 - Jaeyoon Kim, Sandip Tiwari:
Inexact computing using probabilistic circuits: Ultra low-power digital processing. 16:1-16:23 - Luke Pierce, Spyros Tragoudas:
Nanopipelined threshold network synthesis. 17:1-17:17 - Dong Xiang, Kele Shen:
A thermal-driven test application scheme for pre-bond and post-bond scan testing of three-dimensional ICs. 18:1-18:19
Volume 10, Number 3, April 2014
- Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari
, Massoud Pedram:
Impact of Process Variations on Speedup and Maximum Achievable Frequency of Extensible Processors. 19:1-19:25 - Haera Chung, Christof Teuscher, Partha Pratim Pande:
Design and Evaluation of Technology-Agnostic Heterogeneous Networks-on-Chip. 20:1-20:27 - Ashok Kumar Palaniswamy, Spyros Tragoudas:
Improved Threshold Logic Synthesis Using Implicant-Implicit Algorithms. 21:1-21:32 - Fu-Wei Chen, TingTing Hwang:
Clock-Tree Synthesis with Methodology of Reuse in 3D-IC. 22:1-22:22 - Wulong Liu, Yu Wang
, Yuchun Ma, Yuan Xie, Huazhong Yang:
On-Chip Hybrid Power Supply System for Wireless Sensor Nodes. 23:1-23:22 - Daniel T. Grissom, Christopher Curtis, Philip Brisk
:
Interpreting Assays with Control Flow on Digital Microfluidic Biochips. 24:1-24:30 - Bo Yuan, Bin Li:
A Fast Extraction Algorithm for Defect-Free Subcrossbar in Nanoelectronic Crossbar. 25:1-25:19 - Sourindra Chaudhuri, Niraj K. Jha:
3D vs. 2D Device Simulation of FinFET Logic Gates under PVT Variations. 26:1-26:19
Volume 10, Number 4, May 2014
- Jacob Murray, Teng Lu, Paul Wettin, Partha Pratim Pande, Behrooz A. Shirazi:
Dual-Level DVFS-Enabled Millimeter-Wave Wireless NoC Architectures. 27:1-27:27 - Vineeth Vijayakumaran, Manoj Prashanth Yuvaraj, Naseef Mansoor, Nishad Nerurkar, Amlan Ganguly, Andres Kwasinski:
CDMA Enabled Wireless Network-on-Chip. 28:1-28:20 - Xiaowen Wu, Jiang Xu, Yaoyao Ye, Zhehui Wang
, Mahdi Nikdast, Xuan Wang:
SUOR: Sectioned Undirectional Optical Ring for Chip Multiprocessor. 29:1-29:25 - Paolo Grani
, Sandro Bartolini:
Design Options for Optical Ring Interconnect in Future Client Devices. 30:1-30:25 - Jie Chen, Guru Venkataramani, H. Howie Huang:
Exploring Dynamic Redundancy to Resuscitate Faulty PCM Blocks. 31:1-31:23 - Matthias Beste, Mehdi Baradaran Tahoori:
Effect of the Active Layer on Carbon Nanotube-Based Cells for Yield Analysis. 32:1-32:19 - Shashikanth Bobba, Jie Zhang, Pierre-Emmanuel Gaillardon, H.-S. Philip Wong, Subhasish Mitra, Giovanni De Micheli
:
System Level Benchmarking with Yield-Enhanced Standard Cell Library for Carbon Nanotube VLSI Circuits. 33:1-33:19
![](https://dblp1.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.